From b39b6867afbadd38476328201c07527ad17af60d Mon Sep 17 00:00:00 2001 From: Cyrille Bagard Date: Sun, 4 Oct 2009 12:41:38 +0000 Subject: Supported a few extra instructions (inc/dec rm8/16/32). git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@123 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a --- ChangeLog | 10 +++++++ src/arch/x86/instruction.c | 5 ++++ src/arch/x86/instruction.h | 4 +++ src/arch/x86/op_dec.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++ src/arch/x86/op_inc.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++ src/arch/x86/opcodes.h | 12 ++++++++ src/arch/x86/processor.c | 17 ++++++++++++ 7 files changed, 186 insertions(+) diff --git a/ChangeLog b/ChangeLog index 75f9b58..23f00e8 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,13 @@ +09-10-04 Cyrille Bagard + + * src/arch/x86/instruction.c: + * src/arch/x86/instruction.h: + * src/arch/x86/opcodes.h: + * src/arch/x86/op_dec.c: + * src/arch/x86/op_inc.c: + * src/arch/x86/processor.c: + Support a few extra instructions (inc/dec rm8/16/32). + 09-10-02 Cyrille Bagard * src/gtkext/gtkblockview.c: diff --git a/src/arch/x86/instruction.c b/src/arch/x86/instruction.c index 65be263..712fab4 100644 --- a/src/arch/x86/instruction.c +++ b/src/arch/x86/instruction.c @@ -310,6 +310,11 @@ static x86_instruction _instructions[XOP_COUNT] = { [XOP_CLD] = { false, 0xfc, IDX_TO_EXT(-1), "cld", XPX_NONE }, + + [XOP_INC_RM8] = { false, 0xfe, IDX_TO_EXT(0), "inc", XPX_NONE }, + [XOP_DEC_RM8] = { false, 0xfe, IDX_TO_EXT(1), "dec", XPX_NONE }, + [XOP_INC_RM1632] = { false, 0xff, IDX_TO_EXT(0), "inc", XPX_OPERAND_SIZE_OVERRIDE }, + [XOP_DEC_RM1632] = { false, 0xff, IDX_TO_EXT(1), "dec", XPX_OPERAND_SIZE_OVERRIDE }, [XOP_CALL_RM1632] = { false, 0xff, IDX_TO_EXT(2), "call", XPX_OPERAND_SIZE_OVERRIDE }, [XOP_JMP_RM1632] = { false, 0xff, IDX_TO_EXT(4), "jmp", XPX_OPERAND_SIZE_OVERRIDE }, [XOP_PUSH_RM1632] = { false, 0xff, IDX_TO_EXT(6), "push", XPX_OPERAND_SIZE_OVERRIDE } diff --git a/src/arch/x86/instruction.h b/src/arch/x86/instruction.h index d3b68c9..c190136 100644 --- a/src/arch/x86/instruction.h +++ b/src/arch/x86/instruction.h @@ -248,6 +248,10 @@ typedef enum _X86Opcodes XOP_CLD, /* cld (0xfc) */ + XOP_INC_RM8, /* inc (0xfe 0) */ + XOP_DEC_RM8, /* dec (0xfe 1) */ + XOP_INC_RM1632, /* inc ([0x66] 0xff 0) */ + XOP_DEC_RM1632, /* dec ([0x66] 0xff 1) */ XOP_CALL_RM1632, /* call ([0x66] 0xff 2) */ XOP_JMP_RM1632, /* jmp ([0x66] 0xff 4) */ XOP_PUSH_RM1632, /* push ([0x66] 0xff 6) */ diff --git a/src/arch/x86/op_dec.c b/src/arch/x86/op_dec.c index f140b85..928dafd 100644 --- a/src/arch/x86/op_dec.c +++ b/src/arch/x86/op_dec.c @@ -68,3 +68,72 @@ GArchInstruction *x86_read_instr_dec_r1632(const bin_t *data, off_t *pos, off_t return result; } + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'dec' (8 bits). * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *x86_read_instr_dec_rm8(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + + result = g_x86_instruction_new(XOP_DEC_RM8); + + if (!x86_read_one_operand(result, data, pos, len, X86_OTP_RM8)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'dec' (16/32 bits). * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *x86_read_instr_dec_rm1632(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + AsmOperandSize oprsize; /* Taille des opérandes */ + + result = g_x86_instruction_new(XOP_DEC_RM1632); + + oprsize = g_x86_processor_get_operand_size(proc, prefix); + + if (!x86_read_one_operand(result, data, pos, len, X86_OTP_RM1632, oprsize)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} diff --git a/src/arch/x86/op_inc.c b/src/arch/x86/op_inc.c index b80e448..eee3490 100644 --- a/src/arch/x86/op_inc.c +++ b/src/arch/x86/op_inc.c @@ -68,3 +68,72 @@ GArchInstruction *x86_read_instr_inc_r1632(const bin_t *data, off_t *pos, off_t return result; } + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'inc' (8 bits). * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *x86_read_instr_inc_rm8(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + + result = g_x86_instruction_new(XOP_INC_RM8); + + if (!x86_read_one_operand(result, data, pos, len, X86_OTP_RM8)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'inc' (16/32 bits). * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *x86_read_instr_inc_rm1632(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + AsmOperandSize oprsize; /* Taille des opérandes */ + + result = g_x86_instruction_new(XOP_INC_RM1632); + + oprsize = g_x86_processor_get_operand_size(proc, prefix); + + if (!x86_read_one_operand(result, data, pos, len, X86_OTP_RM1632, oprsize)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h index 93e4d5c..9ef2880 100644 --- a/src/arch/x86/opcodes.h +++ b/src/arch/x86/opcodes.h @@ -105,6 +105,12 @@ GArchInstruction *x86_read_instr_cmp_rm1632_r1632(const bin_t *, off_t *, off_t, /* Décode une instruction de type 'dec' (16 ou 32 bits). */ GArchInstruction *x86_read_instr_dec_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); +/* Décode une instruction de type 'dec' (8 bits). */ +GArchInstruction *x86_read_instr_dec_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); + +/* Décode une instruction de type 'dec' (16/32 bits). */ +GArchInstruction *x86_read_instr_dec_rm1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); + /* Décode une instruction de type 'hlt'. */ GArchInstruction *x86_read_instr_hlt(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); @@ -117,6 +123,12 @@ GArchInstruction *x86_read_instr_imul_rm1632_imm8(const bin_t *, off_t *, off_t, /* Décode une instruction de type 'inc' (16 ou 32 bits). */ GArchInstruction *x86_read_instr_inc_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); +/* Décode une instruction de type 'inc' (8 bits). */ +GArchInstruction *x86_read_instr_inc_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); + +/* Décode une instruction de type 'inc' (16/32 bits). */ +GArchInstruction *x86_read_instr_inc_rm1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); + /* Décode une instruction de type 'int 3'. */ GArchInstruction *x86_read_instr_int_3(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c index ac6fb8e..fc2924b 100644 --- a/src/arch/x86/processor.c +++ b/src/arch/x86/processor.c @@ -739,6 +739,23 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor break; + + case XOP_INC_RM8: + result = x86_read_instr_inc_rm8(data, pos, len, addr, prefix, proc); + break; + + case XOP_DEC_RM8: + result = x86_read_instr_dec_rm8(data, pos, len, addr, prefix, proc); + break; + + case XOP_INC_RM1632: + result = x86_read_instr_inc_rm1632(data, pos, len, addr, prefix, proc); + break; + + case XOP_DEC_RM1632: + result = x86_read_instr_dec_rm1632(data, pos, len, addr, prefix, proc); + break; + case XOP_CALL_RM1632: result = x86_read_instr_call_rm1632(data, pos, len, addr, prefix, proc); break; -- cgit v0.11.2-87-g4458