From b649c2c01ab407958f3b7057153fb02c9c7d0be1 Mon Sep 17 00:00:00 2001
From: Cyrille Bagard <nocbos@gmail.com>
Date: Mon, 12 Oct 2009 21:24:16 +0000
Subject: Supported the 'setl' opcode.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@131 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
---
ChangeLog | 9 +++++++++
src/arch/x86/instruction.c | 6 ++++--
src/arch/x86/instruction.h | 2 ++
src/arch/x86/op_set.c | 33 +++++++++++++++++++++++++++++++++
src/arch/x86/opcodes.h | 3 +++
src/arch/x86/processor.c | 6 ++++++
6 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/ChangeLog b/ChangeLog
index 9e28fff..f4560c9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+09-10-12 Cyrille Bagard <nocbos@gmail.com>
+
+ * src/arch/x86/instruction.c:
+ * src/arch/x86/instruction.h:
+ * src/arch/x86/opcodes.h:
+ * src/arch/x86/op_set.c:
+ * src/arch/x86/processor.c:
+ Support the 'setl' opcode.
+
09-10-11 Cyrille Bagard <nocbos@gmail.com>
* src/arch/x86/instruction.c:
diff --git a/src/arch/x86/instruction.c b/src/arch/x86/instruction.c
index 3e47d13..dbfe1e9 100644
--- a/src/arch/x86/instruction.c
+++ b/src/arch/x86/instruction.c
@@ -106,8 +106,10 @@ static x86_instruction _instructions[XOP_COUNT] = {
[XOP_JG_REL1632] = { false, 0x8f, IDX_TO_EXT(-1), "jg", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE },
- [XOP_SETE_RM8] = { false, 0x94, IDX_TO_EXT(-1), "sete", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE },
- [XOP_SETNE_RM8] = { false, 0x95, IDX_TO_EXT(-1), "setne", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE },
+ [XOP_SETE_RM8] = { false, 0x94, IDX_TO_EXT(-1), "sete", XPX_TWO_BYTES },
+ [XOP_SETNE_RM8] = { false, 0x95, IDX_TO_EXT(-1), "setne", XPX_TWO_BYTES },
+
+ [XOP_SETL_RM8] = { false, 0x9c, IDX_TO_EXT(-1), "setl", XPX_TWO_BYTES },
[XOP_MOVZX_R1632_RM8] = { false, 0xb6, IDX_TO_EXT(-1), "movzx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE },
diff --git a/src/arch/x86/instruction.h b/src/arch/x86/instruction.h
index 0db591f..33d3e87 100644
--- a/src/arch/x86/instruction.h
+++ b/src/arch/x86/instruction.h
@@ -60,6 +60,8 @@ typedef enum _X86Opcodes
XOP_SETE_RM8, /* sete ([0x66] 0x0f 0x94) */
XOP_SETNE_RM8, /* setne ([0x66] 0x0f 0x95) */
+ XOP_SETL_RM8, /* setl ([0x66] 0x0f 0x9c) */
+
XOP_MOVZX_R1632_RM8, /* movzx ([0x66] 0x0f 0xb6) */
XOP_MOVSX_R1632_RM8, /* movsx ([0x66] 0x0f 0xbe) */
XOP_MOVSX_R1632_RM1632, /* movsx ([0x66] 0x0f 0xbf) */
diff --git a/src/arch/x86/op_set.c b/src/arch/x86/op_set.c
index ed49877..6af6cb8 100644
--- a/src/arch/x86/op_set.c
+++ b/src/arch/x86/op_set.c
@@ -68,6 +68,39 @@ GArchInstruction *x86_read_instr_sete_rm8(const bin_t *data, off_t *pos, off_t l
* addr = adresse virtuelle de l'instruction. *
* proc = architecture ciblée par le désassemblage. *
* *
+* Description : Décode une instruction de type 'setl' (8 bits). *
+* *
+* Retour : Instruction mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchInstruction *x86_read_instr_setl_rm8(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc)
+{
+ GArchInstruction *result; /* Instruction à retourner */
+
+ result = g_x86_instruction_new(XOP_SETL_RM8);
+
+ if (!x86_read_one_operand(result, data, pos, len, X86_OTP_RM8))
+ {
+ /* TODO free(result);*/
+ return NULL;
+ }
+
+ return result;
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : data = flux de données à analyser. *
+* pos = position courante dans ce flux. [OUT] *
+* len = taille totale des données à analyser. *
+* addr = adresse virtuelle de l'instruction. *
+* proc = architecture ciblée par le désassemblage. *
+* *
* Description : Décode une instruction de type 'setne' (8 bits). *
* *
* Retour : Instruction mise en place ou NULL. *
diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h
index 16ace49..e3c719c 100644
--- a/src/arch/x86/opcodes.h
+++ b/src/arch/x86/opcodes.h
@@ -360,6 +360,9 @@ GArchInstruction *x86_read_instr_scas_al_m8(const bin_t *, off_t *, off_t, vmpa_
/* Décode une instruction de type 'sete' (8 bits). */
GArchInstruction *x86_read_instr_sete_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'setl' (8 bits). */
+GArchInstruction *x86_read_instr_setl_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'setne' (8 bits). */
GArchInstruction *x86_read_instr_setne_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c
index 97cdb78..cafd91c 100644
--- a/src/arch/x86/processor.c
+++ b/src/arch/x86/processor.c
@@ -277,6 +277,12 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor
break;
+ case XOP_SETL_RM8:
+ result = x86_read_instr_setl_rm8(data, pos, len, addr, prefix, proc);
+ break;
+
+
+
case XOP_JGE_REL1632:
result = x86_read_instr_jge_rel1632(data, pos, len, addr, prefix, proc);
--
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