From a3b128d4f448fa1eee12074a9bf0256b06e222e8 Mon Sep 17 00:00:00 2001
From: Cyrille Bagard <nocbos@gmail.com>
Date: Sun, 27 Jun 2010 11:46:06 +0000
Subject: Fixed many bugs with the branch targets and supported one sub opcode.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@170 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
---
ChangeLog | 21 ++++++++++++++
src/arch/dalvik/Makefile.am | 1 +
src/arch/dalvik/instruction.c | 23 ++++++++-------
src/arch/dalvik/instruction.h | 24 ++++++++--------
src/arch/dalvik/op_sub.c | 65 +++++++++++++++++++++++++++++++++++++++++++
src/arch/dalvik/opcodes.h | 5 ++++
src/arch/dalvik/operand.c | 10 ++-----
src/arch/dalvik/processor.c | 16 +++++------
8 files changed, 126 insertions(+), 39 deletions(-)
create mode 100644 src/arch/dalvik/op_sub.c
diff --git a/ChangeLog b/ChangeLog
index e1135d9..bff9366 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,24 @@
+10-06-27 Cyrille Bagard <nocbos@gmail.com>
+
+ * src/arch/dalvik/instruction.c:
+ * src/arch/dalvik/instruction.h:
+ Support one sub opcode and fix the conditional jump ones.
+
+ * src/arch/dalvik/Makefile.am:
+ Add op_sub.c to libarchdalvik_la_SOURCES.
+
+ * src/arch/dalvik/opcodes.h:
+ Support one sub opcode.
+
+ * src/arch/dalvik/operand.c:
+ Fix many bugs with the branch targets.
+
+ * src/arch/dalvik/op_sub.c:
+ New entry: support one sub opcode.
+
+ * src/arch/dalvik/processor.c:
+ Support one sub opcode and reorganize the conditional jump ones.
+
10-06-20 Cyrille Bagard <nocbos@gmail.com>
* src/arch/dalvik/instruction.c:
diff --git a/src/arch/dalvik/Makefile.am b/src/arch/dalvik/Makefile.am
index 595bc4f..a7e099f 100644
--- a/src/arch/dalvik/Makefile.am
+++ b/src/arch/dalvik/Makefile.am
@@ -27,6 +27,7 @@ libarchdalvik_la_SOURCES = \
op_rsub.c \
op_sget.c \
op_sput.c \
+ op_sub.c \
op_to.c \
op_xor.c \
opcodes.h \
diff --git a/src/arch/dalvik/instruction.c b/src/arch/dalvik/instruction.c
index 17c19a4..13c8e83 100644
--- a/src/arch/dalvik/instruction.c
+++ b/src/arch/dalvik/instruction.c
@@ -108,18 +108,17 @@ static dalvik_instruction _instructions[DOP_COUNT] = {
[DOP_CMPG_DOUBLE] = { 0x30, "cmpg-double" },
[DOP_CMP_LONG] = { 0x31, "cmp-long" },
[DOP_IF_EQ] = { 0x32, "if-eq" },
- [DOP_IF_EQZ] = { 0x33, "if-eqz" },
- [DOP_IF_GE] = { 0x34, "if-ge" },
- [DOP_IF_GEZ] = { 0x35, "if-gez" },
+ [DOP_IF_NE] = { 0x33, "if-ne" },
+ [DOP_IF_LT] = { 0x34, "if-lt" },
+ [DOP_IF_GE] = { 0x35, "if-ge" },
[DOP_IF_GT] = { 0x36, "if-gt" },
- [DOP_IF_GTZ] = { 0x37, "if-gtz" },
- [DOP_IF_LE] = { 0x38, "if-le" },
- [DOP_IF_LEZ] = { 0x39, "if-lez" },
- [DOP_IF_LT] = { 0x3a, "if-lt" },
- [DOP_IF_LTZ] = { 0x3b, "if-ltz" },
- [DOP_IF_NE] = { 0x3c, "if-ne" },
- [DOP_IF_NEZ] = { 0x3d, "if-nez" },
-
+ [DOP_IF_LE] = { 0x37, "if-le" },
+ [DOP_IF_EQZ] = { 0x38, "if-eqz" },
+ [DOP_IF_NEZ] = { 0x39, "if-nez" },
+ [DOP_IF_LTZ] = { 0x3a, "if-ltz" },
+ [DOP_IF_GEZ] = { 0x3b, "if-gez" },
+ [DOP_IF_GTZ] = { 0x3c, "if-gtz" },
+ [DOP_IF_LEZ] = { 0x3d, "if-lez" },
@@ -187,7 +186,7 @@ static dalvik_instruction _instructions[DOP_COUNT] = {
[DOP_TO_INT_CHAR] = { 0x8e, "int-to-char" },
[DOP_TO_INT_SHORT] = { 0x8f, "int-to-short" },
[DOP_ADD_INT] = { 0x90, "add-int" },
-
+ [DOP_SUB_INT] = { 0x91, "sub-int" },
[DOP_MUL_INT] = { 0x92, "mul-int" },
[DOP_DIV_INT] = { 0x93, "div-int" },
[DOP_REM_INT] = { 0x94, "rem-int" },
diff --git a/src/arch/dalvik/instruction.h b/src/arch/dalvik/instruction.h
index 4a41668..cc7f845 100644
--- a/src/arch/dalvik/instruction.h
+++ b/src/arch/dalvik/instruction.h
@@ -74,17 +74,17 @@ typedef enum _DalvikOpcodes
DOP_CMPG_DOUBLE, /* cmpg-double (0x30) */
DOP_CMP_LONG, /* cmp-long (0x31) */
DOP_IF_EQ, /* if-eq (0x32) */
- DOP_IF_EQZ, /* if-eqz (0x33) */
- DOP_IF_GE, /* if-ge (0x34) */
- DOP_IF_GEZ, /* if-gez (0x35) */
- DOP_IF_GT, /* if-gt (0x33) */
- DOP_IF_GTZ, /* if-gtz (0x37) */
- DOP_IF_LE, /* if-le (0x38) */
- DOP_IF_LEZ, /* if-lez (0x39) */
- DOP_IF_LT, /* if-lt (0x3a) */
- DOP_IF_LTZ, /* if-ltz (0x3b) */
- DOP_IF_NE, /* if-ne (0x3c) */
- DOP_IF_NEZ, /* if-nez (0x3d) */
+ DOP_IF_NE, /* if-ne (0x33) */
+ DOP_IF_LT, /* if-lt (0x34) */
+ DOP_IF_GE, /* if-ge (0x35) */
+ DOP_IF_GT, /* if-gt (0x36) */
+ DOP_IF_LE, /* if-le (0x37) */
+ DOP_IF_EQZ, /* if-eqz (0x38) */
+ DOP_IF_NEZ, /* if-nez (0x39) */
+ DOP_IF_LTZ, /* if-ltz (0x3a) */
+ DOP_IF_GEZ, /* if-gez (0x3b) */
+ DOP_IF_GTZ, /* if-gtz (0x3c) */
+ DOP_IF_LEZ, /* if-lez (0x3d) */
@@ -154,7 +154,7 @@ typedef enum _DalvikOpcodes
DOP_TO_INT_CHAR, /* int-to-char (0x8e) */
DOP_TO_INT_SHORT, /* int-to-short (0x8f) */
DOP_ADD_INT, /* add-int (0x90) */
-
+ DOP_SUB_INT, /* sub-int (0x91) */
DOP_MUL_INT, /* mul-int (0x92) */
DOP_DIV_INT, /* div-int (0x93) */
DOP_REM_INT, /* rem-int (0x94) */
diff --git a/src/arch/dalvik/op_sub.c b/src/arch/dalvik/op_sub.c
new file mode 100644
index 0000000..8308616
--- /dev/null
+++ b/src/arch/dalvik/op_sub.c
@@ -0,0 +1,65 @@
+
+/* OpenIDA - Outil d'analyse de fichiers binaires
+ * op_sub.c - décodage des opérations de soustraction
+ *
+ * Copyright (C) 2010 Cyrille Bagard
+ *
+ * This file is part of OpenIDA.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include "opcodes.h"
+
+
+#include "instruction.h"
+#include "operand.h"
+
+
+
+/******************************************************************************
+* *
+* Paramètres : data = flux de données à analyser. *
+* pos = position courante dans ce flux. [OUT] *
+* len = taille totale des données à analyser. *
+* addr = adresse virtuelle de l'instruction. *
+* proc = architecture ciblée par le désassemblage. *
+* *
+* Description : Décode une instruction de type 'sub-int'. *
+* *
+* Retour : Instruction mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchInstruction *dalvik_read_instr_sub_int(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, const GDalvikProcessor *proc)
+{
+ GArchInstruction *result; /* Instruction à retourner */
+ SourceEndian endian; /* Boutisme lié au binaire */
+
+ result = g_dalvik_instruction_new(DOP_SUB_INT);
+
+ endian = g_arch_processor_get_endianness(G_ARCH_PROCESSOR(proc));
+
+ if (!dalvik_read_operands(result, data, pos, len, endian, DALVIK_OPT_23X))
+ {
+ g_object_unref(G_OBJECT(result));
+ return NULL;
+ }
+
+ return result;
+
+}
diff --git a/src/arch/dalvik/opcodes.h b/src/arch/dalvik/opcodes.h
index 2dbcdab..7d4b42e 100644
--- a/src/arch/dalvik/opcodes.h
+++ b/src/arch/dalvik/opcodes.h
@@ -446,6 +446,11 @@ GArchInstruction *dalvik_read_instr_sput_wide(const bin_t *, off_t *, off_t, vmp
+/* Décode une instruction de type 'sub-int'. */
+GArchInstruction *dalvik_read_instr_sub_int(const bin_t *, off_t *, off_t, vmpa_t, const GDalvikProcessor *);
+
+
+
/* Décode une instruction de type 'int-to-byte'. */
GArchInstruction *dalvik_read_instr_to_int_byte(const bin_t *, off_t *, off_t, vmpa_t, const GDalvikProcessor *);
diff --git a/src/arch/dalvik/operand.c b/src/arch/dalvik/operand.c
index 07c0675..2b64a10 100644
--- a/src/arch/dalvik/operand.c
+++ b/src/arch/dalvik/operand.c
@@ -939,28 +939,24 @@ static void g_dalvik_target_operand_init(GDalvikTargetOperand *operand)
GArchOperand *g_dalvik_target_operand_new(const bin_t *data, off_t *pos, off_t len, MemoryDataSize size, SourceEndian endian, vmpa_t base)
{
GDalvikTargetOperand *result; /* Structure à retourner */
- off_t init_pos; /* Position avant lecture */
int8_t val8; /* Valeur sur 8 bits */
int16_t val16; /* Valeur sur 16 bits */
int32_t val32; /* Valeur sur 32 bits */
vmpa_t address; /* Adresse finale visée */
- init_pos = *pos;
-
switch (size)
{
case MDS_8_BITS_SIGNED:
read_s8(&val8, data, pos, len, endian);
- address = base + (*pos - init_pos) + val8;
+ address = base + val8 * sizeof(uint16_t);
break;
case MDS_16_BITS_SIGNED:
read_s16(&val16, data, pos, len, endian);
- printf("ADDR :: 0x%08llx + (%d - %d) + 0x%08x\n", base, *pos, init_pos, val16);
- address = base + (*pos - init_pos) + val16;
+ address = base + val16 * sizeof(uint16_t);
break;
case MDS_32_BITS_SIGNED:
read_s32(&val32, data, pos, len, endian);
- address = base + (*pos - init_pos) + val32;
+ address = base + val32 * sizeof(uint16_t);
break;
default:
return NULL;
diff --git a/src/arch/dalvik/processor.c b/src/arch/dalvik/processor.c
index adfa2a3..c6861c9 100644
--- a/src/arch/dalvik/processor.c
+++ b/src/arch/dalvik/processor.c
@@ -191,17 +191,17 @@ static GArchInstruction *g_dalvik_processor_decode_instruction(const GDalvikProc
[DOP_CMPG_DOUBLE] = dalvik_read_instr_cmpg_double,
[DOP_CMP_LONG] = dalvik_read_instr_cmp_long,
[DOP_IF_EQ] = dalvik_read_instr_if_eq,
- [DOP_IF_EQZ] = dalvik_read_instr_if_eqz,
+ [DOP_IF_NE] = dalvik_read_instr_if_ne,
+ [DOP_IF_LT] = dalvik_read_instr_if_lt,
[DOP_IF_GE] = dalvik_read_instr_if_ge,
- [DOP_IF_GEZ] = dalvik_read_instr_if_gez,
[DOP_IF_GT] = dalvik_read_instr_if_gt,
- [DOP_IF_GTZ] = dalvik_read_instr_if_gtz,
[DOP_IF_LE] = dalvik_read_instr_if_le,
- [DOP_IF_LEZ] = dalvik_read_instr_if_lez,
- [DOP_IF_LT] = dalvik_read_instr_if_lt,
- [DOP_IF_LTZ] = dalvik_read_instr_if_ltz,
- [DOP_IF_NE] = dalvik_read_instr_if_ne,
+ [DOP_IF_EQZ] = dalvik_read_instr_if_eqz,
[DOP_IF_NEZ] = dalvik_read_instr_if_nez,
+ [DOP_IF_LTZ] = dalvik_read_instr_if_ltz,
+ [DOP_IF_GEZ] = dalvik_read_instr_if_gez,
+ [DOP_IF_GTZ] = dalvik_read_instr_if_gtz,
+ [DOP_IF_LEZ] = dalvik_read_instr_if_lez,
@@ -271,7 +271,7 @@ static GArchInstruction *g_dalvik_processor_decode_instruction(const GDalvikProc
[DOP_TO_INT_CHAR] = dalvik_read_instr_to_int_char,
[DOP_TO_INT_SHORT] = dalvik_read_instr_to_int_short,
[DOP_ADD_INT] = dalvik_read_instr_add_int,
-
+ [DOP_SUB_INT] = dalvik_read_instr_sub_int,
[DOP_MUL_INT] = dalvik_read_instr_mul_int,
[DOP_DIV_INT] = dalvik_read_instr_div_int,
[DOP_REM_INT] = dalvik_read_instr_rem_int,
--
cgit v0.11.2-87-g4458