From b6fd6dc823615aaee8661e8e2365181c1ea1775f Mon Sep 17 00:00:00 2001
From: Cyrille Bagard <nocbos@gmail.com>
Date: Mon, 5 Apr 2010 19:07:25 +0000
Subject: Supported some extra opcodes : popa and arpl.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@147 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
---
ChangeLog | 17 +++++++++++++
src/arch/x86/Makefile.am | 1 +
src/arch/x86/instruction.c | 4 +++
src/arch/x86/instruction.h | 3 +++
src/arch/x86/op_arpl.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++
src/arch/x86/op_pop.c | 28 +++++++++++++++++++++
src/arch/x86/opcodes.h | 6 +++++
src/arch/x86/processor.c | 2 ++
8 files changed, 124 insertions(+)
create mode 100644 src/arch/x86/op_arpl.c
diff --git a/ChangeLog b/ChangeLog
index f582bb3..1297ed7 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,20 @@
+10-04-05 Cyrille Bagard <nocbos@gmail.com>
+
+ * src/arch/x86/instruction.c:
+ * src/arch/x86/instruction.h:
+ Support some extra opcodes : popa and arpl.
+
+ * src/arch/x86/Makefile.am:
+ Add op_arpl.c to libarchx86_la_SOURCES.
+
+ * src/arch/x86/op_arpl.c:
+ New entry: support the 'arpl' instruction.
+
+ * src/arch/x86/opcodes.h:
+ * src/arch/x86/op_pop.c:
+ * src/arch/x86/processor.c:
+ Support some extra opcodes : popa and arpl.
+
10-03-31 Cyrille Bagard <nocbos@gmail.com>
* configure.ac:
diff --git a/src/arch/x86/Makefile.am b/src/arch/x86/Makefile.am
index 55a88b1..e7fd905 100644
--- a/src/arch/x86/Makefile.am
+++ b/src/arch/x86/Makefile.am
@@ -6,6 +6,7 @@ libarchx86_la_SOURCES = \
op_adc.c \
op_add.c \
op_and.c \
+ op_arpl.c \
op_call.c \
op_cld.c \
op_cmp.c \
diff --git a/src/arch/x86/instruction.c b/src/arch/x86/instruction.c
index 6433c6f..edbffec 100644
--- a/src/arch/x86/instruction.c
+++ b/src/arch/x86/instruction.c
@@ -184,6 +184,10 @@ static x86_instruction _instructions[XOP_COUNT] = {
[XOP_POP_E_DI] = { true, 0x5f, IDX_TO_EXT(-1), "pop", XPX_OPERAND_SIZE_OVERRIDE },
+ [XOP_POPA] = { false, 0x61, IDX_TO_EXT(-1), "popa", XPX_NONE },
+
+ [XOP_ARPL_RM16_R16] = { false, 0x63, IDX_TO_EXT(-1), "arpl", XPX_NONE },
+
[XOP_PUSH_IMM1632] = { false, 0x68, IDX_TO_EXT(-1), "push", XPX_OPERAND_SIZE_OVERRIDE },
[XOP_IMUL_R1632_RM1632_IMM1632] = { false, 0x69, IDX_TO_EXT(-1), "imul", XPX_OPERAND_SIZE_OVERRIDE },
diff --git a/src/arch/x86/instruction.h b/src/arch/x86/instruction.h
index 33d3e87..0fc7513 100644
--- a/src/arch/x86/instruction.h
+++ b/src/arch/x86/instruction.h
@@ -127,6 +127,9 @@ typedef enum _X86Opcodes
XOP_POP_E_SI, /* pop ([0x66] 0x5e) */
XOP_POP_E_DI, /* pop ([0x66] 0x5f) */
+ XOP_POPA, /* popa (0x61) */
+
+ XOP_ARPL_RM16_R16, /* arpl (0x63) */
XOP_PUSH_IMM1632, /* push ([0x66] 0x68) */
XOP_IMUL_R1632_RM1632_IMM1632, /* imul ([0x66] 0x69) */
diff --git a/src/arch/x86/op_arpl.c b/src/arch/x86/op_arpl.c
new file mode 100644
index 0000000..9b58bda
--- /dev/null
+++ b/src/arch/x86/op_arpl.c
@@ -0,0 +1,63 @@
+
+/* OpenIDA - Outil d'analyse de fichiers binaires
+ * op_arpl.c - décodage des ajustements de champs RPL
+ *
+ * Copyright (C) 2010 Cyrille Bagard
+ *
+ * This file is part of OpenIDA.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include <malloc.h>
+
+
+#include "../instruction-int.h"
+#include "opcodes.h"
+#include "operand.h"
+
+
+
+/******************************************************************************
+* *
+* Paramètres : data = flux de données à analyser. *
+* pos = position courante dans ce flux. [OUT] *
+* len = taille totale des données à analyser. *
+* addr = adresse virtuelle de l'instruction. *
+* proc = architecture ciblée par le désassemblage. *
+* *
+* Description : Décode une instruction de type 'arpl' (16 bits). *
+* *
+* Retour : Instruction mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchInstruction *x86_read_instr_arpl_rm16_r16(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc)
+{
+ GArchInstruction *result; /* Instruction à retourner */
+
+ result = g_x86_instruction_new(XOP_ARPL_RM16_R16);
+
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM1632, X86_OTP_R1632, AOS_16_BITS))
+ {
+ /* TODO free(result);*/
+ return NULL;
+ }
+
+ return result;
+
+}
diff --git a/src/arch/x86/op_pop.c b/src/arch/x86/op_pop.c
index c362898..04b49e6 100644
--- a/src/arch/x86/op_pop.c
+++ b/src/arch/x86/op_pop.c
@@ -67,3 +67,31 @@ GArchInstruction *x86_read_instr_pop_r1632(const bin_t *data, off_t *pos, off_t
return result;
}
+
+
+/******************************************************************************
+* *
+* Paramètres : data = flux de données à analyser. *
+* pos = position courante dans ce flux. [OUT] *
+* len = taille totale des données à analyser. *
+* addr = adresse virtuelle de l'instruction. *
+* prefix = éventuel(s) préfixe(s) remarqué(s). *
+* proc = architecture ciblée par le désassemblage. *
+* *
+* Description : Décode une instruction de type 'popa'. *
+* *
+* Retour : Instruction mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchInstruction *x86_read_instr_popa(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc)
+{
+ GArchInstruction *result; /* Instruction à retourner */
+
+ result = g_x86_instruction_new(XOP_POPA);
+
+ return result;
+
+}
diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h
index aaa4b55..5a6d69f 100644
--- a/src/arch/x86/opcodes.h
+++ b/src/arch/x86/opcodes.h
@@ -95,6 +95,9 @@ GArchInstruction *x86_read_instr_and_rm1632_imm1632(const bin_t *, off_t *, off_
/* Décode une instruction de type 'and' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_and_rm1632_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'arpl' (16 bits). */
+GArchInstruction *x86_read_instr_arpl_rm16_r16(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'call'. */
GArchInstruction *x86_read_instr_call_rel1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
@@ -317,6 +320,9 @@ GArchInstruction *x86_read_instr_or_rm8_r8(const bin_t *, off_t *, off_t, vmpa_t
/* Décode une instruction de type 'or' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_or_rm1632_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'popa'. */
+GArchInstruction *x86_read_instr_popa(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'pop' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_pop_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c
index b9932a0..58f271c 100644
--- a/src/arch/x86/processor.c
+++ b/src/arch/x86/processor.c
@@ -254,6 +254,8 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor
[XOP_POP_E_BP] = x86_read_instr_pop_r1632,
[XOP_POP_E_SI] = x86_read_instr_pop_r1632,
[XOP_POP_E_DI] = x86_read_instr_pop_r1632,
+ [XOP_POPA] = x86_read_instr_popa,
+ [XOP_ARPL_RM16_R16] = x86_read_instr_arpl_rm16_r16,
[XOP_PUSH_IMM1632] = x86_read_instr_push_imm1632,
[XOP_IMUL_R1632_RM1632_IMM1632] = x86_read_instr_imul_r1632_rm1632_imm1632,
[XOP_IMUL_RM1632_IMM8] = x86_read_instr_imul_rm1632_imm8,
--
cgit v0.11.2-87-g4458