From 7a42f3772ab31bb9c756fc5c5c86c531c04b1d70 Mon Sep 17 00:00:00 2001
From: Cyrille Bagard <nocbos@gmail.com>
Date: Tue, 25 Nov 2014 08:05:22 +0000
Subject: Extended the range of supported ARMv7 instructions.

git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@427 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
---
 ChangeLog                            |  52 +++++++
 configure.ac                         |   1 +
 src/arch/arm/v7/Makefile.am          |   5 +-
 src/arch/arm/v7/arm.c                |   6 +-
 src/arch/arm/v7/helpers.h            |  29 ++++
 src/arch/arm/v7/opcodes/Makefile.am  |   1 +
 src/arch/arm/v7/opdefs/Makefile.am   |  15 ++
 src/arch/arm/v7/opdefs/adc_A882.d    |  88 ++++++++++++
 src/arch/arm/v7/opdefs/add_A887.d    |  50 +++++++
 src/arch/arm/v7/opdefs/and_A8814.d   |  89 ++++++++++++
 src/arch/arm/v7/opdefs/bic_A8822.d   |  88 ++++++++++++
 src/arch/arm/v7/opdefs/cmn_A8835.d   |  78 +++++++++++
 src/arch/arm/v7/opdefs/cmp_A8838.d   | 100 ++++++++++++++
 src/arch/arm/v7/opdefs/eor_A8847.d   |  89 ++++++++++++
 src/arch/arm/v7/opdefs/mvn_A88116.d  |  86 ++++++++++++
 src/arch/arm/v7/opdefs/orr_A88123.d  |  89 ++++++++++++
 src/arch/arm/v7/opdefs/rsb_A88153.d  |  73 ++++++++++
 src/arch/arm/v7/opdefs/rsc_A88156.d  |  49 +++++++
 src/arch/arm/v7/opdefs/sbc_A88162.d  |  88 ++++++++++++
 src/arch/arm/v7/opdefs/sub_A88223.d  |  93 +++++++++++++
 src/arch/arm/v7/opdefs/teq_A88238.d  |  63 +++++++++
 src/arch/arm/v7/opdefs/tst_A88241.d  |  84 +++++++++++
 src/arch/arm/v7/operands/Makefile.am |  14 ++
 src/arch/arm/v7/operands/shift.c     | 260 +++++++++++++++++++++++++++++++++++
 src/arch/arm/v7/operands/shift.h     |  65 +++++++++
 src/arch/arm/v7/pseudo.c             | 113 +++++++++++++++
 src/arch/arm/v7/pseudo.h             |   6 +
 tools/d2c/syntax.c                   |  10 +-
 28 files changed, 1778 insertions(+), 6 deletions(-)
 create mode 100644 src/arch/arm/v7/opdefs/adc_A882.d
 create mode 100644 src/arch/arm/v7/opdefs/add_A887.d
 create mode 100644 src/arch/arm/v7/opdefs/and_A8814.d
 create mode 100644 src/arch/arm/v7/opdefs/bic_A8822.d
 create mode 100644 src/arch/arm/v7/opdefs/cmn_A8835.d
 create mode 100644 src/arch/arm/v7/opdefs/cmp_A8838.d
 create mode 100644 src/arch/arm/v7/opdefs/eor_A8847.d
 create mode 100644 src/arch/arm/v7/opdefs/mvn_A88116.d
 create mode 100644 src/arch/arm/v7/opdefs/orr_A88123.d
 create mode 100644 src/arch/arm/v7/opdefs/rsb_A88153.d
 create mode 100644 src/arch/arm/v7/opdefs/rsc_A88156.d
 create mode 100644 src/arch/arm/v7/opdefs/sbc_A88162.d
 create mode 100644 src/arch/arm/v7/opdefs/sub_A88223.d
 create mode 100644 src/arch/arm/v7/opdefs/teq_A88238.d
 create mode 100644 src/arch/arm/v7/opdefs/tst_A88241.d
 create mode 100644 src/arch/arm/v7/operands/Makefile.am
 create mode 100644 src/arch/arm/v7/operands/shift.c
 create mode 100644 src/arch/arm/v7/operands/shift.h

diff --git a/ChangeLog b/ChangeLog
index b029fdd..031ce50 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,55 @@
+14-11-25  Cyrille Bagard <nocbos@gmail.com>
+
+	* configure.ac:
+	Add the new Makefile from the 'src/arch/arm/v7/operands' directory.
+
+	* src/arch/arm/v7/arm.c:
+	Extend the range of supported ARMv7 instructions.
+
+	* src/arch/arm/v7/helpers.h:
+	Handle shift decodings.
+
+	* src/arch/arm/v7/Makefile.am:
+	Add 'operands/libarcharmv7operands.la' to libarcharmv7_la_LIBADD and
+	'operands' to SUBDIRS.
+
+	* src/arch/arm/v7/opcodes/Makefile.am:
+	Update the list of generated C files.
+
+	* src/arch/arm/v7/opdefs/adc_A882.d:
+	* src/arch/arm/v7/opdefs/add_A887.d:
+	* src/arch/arm/v7/opdefs/and_A8814.d:
+	* src/arch/arm/v7/opdefs/bic_A8822.d:
+	* src/arch/arm/v7/opdefs/cmn_A8835.d:
+	* src/arch/arm/v7/opdefs/cmp_A8838.d:
+	* src/arch/arm/v7/opdefs/eor_A8847.d:
+	New entries: define new ARM instructions.
+
+	* src/arch/arm/v7/opdefs/Makefile.am:
+	Update the list of handled ARM instructions in ARMV7_DEFS.
+
+	* src/arch/arm/v7/opdefs/mvn_A88116.d:
+	* src/arch/arm/v7/opdefs/orr_A88123.d:
+	* src/arch/arm/v7/opdefs/rsb_A88153.d:
+	* src/arch/arm/v7/opdefs/rsc_A88156.d:
+	* src/arch/arm/v7/opdefs/sbc_A88162.d:
+	* src/arch/arm/v7/opdefs/sub_A88223.d:
+	* src/arch/arm/v7/opdefs/teq_A88238.d:
+	* src/arch/arm/v7/opdefs/tst_A88241.d:
+	New entries: define new ARM instructions.
+
+	* src/arch/arm/v7/operands/Makefile.am:
+	* src/arch/arm/v7/operands/shift.c:
+	* src/arch/arm/v7/operands/shift.h:
+	New entries: handle ARMv7 shift operands.
+
+	* src/arch/arm/v7/pseudo.c:
+	* src/arch/arm/v7/pseudo.h:
+	Decode shift pseudo functions.
+
+	* tools/d2c/syntax.c:
+	Recognize optional arguments.
+
 14-11-24  Cyrille Bagard <nocbos@gmail.com>
 
 	* src/arch/dalvik/operands/args.c:
diff --git a/configure.ac b/configure.ac
index f60f801..0461880 100644
--- a/configure.ac
+++ b/configure.ac
@@ -308,6 +308,7 @@ AC_CONFIG_FILES([Makefile
                  src/arch/arm/v7/Makefile
                  src/arch/arm/v7/opdefs/Makefile
                  src/arch/arm/v7/opcodes/Makefile
+                 src/arch/arm/v7/operands/Makefile
                  src/arch/dalvik/Makefile
                  src/arch/dalvik/decomp/Makefile
                  src/arch/dalvik/opcodes/Makefile
diff --git a/src/arch/arm/v7/Makefile.am b/src/arch/arm/v7/Makefile.am
index f4b1fc9..f9e804a 100644
--- a/src/arch/arm/v7/Makefile.am
+++ b/src/arch/arm/v7/Makefile.am
@@ -10,7 +10,8 @@ libarcharmv7_la_SOURCES =				\
 	register.h register.c
 
 libarcharmv7_la_LIBADD =				\
-	opcodes/libarcharmv7opcodes.la
+	opcodes/libarcharmv7opcodes.la		\
+	operands/libarcharmv7operands.la
 
 libarcharmv7_la_CFLAGS = $(AM_CFLAGS)
 
@@ -20,4 +21,4 @@ AM_CPPFLAGS = $(LIBGTK_CFLAGS) $(LIBXML_CFLAGS)
 AM_CFLAGS = $(DEBUG_CFLAGS) $(WARNING_FLAGS) $(COMPLIANCE_FLAGS)
 
 
-SUBDIRS = opdefs opcodes
+SUBDIRS = opdefs opcodes operands
diff --git a/src/arch/arm/v7/arm.c b/src/arch/arm/v7/arm.c
index fb1dc3f..ea9819c 100644
--- a/src/arch/arm/v7/arm.c
+++ b/src/arch/arm/v7/arm.c
@@ -78,6 +78,7 @@ static GArchInstruction *process_armv7_branch_branch_with_link_and_block_data_tr
 
 // process_armv7_data_processing_register
 
+/*
 #define armv7_read_instr_and_register(raw) NULL
 #define armv7_read_instr_eor_register(raw) NULL
 #define armv7_read_instr_sub_register(raw) NULL
@@ -91,14 +92,15 @@ static GArchInstruction *process_armv7_branch_branch_with_link_and_block_data_tr
 #define armv7_read_instr_cmp_register(raw) NULL
 #define armv7_read_instr_cmn_register(raw) NULL
 #define armv7_read_instr_orr_register(raw) NULL
+*/
 //#define armv7_read_instr_mov_register_arm(raw) NULL
 #define armv7_read_instr_lsl_immediate(raw) NULL
 #define armv7_read_instr_lsr_immediate(raw) NULL
 #define armv7_read_instr_asr_immediate(raw) NULL
 #define armv7_read_instr_rrx(raw) NULL
 #define armv7_read_instr_ror_immediate(raw) NULL
-#define armv7_read_instr_bic_register(raw) NULL
-#define armv7_read_instr_mvn_register(raw) NULL
+//#define armv7_read_instr_bic_register(raw) NULL
+//#define armv7_read_instr_mvn_register(raw) NULL
 
 
 // process_armv7_branch_branch_with_link_and_block_data_transfer
diff --git a/src/arch/arm/v7/helpers.h b/src/arch/arm/v7/helpers.h
index 66a98f6..d72bb88 100644
--- a/src/arch/arm/v7/helpers.h
+++ b/src/arch/arm/v7/helpers.h
@@ -29,6 +29,7 @@
 
 
 #include "pseudo.h"
+#include "operands/shift.h"
 #include "../../operand.h"
 
 
@@ -49,7 +50,35 @@
         g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val);  \
     })
 
+#define DecodeImmShift(type, imm5)				                                    \
+	({                                                                              \
+        GArchOperand *__result;                                                     \
+        SRType __shift_t;                                                           \
+        uint32_t __shift_n;                                                         \
+        GArchOperand *__op_n;                                                       \
+        if (!armv7_decode_imm_shift(type, imm5, &__shift_t, &__shift_n))            \
+            __result = NULL;                                                        \
+        else                                                                        \
+        {                                                                           \
+            __op_n = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __shift_n); \
+            __result = g_armv7_shift_operand_new(__shift_t, __op_n);                \
+        }                                                                           \
+        __result;                                                                   \
+    })
+
+
 
+#if 0
+// DecodeRegShift()
+// ================
+SRType DecodeRegShift(bits(2) type)
+case type of
+when '00' shift_t = SRType_LSL;
+when '01' shift_t = SRType_LSR;
+when '10' shift_t = SRType_ASR;
+when '11' shift_t = SRType_ROR;
+return shift_t;
+#endif
 
 
 
diff --git a/src/arch/arm/v7/opcodes/Makefile.am b/src/arch/arm/v7/opcodes/Makefile.am
index 06a9ddd..9e49c31 100644
--- a/src/arch/arm/v7/opcodes/Makefile.am
+++ b/src/arch/arm/v7/opcodes/Makefile.am
@@ -1,6 +1,7 @@
 
 noinst_LTLIBRARIES = libarcharmv7opcodes.la
 
+# ls *c | grep -v thumb | sort | sed 's/^/\t/' | sed 's/$/\t\t\\/'
 libarcharmv7opcodes_la_SOURCES = 		\
 	adc.c		\
 	add.c		\
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index 629cf1a..a8ae089 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -22,28 +22,43 @@ D2C_MACROS =											\
 
 ARMV7_DEFS = 							\
 	adc_A881.d							\
+	adc_A882.d							\
 	add_A885.d							\
+	add_A887.d							\
 	and_A8813.d							\
+	and_A8814.d							\
 	bic_A8821.d							\
+	bic_A8822.d							\
 	bl_A8825.d							\
 	bx_A8827.d							\
 	cmn_A8834.d							\
+	cmn_A8835.d							\
 	cmp_A8837.d							\
+	cmp_A8838.d							\
 	eor_A8846.d							\
+	eor_A8847.d							\
 	mla_A88100.d						\
 	mls_A88101.d						\
 	mov_A88104.d						\
 	mul_A88114.d						\
 	mvn_A88115.d						\
+	mvn_A88116.d						\
 	orr_A88122.d						\
+	orr_A88123.d						\
 	rsb_A88152.d						\
+	rsb_A88153.d						\
 	rsc_A88155.d						\
+	rsc_A88156.d						\
 	sbc_A88161.d						\
+	sbc_A88162.d						\
 	smlal_A88178.d						\
 	smull_A88189.d						\
 	sub_A88222.d						\
+	sub_A88223.d						\
 	teq_A88237.d						\
+	teq_A88238.d						\
 	tst_A88240.d						\
+	tst_A88241.d						\
 	umaal_A88255.d						\
 	umlal_A88256.d						\
 	umull_A88257.d						\
diff --git a/src/arch/arm/v7/opdefs/adc_A882.d b/src/arch/arm/v7/opdefs/adc_A882.d
new file mode 100644
index 0000000..9c62b24
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/adc_A882.d
@@ -0,0 +1,88 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title ADC (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 0 1 0 1 Rm(3) Rdn(3)
+
+    @syntax <Rdn> <Rm>
+
+    @conv {
+
+        Rdn = Register(Rdn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 1 0 1 0 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if d IN {13,15} || n IN {13,15} || m IN {13,15} then UNPREDICTABLE;
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 1 0 1 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/add_A887.d b/src/arch/arm/v7/opdefs/add_A887.d
new file mode 100644
index 0000000..17bbe7f
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/add_A887.d
@@ -0,0 +1,50 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title ADD (register, ARM)
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 1 0 0 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+        //if Rn == '1101' then SEE ADD (SP plus register);
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/and_A8814.d b/src/arch/arm/v7/opdefs/and_A8814.d
new file mode 100644
index 0000000..7991596
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/and_A8814.d
@@ -0,0 +1,89 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title AND (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 0 0 0 0 Rm(3) Rdn(3)
+
+    @syntax <Rdn> <Rm>
+
+    @conv {
+
+        Rdn = Register(Rdn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 0 0 0 0 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see TST (register)
+        //if ((d == 13) || ((d == 15) && (S == '0')) || (n IN {13,15})) ; unpredictable
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 0 0 0 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/bic_A8822.d b/src/arch/arm/v7/opdefs/bic_A8822.d
new file mode 100644
index 0000000..4ad55cb
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/bic_A8822.d
@@ -0,0 +1,88 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title BIC (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 1 1 1 0 Rm(3) Rdn(3)
+
+    @syntax <Rdn> <Rm>
+
+    @conv {
+
+        Rdn = Register(Rdn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 0 0 0 1 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if d IN {13,15} || n IN {13,15} || m IN {13,15} then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 1 1 1 0 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/cmn_A8835.d b/src/arch/arm/v7/opdefs/cmn_A8835.d
new file mode 100644
index 0000000..1b94dbc
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/cmn_A8835.d
@@ -0,0 +1,78 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title CMN (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 1 0 1 1 Rm(3) Rn(3)
+
+    @syntax <Rn> <Rm>
+
+    @conv {
+
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 1 0 0 0 1 Rn(4) 0 imm3(3) 1 1 1 1 imm2(2) type(2) Rm(4)
+
+    @syntax <Rn> <Rm> <?shift>
+
+    @conv {
+
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if n == 15 || m IN {13,15} then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 1 0 1 1 1 Rn(4) 0 0 0 0 imm5(5) type(2) 0 Rm(4)
+
+    @syntax {c} <Rn> <Rm> <?shift>
+
+    @conv {
+
+        c = Condition(cond)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/cmp_A8838.d b/src/arch/arm/v7/opdefs/cmp_A8838.d
new file mode 100644
index 0000000..a24df29
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/cmp_A8838.d
@@ -0,0 +1,100 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title CMP (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 1 0 1 0 Rm(3) Rn(3)
+
+    @syntax <Rn> <Rm>
+
+    @conv {
+
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @half 0 1 0 0 0 1 0 1 N(1) Rm(4) Rn(3)
+
+    @syntax <Rn> <Rm>
+
+    @conv {
+
+        Rn = Register(N:Rn)
+        Rm = Register(Rm)
+
+    }
+
+    @rules {
+
+        //if n < 8 && m < 8 then UNPREDICTABLE
+        //if n == 15 || m == 15 then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(T3) {
+
+    @word 1 1 1 0 1 0 1 1 1 0 1 1 Rn(4) 0 imm3(3) 1 1 1 1 imm2(2) type(2) Rm(4)
+
+    @syntax <Rn> <Rm> <?shift>
+
+    @conv {
+
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if n == 15 || m IN {13,15} then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 1 0 1 0 1 Rn(4) 0 0 0 0 imm5(5) type(2) 0 Rm(4)
+
+    @syntax {c} <Rn> <Rm> <?shift>
+
+    @conv {
+
+        c = Condition(cond)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/eor_A8847.d b/src/arch/arm/v7/opdefs/eor_A8847.d
new file mode 100644
index 0000000..eb651f3
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/eor_A8847.d
@@ -0,0 +1,89 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title EOR (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 0 0 0 1 Rm(3) Rdn(3)
+
+    @syntax <Rdn> <Rm>
+
+    @conv {
+
+        Rdn = Register(Rdn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 0 1 0 0 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see TEQ (register)
+        //if ((d == 13) || ((d == 15) && (S == '0')) || (n IN {13,15})) ; unpredictable
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 0 0 1 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/mvn_A88116.d b/src/arch/arm/v7/opdefs/mvn_A88116.d
new file mode 100644
index 0000000..7e9434c
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/mvn_A88116.d
@@ -0,0 +1,86 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title MVN (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 1 1 1 1 Rm(3) Rd(3)
+
+    @syntax <Rd> <Rm>
+
+    @conv {
+
+        Rd = Register(Rd)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 0 0 1 1 S(1) 1 1 1 1 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if d IN {13,15} || m IN {13,15} then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 1 1 1 1 S(1) 0 0 0 0 Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/orr_A88123.d b/src/arch/arm/v7/opdefs/orr_A88123.d
new file mode 100644
index 0000000..f772c90
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/orr_A88123.d
@@ -0,0 +1,89 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title ORR (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 1 1 0 0 Rm(3) Rdn(3)
+
+    @syntax <Rdn> <Rm>
+
+    @conv {
+
+        Rdn = Register(Rdn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 0 0 1 0 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if Rn == '1111' then SEE "Related encodings";
+        //if d IN {13,15} || n == 13 || m IN {13,15} then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 1 1 0 0 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/rsb_A88153.d b/src/arch/arm/v7/opdefs/rsb_A88153.d
new file mode 100644
index 0000000..0b78c18
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/rsb_A88153.d
@@ -0,0 +1,73 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title RSB (register)
+
+@encoding(T1) {
+
+    @word 1 1 1 0 1 0 1 1 1 1 0 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if d IN {13,15} || n IN {13,15} || m IN {13,15} then UNPREDICTABLE;
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 0 1 1 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/rsc_A88156.d b/src/arch/arm/v7/opdefs/rsc_A88156.d
new file mode 100644
index 0000000..d54d91f
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/rsc_A88156.d
@@ -0,0 +1,49 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title RSC (register)
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 1 1 1 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/sbc_A88162.d b/src/arch/arm/v7/opdefs/sbc_A88162.d
new file mode 100644
index 0000000..f2f4b72
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/sbc_A88162.d
@@ -0,0 +1,88 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title SBC (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 0 1 1 0 Rm(3) Rdn(3)
+
+    @syntax <Rdn> <Rm>
+
+    @conv {
+
+        Rdn = Register(Rdn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 1 0 1 1 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if d IN {13,15} || n IN {13,15} || m IN {13,15} then UNPREDICTABLE;
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 1 1 0 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/sub_A88223.d b/src/arch/arm/v7/opdefs/sub_A88223.d
new file mode 100644
index 0000000..025139f
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/sub_A88223.d
@@ -0,0 +1,93 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title SUB (register)
+
+@encoding(T1) {
+
+    @half 0 0 0 1 1 0 1 Rm(3) Rn(3) Rd(3)
+
+    @syntax <Rd> <Rn> <Rm>
+
+    @conv {
+
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 1 1 0 1 S(1) Rn(4) 0 imm3(3) Rd(4) imm2(2) type(2) Rm(4)
+
+    @syntax {S} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+        
+        //if ((Rd == '1111') && (S == '1')) ; see CMP (register)
+        //if (Rn == '1101') ; see SUB (SP minus register)
+        //if ((d == 13) || ((d == 15) && (S == '0')) [[ n == 15 || (m IN {13,15})) ; unpredictable
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 0 0 1 0 S(1) Rn(4) Rd(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax {S} {c} <Rd> <Rn> <Rm> <?shift>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if (Rn == '1101') ; see SUB (SP minus register)
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/teq_A88238.d b/src/arch/arm/v7/opdefs/teq_A88238.d
new file mode 100644
index 0000000..a79eb3e
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/teq_A88238.d
@@ -0,0 +1,63 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title TEQ (register)
+
+@encoding(T1) {
+
+    @word 1 1 1 0 1 0 1 0 1 0 0 1 Rn(4) 0 imm3(3) 1 1 1 1 imm2(2) type(2) Rm(4)
+
+    @syntax <Rn> <Rm> <?shift>
+
+    @conv {
+
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if n IN {13,15} || m IN {13,15} then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 1 0 0 1 1 Rn(4) 0 0 0 0 imm5(5) type(2) 0 Rm(4)
+
+    @syntax {c} <Rn> <Rm> <?shift>
+
+    @conv {
+
+        c = Condition(cond)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/tst_A88241.d b/src/arch/arm/v7/opdefs/tst_A88241.d
new file mode 100644
index 0000000..bbb4c68
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/tst_A88241.d
@@ -0,0 +1,84 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title TST (register)
+
+@encoding(T1) {
+
+    @half 0 1 0 0 0 0 1 0 0 0 Rm(3) Rn(3)
+
+    @syntax <Rn> <Rm>
+
+    @conv {
+
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 0 1 0 1 0 0 0 0 1 Rn(4) 0 imm3(3) 1 1 1 1 imm2(2) type(2) Rm(4)
+
+    @syntax <Rn> <Rm> <?shift>
+
+    @conv {
+
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm3:imm2)
+
+    }
+
+    @rules {
+
+        //if n IN {13,15} || m IN {13,15} then UNPREDICTABLE
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 0 1 0 0 0 1 Rn(4) 0 0 0 0 imm5(5) type(2) 0 Rm(4)
+
+    @syntax {c} <Rn> <Rm> <?shift>
+
+    @conv {
+
+        c = Condition(cond)
+        Rn = Register(Rn)
+        Rm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+
+    }
+
+}
diff --git a/src/arch/arm/v7/operands/Makefile.am b/src/arch/arm/v7/operands/Makefile.am
new file mode 100644
index 0000000..a14b644
--- /dev/null
+++ b/src/arch/arm/v7/operands/Makefile.am
@@ -0,0 +1,14 @@
+
+noinst_LTLIBRARIES = libarcharmv7operands.la
+
+libarcharmv7operands_la_SOURCES = 		\
+	shift.h shift.c
+
+libarcharmv7operands_la_LIBADD =
+
+libarcharmv7operands_la_CFLAGS = $(AM_CFLAGS)
+
+
+AM_CPPFLAGS = $(LIBGTK_CFLAGS) $(LIBXML_CFLAGS)
+
+AM_CFLAGS = $(DEBUG_CFLAGS) $(WARNING_FLAGS) $(COMPLIANCE_FLAGS)
diff --git a/src/arch/arm/v7/operands/shift.c b/src/arch/arm/v7/operands/shift.c
new file mode 100644
index 0000000..253302f
--- /dev/null
+++ b/src/arch/arm/v7/operands/shift.c
@@ -0,0 +1,260 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * args.c - listes d'opérandes rassemblées en arguments
+ *
+ * Copyright (C) 2010-2013 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  OpenIDA is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  OpenIDA is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include "shift.h"
+
+
+#include "../../../operand-int.h"
+
+
+
+/* Définition d'un opérande visant une liste d'opérandes Dalvik (instance) */
+struct _GArmV7ShiftOperand
+{
+    GArchOperand parent;                    /* Instance parente            */
+
+    SRType shift_type;                      /* Type de décallage           */
+    GArchOperand *shift_value;              /* Valeur du décallage         */
+
+};
+
+
+/* Définition d'un opérande visant une liste d'opérandes Dalvik (classe) */
+struct _GArmV7ShiftOperandClass
+{
+    GArchOperandClass parent;               /* Classe parente              */
+
+};
+
+
+/* Initialise la classe des listes d'opérandes Dalvik. */
+static void g_armv7_shift_operand_class_init(GArmV7ShiftOperandClass *);
+
+/* Initialise une instance de liste d'opérandes Dalvik. */
+static void g_armv7_shift_operand_init(GArmV7ShiftOperand *);
+
+/* Supprime toutes les références externes. */
+static void g_armv7_shift_operand_dispose(GArmV7ShiftOperand *);
+
+/* Procède à la libération totale de la mémoire. */
+static void g_armv7_shift_operand_finalize(GArmV7ShiftOperand *);
+
+/* Traduit un opérande en version humainement lisible. */
+static void g_armv7_shift_operand_print(const GArmV7ShiftOperand *, GBufferLine *, AsmSyntax);
+
+
+
+/* Indique le type défini par la GLib pour une liste d'arguments Dalvik. */
+G_DEFINE_TYPE(GArmV7ShiftOperand, g_armv7_shift_operand, G_TYPE_ARCH_OPERAND);
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : klass = classe à initialiser.                                *
+*                                                                             *
+*  Description : Initialise la classe des listes d'opérandes Dalvik.          *
+*                                                                             *
+*  Retour      : -                                                            *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+static void g_armv7_shift_operand_class_init(GArmV7ShiftOperandClass *klass)
+{
+    GObjectClass *object;                   /* Autre version de la classe  */
+    GArchOperandClass *operand;             /* Version de classe parente   */
+
+    object = G_OBJECT_CLASS(klass);
+    operand = G_ARCH_OPERAND_CLASS(klass);
+
+    object->dispose = (GObjectFinalizeFunc/* ! */)g_armv7_shift_operand_dispose;
+    object->finalize = (GObjectFinalizeFunc)g_armv7_shift_operand_finalize;
+
+    operand->print = (operand_print_fc)g_armv7_shift_operand_print;
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : operand = instance à initialiser.                            *
+*                                                                             *
+*  Description : Initialise une instance de liste d'opérandes Dalvik.         *
+*                                                                             *
+*  Retour      : -                                                            *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+static void g_armv7_shift_operand_init(GArmV7ShiftOperand *operand)
+{
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : operand = instance d'objet GLib à traiter.                   *
+*                                                                             *
+*  Description : Supprime toutes les références externes.                     *
+*                                                                             *
+*  Retour      : -                                                            *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+static void g_armv7_shift_operand_dispose(GArmV7ShiftOperand *operand)
+{
+    g_object_unref(G_OBJECT(operand->shift_value));
+
+    G_OBJECT_CLASS(g_armv7_shift_operand_parent_class)->dispose(G_OBJECT(operand));
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : operand = instance d'objet GLib à traiter.                   *
+*                                                                             *
+*  Description : Procède à la libération totale de la mémoire.                *
+*                                                                             *
+*  Retour      : -                                                            *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+static void g_armv7_shift_operand_finalize(GArmV7ShiftOperand *operand)
+{
+    G_OBJECT_CLASS(g_armv7_shift_operand_parent_class)->finalize(G_OBJECT(operand));
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : -                                                            *
+*                                                                             *
+*  Description : Crée un réceptacle pour opérandes Dalvik servant d'arguments.*
+*                                                                             *
+*  Retour      : Opérande mis en place.                                       *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+GArchOperand *g_armv7_shift_operand_new(SRType type, GArchOperand *value)
+{
+    GArmV7ShiftOperand *result;             /* Structure à retourner       */
+
+    result = g_object_new(G_TYPE_ARMV7_SHIFT_OPERAND, NULL);
+
+    result->shift_type = type;
+    result->shift_value = value;
+
+    return G_ARCH_OPERAND(result);
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : operand = opérande à traiter.                                *
+*                line    = ligne tampon où imprimer l'opérande donné.         *
+*                syntax  = type de représentation demandée.                   *
+*                                                                             *
+*  Description : Traduit un opérande en version humainement lisible.          *
+*                                                                             *
+*  Retour      : -                                                            *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+static void g_armv7_shift_operand_print(const GArmV7ShiftOperand *operand, GBufferLine *line, AsmSyntax syntax)
+{
+	switch (operand->shift_type)
+	{
+        case SRType_LSL:
+            g_buffer_line_insert_text(line, BLC_ASSEMBLY, "lsl", 3, RTT_KEY_WORD);
+			break;
+        case SRType_LSR:
+            g_buffer_line_insert_text(line, BLC_ASSEMBLY, "lsr", 3, RTT_KEY_WORD);
+			break;
+        case SRType_ASR:
+            g_buffer_line_insert_text(line, BLC_ASSEMBLY, "asr", 3, RTT_KEY_WORD);
+			break;
+        case SRType_ROR:
+            g_buffer_line_insert_text(line, BLC_ASSEMBLY, "ror", 3, RTT_KEY_WORD);
+			break;
+        case SRType_RRX:
+            g_buffer_line_insert_text(line, BLC_ASSEMBLY, "rrx", 3, RTT_KEY_WORD);
+			break;
+	}
+
+	g_buffer_line_insert_text(line, BLC_ASSEMBLY, " ", 1, RTT_RAW);
+
+	g_arch_operand_print(operand->shift_value, line, syntax);
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : operand = opérande à consulter.                              *
+*                                                                             *
+*  Description : Indique la forme de décallage représenté.                    *
+*                                                                             *
+*  Retour      : Type de décallage.                                           *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+SRType g_armv7_shift_operand_get_shift_type(const GArmV7ShiftOperand *operand)
+{
+    return operand->shift_type;
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : operand = opérande à consulter.                              *
+*                                                                             *
+*  Description : Founit la valeur utilisée pour un décallage.                 *
+*                                                                             *
+*  Retour      : Opérande en place.                                           *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+GArchOperand *g_armv7_shift_operand_get_shift_value(const GArmV7ShiftOperand *operand)
+{
+    return operand->shift_value;
+
+}
diff --git a/src/arch/arm/v7/operands/shift.h b/src/arch/arm/v7/operands/shift.h
new file mode 100644
index 0000000..e39f6c0
--- /dev/null
+++ b/src/arch/arm/v7/operands/shift.h
@@ -0,0 +1,65 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * args.h - prototypes pour les listes d'opérandes rassemblées en arguments
+ *
+ * Copyright (C) 2010-2012x Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  OpenIDA is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  OpenIDA is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef _ARCH_DALVIK_OPERANDS_ARGS_H
+#define _ARCH_DALVIK_OPERANDS_ARGS_H
+
+
+#include <glib-object.h>
+
+
+#include "../pseudo.h"
+#include "../../../operand.h"
+
+
+
+#define G_TYPE_ARMV7_SHIFT_OPERAND                  g_armv7_shift_operand_get_type()
+#define G_ARMV7_SHIFT_OPERAND(obj)                  (G_TYPE_CHECK_INSTANCE_CAST((obj), g_armv7_shift_operand_get_type(), GArmV7ShiftOperand))
+#define G_IS_ARMV7_SHIFT_OPERAND(obj)               (G_TYPE_CHECK_INSTANCE_TYPE((obj), g_armv7_shift_operand_get_type()))
+#define G_ARMV7_SHIFT_OPERAND_CLASS(klass)          (G_TYPE_CHECK_CLASS_CAST((klass), G_TYPE_ARMV7_SHIFT_OPERAND, GArmV7ShiftOperandClass))
+#define G_IS_ARMV7_SHIFT_OPERAND_CLASS(klass)       (G_TYPE_CHECK_CLASS_TYPE((klass), G_TYPE_ARMV7_SHIFT_OPERAND))
+#define G_ARMV7_SHIFT_OPERAND_GET_CLASS(obj)        (G_TYPE_INSTANCE_GET_CLASS((obj), G_TYPE_ARMV7_SHIFT_OPERAND, GArmV7ShiftOperandClass))
+
+
+/* Définition d'un opérande visant une liste d'opérandes Dalvik (instance) */
+typedef struct _GArmV7ShiftOperand GArmV7ShiftOperand;
+
+/* Définition d'un opérande visant une liste d'opérandes Dalvik (classe) */
+typedef struct _GArmV7ShiftOperandClass GArmV7ShiftOperandClass;
+
+
+/* Indique le type défini par la GLib pour une liste d'arguments Dalvik. */
+GType g_armv7_shift_operand_get_type(void);
+
+/* Crée un réceptacle pour opérandes Dalvik servant d'arguments. */
+GArchOperand *g_armv7_shift_operand_new(SRType, GArchOperand *);
+
+/* Indique la forme de décallage représenté. */
+SRType g_armv7_shift_operand_get_shift_type(const GArmV7ShiftOperand *);
+
+/* Founit la valeur utilisée pour un décallage. */
+GArchOperand *g_armv7_shift_operand_get_shift_value(const GArmV7ShiftOperand *);
+
+
+
+#endif  /* _ARCH_DALVIK_OPERANDS_ARGS_H */
diff --git a/src/arch/arm/v7/pseudo.c b/src/arch/arm/v7/pseudo.c
index 4736309..aac8bb7 100644
--- a/src/arch/arm/v7/pseudo.c
+++ b/src/arch/arm/v7/pseudo.c
@@ -28,6 +28,9 @@
 #include <libio.h>
 
 
+#include "../../../common/bconst.h"
+
+
 
 /******************************************************************************
 *                                                                             *
@@ -367,6 +370,116 @@ uint32_t armv7_arm_expand_imm(uint32_t imm12)
 
 /******************************************************************************
 *                                                                             *
+*  Paramètres  : type2 = type de décallage encodé sur 2 bits.                 *
+*                imm5  = valeur de décallage entière sur 5 bits.              *
+*                type  = type de décallage à constituer. [OUT]                *
+*                value = valeur pleine et entière à utiliser. [OUT]           *
+*                                                                             *
+*  Description : Traduit la fonction 'DecodeImmShift'.                        *
+*                                                                             *
+*  Retour      : Bilan de l'opération.                                        *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+bool armv7_decode_imm_shift(uint8_t type2, uint8_t imm5, SRType *type, uint32_t *value)
+{
+    bool result;                            /* Bilan à retourner           */
+
+    result = true;
+
+    switch (type2)
+    {
+        case b00:
+            *type = SRType_LSL;
+            *value = imm5;
+            break;
+
+        case b01:
+            *type = SRType_LSR;
+            *value = (imm5 == 0 ? 32 : imm5);
+            break;
+
+        case b10:
+            *type = SRType_ASR;
+            *value = (imm5 == 0 ? 32 : imm5);
+            break;
+
+        case b11:
+            if (imm5 == 0)
+            {
+                *type = SRType_RRX;
+                *value = 1;
+            }
+            else
+            {
+                *type = SRType_ROR;
+                *value = imm5;
+            }
+            break;
+
+        default:
+            result = false;
+            break;
+
+    }
+
+    return result;
+
+}
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : type2 = type de décallage encodé sur 2 bits.                 *
+*                type  = type de décallage à constituer. [OUT]                *
+*                                                                             *
+*  Description : Traduit la fonction 'DecodeRegShift'.                        *
+*                                                                             *
+*  Retour      : Bilan de l'opération.                                        *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+bool armv7_decode_reg_shift(uint8_t type2, SRType *type)
+{
+    bool result;                            /* Bilan à retourner           */
+
+    result = true;
+
+    switch (type2)
+    {
+        case b00:
+            *type = SRType_LSL;
+            break;
+
+        case b01:
+            *type = SRType_LSR;
+            break;
+
+        case b10:
+            *type = SRType_ASR;
+            break;
+
+        case b11:
+			*type = SRType_ROR;
+            break;
+
+        default:
+            result = false;
+            break;
+
+    }
+
+    return result;
+
+}
+
+
+/******************************************************************************
+*                                                                             *
 *  Paramètres  : x      = valeur sur 32 bits maximum à traiter.               *
 *                n      = nombre de bits à prendre en compte.                 *
 *                type   = type d'opération à mener.                           *
diff --git a/src/arch/arm/v7/pseudo.h b/src/arch/arm/v7/pseudo.h
index e46c3fc..5645234 100644
--- a/src/arch/arm/v7/pseudo.h
+++ b/src/arch/arm/v7/pseudo.h
@@ -96,6 +96,12 @@ typedef enum _SRType
 } SRType;
 
 
+/* Traduit la fonction 'DecodeImmShift'. */
+bool armv7_decode_imm_shift(uint8_t, uint8_t, SRType *, uint32_t *);
+
+/* Traduit la fonction 'DecodeRegShift'. */
+bool armv7_decode_reg_shift(uint8_t, SRType *);
+
 /* Traduit la fonction 'Shift_C'. */
 uint32_t armv7_shift_c(uint32_t, unsigned int, SRType, unsigned int, bool *);
 
diff --git a/tools/d2c/syntax.c b/tools/d2c/syntax.c
index 5fec1a6..8947810 100644
--- a/tools/d2c/syntax.c
+++ b/tools/d2c/syntax.c
@@ -35,8 +35,9 @@
 /* Propriétés particulières pour les opérandes */
 typedef enum _SyntaxItemFlags
 {
-    SIF_NONE    = (0 << 0),                 /* Aucune propriété            */
-    SIF_DECIMAL = (1 << 0)                  /* Affichage en décimal        */
+    SIF_NONE     = (0 << 0),                /* Aucune propriété            */
+    SIF_DECIMAL  = (1 << 0),                /* Affichage en décimal        */
+    SIF_OPTIONAL = (1 << 1)                 /* Absence tolérée             */
 
 } SyntaxItemFlags;
 
@@ -144,6 +145,11 @@ void register_syntax_item(asm_syntax *syntax, char *name, bool internal)
                 memmove(name, name + 1, len);
                 break;
 
+            case '?':
+                item->flags |= SIF_OPTIONAL;
+                memmove(name, name + 1, len);
+                break;
+
             default:
                 len = 1;
                 break;
-- 
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