From 172fce9bab61de1ffa89f731b5d10f96e209afc1 Mon Sep 17 00:00:00 2001
From: Cyrille Bagard <nocbos@gmail.com>
Date: Wed, 3 Dec 2014 22:41:29 +0000
Subject: Begun to support more than the only 'ARMv7' architecture for ARM (ARM
/ Thumb16 / Thumb32).
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@433 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
---
ChangeLog | 57 +++
src/arch/arm/v7/arm.c | 292 ++++++---------
src/arch/arm/v7/arm.h | 2 +-
src/arch/arm/v7/build_tmp_decl.sh | 6 +-
src/arch/arm/v7/helpers.h | 60 ++-
src/arch/arm/v7/opcodes/Makefile.am | 112 ++++--
src/arch/arm/v7/opcodes/opcodes_tmp_arm.h | 24 ++
src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h | 1 -
src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h | 36 +-
src/arch/arm/v7/opdefs/Makefile.am | 28 +-
src/arch/arm/v7/opdefs/mov_A88102.d | 6 +-
src/arch/arm/v7/processor.c | 5 +-
src/arch/arm/v7/pseudo.c | 253 +++++++++----
src/arch/arm/v7/pseudo.h | 41 +-
src/arch/arm/v7/thumb_16.c | 500 ++++++++++++-------------
src/arch/arm/v7/thumb_32.c | 151 ++++----
tools/d2c/coder.c | 20 +-
tools/d2c/conv.c | 25 +-
tools/d2c/rules.c | 14 +-
tools/d2c/rules.h | 2 +-
tools/d2c/spec.c | 5 +-
tools/d2c/spec.h | 2 +-
22 files changed, 948 insertions(+), 694 deletions(-)
create mode 100644 src/arch/arm/v7/opcodes/opcodes_tmp_arm.h
diff --git a/ChangeLog b/ChangeLog
index e5c5b1e..b178b64 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,60 @@
+14-12-03 Cyrille Bagard <nocbos@gmail.com>
+
+ * src/arch/arm/v7/arm.c:
+ * src/arch/arm/v7/arm.h:
+ Rename all calls to the new decoding functions.
+
+ * src/arch/arm/v7/build_tmp_decl.sh:
+ Fix a bug when looking for matching names and a typo.
+
+ * src/arch/arm/v7/helpers.h:
+ Implement ThumbExpandImm_C and ThumbExpandImm pseudo functions
+ and update the code.
+
+ * src/arch/arm/v7/opcodes/Makefile.am:
+ Update libarcharmv7opcodes_la_SOURCES.
+
+ * src/arch/arm/v7/opcodes/opcodes_tmp_arm.h:
+ New entry: define missing prototypes.
+
+ * src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h:
+ * src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h:
+ Update missing prototypes.
+
+ * src/arch/arm/v7/opdefs/Makefile.am:
+ Begin to support more than the only 'ARMv7' architecture for ARM
+ (ARM / Thumb16 / Thumb32).
+
+ * src/arch/arm/v7/opdefs/mov_A88102.d:
+ Fix mistakes with 'ZeroExtend' usage.
+
+ * src/arch/arm/v7/processor.c:
+ Try to decode 32-bit Thumb instructions.
+
+ * src/arch/arm/v7/pseudo.c:
+ * src/arch/arm/v7/pseudo.h:
+ Implement 'ThumbExpandImm_C' and 'ThumbExpandImm' and rewrite all
+ functions to use a proper return error code.
+
+ * src/arch/arm/v7/thumb_16.c:
+ Convert tabulations.
+
+ * src/arch/arm/v7/thumb_32.c:
+ Convert tabulations. Fix small mistakes.
+
+ * tools/d2c/coder.c:
+ Define better header guard names and filenames. Extend the name of
+ decoding functions by using a sub arch name.
+
+ * tools/d2c/conv.c:
+ Declare all needed bit fields.
+
+ * tools/d2c/rules.c:
+ * tools/d2c/rules.h:
+ * tools/d2c/spec.c:
+ * tools/d2c/spec.h:
+ Use the new full name of decoding functions when writing rules.
+
14-12-02 Cyrille Bagard <nocbos@gmail.com>
* tools/d2c/bits.c:
diff --git a/src/arch/arm/v7/arm.c b/src/arch/arm/v7/arm.c
index ea9819c..60e0e22 100644
--- a/src/arch/arm/v7/arm.c
+++ b/src/arch/arm/v7/arm.c
@@ -27,112 +27,58 @@
#include <stdint.h>
-#include "opcodes/opcodes.h"
+#include "opcodes/arm_opcodes.h"
+#include "opcodes/opcodes_tmp_arm.h"
#include "../../../common/bconst.h"
/* Désassemble une instruction ARMv7 de données ou autre. */
-static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instructions(uint32_t);
+static GArchInstruction *process_armv7_arm_data_processing_and_miscellaneous_instructions(uint32_t);
/* Désassemble une instruction ARMv7 de données de registre. */
-static GArchInstruction *process_armv7_data_processing_register(uint32_t);
+static GArchInstruction *process_armv7_arm_data_processing_register(uint32_t);
/* Désassemble une instruction ARMv7 de données de immédiate. */
-static GArchInstruction *process_armv7_data_processing_immediate(uint32_t);
+static GArchInstruction *process_armv7_arm_data_processing_immediate(uint32_t);
/* Désassemble une instruction ARMv7 liées aux multiplications. */
-static GArchInstruction *process_armv7_multiply_and_multiply_accumulate(uint32_t);
+static GArchInstruction *process_armv7_arm_multiply_and_multiply_accumulate(uint32_t);
/* Désassemble une instruction ARMv7 de données ou autre. */
-static GArchInstruction *process_armv7_branch_branch_with_link_and_block_data_transfer(uint32_t);
+static GArchInstruction *process_armv7_arm_branch_branch_with_link_and_block_data_transfer(uint32_t);
-// process_armv7_instruction_set_encoding
+// process_armv7_arm_instruction_set_encoding
-#define process_armv7_load_store_word_and_unsigned_byte(raw) NULL
-#define process_armv7_load_store_word_and_unsigned_byte(raw) NULL
-#define process_armv7_media_instructions(raw) NULL
-//#define process_armv7_branch_branch_with_link_and_block_data_transfer(raw) NULL
-#define process_armv7_coprocessor_instructions_and_Supervisor_call(raw) NULL
-#define process_armv7_unconditional_instructions(raw) NULL
+#define process_armv7_arm_load_store_word_and_unsigned_byte(raw) NULL
+#define process_armv7_arm_load_store_word_and_unsigned_byte(raw) NULL
+#define process_armv7_arm_media_instructions(raw) NULL
+//#define process_armv7_arm_branch_branch_with_link_and_block_data_transfer(raw) NULL
+#define process_armv7_arm_coprocessor_instructions_and_Supervisor_call(raw) NULL
+#define process_armv7_arm_unconditional_instructions(raw) NULL
-// process_armv7_data_processing_and_miscellaneous_instructions
+// process_armv7_arm_data_processing_and_miscellaneous_instructions
-#define process_armv7_data_processing_register_shifted_register(raw) NULL
-#define process_armv7_extra_load_store_instructions(raw) NULL
-#define process_armv7_miscellaneous_instructions(raw) NULL
-#define process_armv7_halfword_multiply_and_multiply_accumulate(raw) NULL
-//#define process_armv7_multiply_and_multiply_accumulate(raw) NULL
-#define process_armv7_synchronization_primitives(raw) NULL
-#define process_armv7_extra_load_store_instructions_unprivileged(raw) NULL
-#define process_armv7_extra_load_store_instructions(raw) NULL
-//#define process_armv7_data_processing_immediate(raw) NULL
-#define armv7_read_instr_mov_immediate(raw) NULL
-#define armv7_read_instr_movt(raw) NULL
-#define process_armv7_msr_immediate_and_hints(raw) NULL
+#define process_armv7_arm_data_processing_register_shifted_register(raw) NULL
+#define process_armv7_arm_extra_load_store_instructions(raw) NULL
+#define process_armv7_arm_miscellaneous_instructions(raw) NULL
+#define process_armv7_arm_halfword_multiply_and_multiply_accumulate(raw) NULL
+//#define process_armv7_arm_multiply_and_multiply_accumulate(raw) NULL
+#define process_armv7_arm_synchronization_primitives(raw) NULL
+#define process_armv7_arm_extra_load_store_instructions_unprivileged(raw) NULL
+#define process_armv7_arm_extra_load_store_instructions(raw) NULL
+//#define process_armv7_arm_data_processing_immediate(raw) NULL
+#define process_armv7_arm_msr_immediate_and_hints(raw) NULL
-// process_armv7_data_processing_register
-/*
-#define armv7_read_instr_and_register(raw) NULL
-#define armv7_read_instr_eor_register(raw) NULL
-#define armv7_read_instr_sub_register(raw) NULL
-#define armv7_read_instr_rsb_register(raw) NULL
-#define armv7_read_instr_add_register_arm(raw) NULL
-#define armv7_read_instr_adc_register(raw) NULL
-#define armv7_read_instr_sbc_register(raw) NULL
-#define armv7_read_instr_rsc_register(raw) NULL
-#define armv7_read_instr_tst_register(raw) NULL
-#define armv7_read_instr_teq_register(raw) NULL
-#define armv7_read_instr_cmp_register(raw) NULL
-#define armv7_read_instr_cmn_register(raw) NULL
-#define armv7_read_instr_orr_register(raw) NULL
-*/
-//#define armv7_read_instr_mov_register_arm(raw) NULL
-#define armv7_read_instr_lsl_immediate(raw) NULL
-#define armv7_read_instr_lsr_immediate(raw) NULL
-#define armv7_read_instr_asr_immediate(raw) NULL
-#define armv7_read_instr_rrx(raw) NULL
-#define armv7_read_instr_ror_immediate(raw) NULL
-//#define armv7_read_instr_bic_register(raw) NULL
-//#define armv7_read_instr_mvn_register(raw) NULL
+// process_armv7_arm_data_processing_register
-// process_armv7_branch_branch_with_link_and_block_data_transfer
-
-#define armv7_read_instr_stmda_stmed(raw) NULL
-#define armv7_read_instr_ldmda_ldmfa(raw) NULL
-#define armv7_read_instr_stm_stmia_stmea(raw) NULL
-#define armv7_read_instr_ldm_ldmia_ldmfd_arm(raw) NULL
-#define armv7_read_instr_ldm_ldmia_ldmfd_arm(raw) NULL
-#define armv7_read_instr_pop_arm(raw) NULL
-#define armv7_read_instr_stmdb_stmfd(raw) NULL
-#define armv7_read_instr_stmdb_stmfd(raw) NULL
-#define armv7_read_instr_push(raw) NULL
-#define armv7_read_instr_ldmdb_ldmea(raw) NULL
-#define armv7_read_instr_stmib_stmfa(raw) NULL
-#define armv7_read_instr_ldmib_ldmed(raw) NULL
-#define armv7_read_instr_stm_user_registers(raw) NULL
-#define armv7_read_instr_ldm_user_registers(raw) NULL
-#define armv7_read_instr_ldm_exception_return(raw) NULL
-#define armv7_read_instr_b(raw) NULL
-//#define armv7_read_instr_bl_blx_immediate(raw) NULL
-
-
-
-#define armv7_read_instr_adr(raw) NULL
-
-
-
-// ???
-#define armv7_read_instr_yield(raw) NULL
-#define armv7_read_instr_bx(raw) NULL
-
@@ -149,7 +95,7 @@ static GArchInstruction *process_armv7_branch_branch_with_link_and_block_data_tr
* *
******************************************************************************/
-GArchInstruction *process_armv7_instruction_set_encoding(uint32_t raw)
+GArchInstruction *process_armv7_arm_instruction_set_encoding(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t cond; /* Champ 'cond' à retrouver */
@@ -170,31 +116,31 @@ GArchInstruction *process_armv7_instruction_set_encoding(uint32_t raw)
if (cond != b1111)
{
if ((op1 & b110) == b000)
- result = process_armv7_data_processing_and_miscellaneous_instructions(raw);
+ result = process_armv7_arm_data_processing_and_miscellaneous_instructions(raw);
else if (op1 == b010)
- result = process_armv7_load_store_word_and_unsigned_byte(raw);
+ result = process_armv7_arm_load_store_word_and_unsigned_byte(raw);
else if (op1 == b011)
{
if (op == b0)
- result = process_armv7_load_store_word_and_unsigned_byte(raw);
+ result = process_armv7_arm_load_store_word_and_unsigned_byte(raw);
else
- result = process_armv7_media_instructions(raw);
+ result = process_armv7_arm_media_instructions(raw);
}
else if ((op1 & b110) == b100)
- result = process_armv7_branch_branch_with_link_and_block_data_transfer(raw);
+ result = process_armv7_arm_branch_branch_with_link_and_block_data_transfer(raw);
else if ((op1 & b110) == b110)
- result = process_armv7_coprocessor_instructions_and_Supervisor_call(raw);
+ result = process_armv7_arm_coprocessor_instructions_and_Supervisor_call(raw);
}
else /* if (cond == b1111) */
- result = process_armv7_unconditional_instructions(raw);
+ result = process_armv7_arm_unconditional_instructions(raw);
return result;
@@ -213,7 +159,7 @@ GArchInstruction *process_armv7_instruction_set_encoding(uint32_t raw)
* *
******************************************************************************/
-static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instructions(uint32_t raw)
+static GArchInstruction *process_armv7_arm_data_processing_and_miscellaneous_instructions(uint32_t raw)
{
GArchInstruction *result; /* Instruction à retourner */
uint32_t op; /* Champ 'op' à retrouver */
@@ -236,10 +182,10 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
if ((op1 & b11001) != b10000)
{
if ((op2 & b0001) == b0000)
- result = process_armv7_data_processing_register(raw);
+ result = process_armv7_arm_data_processing_register(raw);
else if ((op2 & b1001) == b0001)
- result = process_armv7_data_processing_register_shifted_register(raw);
+ result = process_armv7_arm_data_processing_register_shifted_register(raw);
if (result != NULL) goto padpami_found;
@@ -248,10 +194,10 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
else /* if ((op1 & b11001) == b10000) */
{
if ((op2 & b1000) == b0000)
- result = process_armv7_miscellaneous_instructions(raw);
+ result = process_armv7_arm_miscellaneous_instructions(raw);
else if ((op2 & b1001) == b1000)
- result = process_armv7_halfword_multiply_and_multiply_accumulate(raw);
+ result = process_armv7_arm_halfword_multiply_and_multiply_accumulate(raw);
if (result != NULL) goto padpami_found;
@@ -260,7 +206,7 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
if ((op1 & b10000) == b00000)
{
if (op2 == b1001)
- result = process_armv7_multiply_and_multiply_accumulate(raw);
+ result = process_armv7_arm_multiply_and_multiply_accumulate(raw);
if (result != NULL) goto padpami_found;
@@ -269,7 +215,7 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
if ((op1 & b10000) == b10000)
{
if (op2 == b1001)
- result = process_armv7_synchronization_primitives(raw);
+ result = process_armv7_arm_synchronization_primitives(raw);
if (result != NULL) goto padpami_found;
@@ -278,10 +224,10 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
if ((op1 & b10010) != b00010)
{
if (op2 == b1011)
- result = process_armv7_extra_load_store_instructions(raw);
+ result = process_armv7_arm_extra_load_store_instructions(raw);
else if ((op2 & b1101) == b1101)
- result = process_armv7_extra_load_store_instructions(raw);
+ result = process_armv7_arm_extra_load_store_instructions(raw);
if (result != NULL) goto padpami_found;
@@ -290,10 +236,10 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
else /* if ((op1 & b10010) != b00010) */
{
if (op2 == b1011)
- result = process_armv7_extra_load_store_instructions_unprivileged(raw);
+ result = process_armv7_arm_extra_load_store_instructions_unprivileged(raw);
else if ((op2 & b1101) == b1101)
- result = process_armv7_extra_load_store_instructions(raw);
+ result = process_armv7_arm_extra_load_store_instructions(raw);
if (result != NULL) goto padpami_found;
@@ -304,16 +250,16 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
else
{
if ((op1 & b11001) != b10000)
- result = process_armv7_data_processing_immediate(raw);
+ result = process_armv7_arm_data_processing_immediate(raw);
else if (op1 == b10000)
- result = armv7_read_instr_mov_immediate(raw);
+ result = armv7_read_arm_instr_mov_immediate(raw);
else if (op1 == b10100)
- result = armv7_read_instr_movt(raw);
+ result = armv7_read_arm_instr_movt(raw);
else if ((op1 & b11011) == b10010)
- result = process_armv7_msr_immediate_and_hints(raw);
+ result = process_armv7_arm_msr_immediate_and_hints(raw);
}
@@ -336,7 +282,7 @@ static GArchInstruction *process_armv7_data_processing_and_miscellaneous_instruc
* *
******************************************************************************/
-static GArchInstruction *process_armv7_data_processing_register(uint32_t raw)
+static GArchInstruction *process_armv7_arm_data_processing_register(uint32_t raw)
{
GArchInstruction *result; /* Instruction à retourner */
uint32_t op; /* Champ 'op' à retrouver */
@@ -355,84 +301,84 @@ static GArchInstruction *process_armv7_data_processing_register(uint32_t raw)
op2 = (raw >> 5) & 0x3;
if ((op & b11110) == b00000)
- result = armv7_read_instr_and_register(raw);
+ result = armv7_read_arm_instr_and_register(raw);
else if ((op & b11110) == b00010)
- result = armv7_read_instr_eor_register(raw);
+ result = armv7_read_arm_instr_eor_register(raw);
else if ((op & b11110) == b00100)
- result = armv7_read_instr_sub_register(raw);
+ result = armv7_read_arm_instr_sub_register(raw);
else if ((op & b11110) == b00110)
- result = armv7_read_instr_rsb_register(raw);
+ result = armv7_read_arm_instr_rsb_register(raw);
else if ((op & b11110) == b01000)
- result = armv7_read_instr_add_register_arm(raw);
+ result = armv7_read_arm_instr_add_register_arm(raw);
else if ((op & b11110) == b01010)
- result = armv7_read_instr_adc_register(raw);
+ result = armv7_read_arm_instr_adc_register(raw);
else if ((op & b11110) == b01100)
- result = armv7_read_instr_sbc_register(raw);
+ result = armv7_read_arm_instr_sbc_register(raw);
else if ((op & b11110) == b01110)
- result = armv7_read_instr_rsc_register(raw);
+ result = armv7_read_arm_instr_rsc_register(raw);
/*
else if ((op & b11001) == b10000)
- result = process_armv7_data_processing_and_miscellaneous_instructions(raw);
+ result = process_armv7_arm_data_processing_and_miscellaneous_instructions(raw);
*/
else if (op == b10001)
- result = armv7_read_instr_tst_register(raw);
+ result = armv7_read_arm_instr_tst_register(raw);
else if (op == b10011)
- result = armv7_read_instr_teq_register(raw);
+ result = armv7_read_arm_instr_teq_register(raw);
else if (op == b10101)
- result = armv7_read_instr_cmp_register(raw);
+ result = armv7_read_arm_instr_cmp_register(raw);
else if (op == b10111)
- result = armv7_read_instr_cmn_register(raw);
+ result = armv7_read_arm_instr_cmn_register(raw);
else if ((op & b11110) == b11000)
- result = armv7_read_instr_orr_register(raw);
+ result = armv7_read_arm_instr_orr_register(raw);
else if ((op & b11110) == b11010)
{
if (op2 == b00)
{
if (imm5 == b00000)
- result = armv7_read_instr_mov_register_arm(raw);
+ result = armv7_read_arm_instr_mov_register_arm(raw);
else
- result = armv7_read_instr_lsl_immediate(raw);
+ result = armv7_read_arm_instr_lsl_immediate(raw);
}
else if (op2 == b01)
- result = armv7_read_instr_lsr_immediate(raw);
+ result = armv7_read_arm_instr_lsr_immediate(raw);
else if (op2 == b10)
- result = armv7_read_instr_asr_immediate(raw);
+ result = armv7_read_arm_instr_asr_immediate(raw);
else if (op2 == b11)
{
if (imm5 == b00000)
- result = armv7_read_instr_rrx(raw);
+ result = armv7_read_arm_instr_rrx(raw);
else
- result = armv7_read_instr_ror_immediate(raw);
+ result = armv7_read_arm_instr_ror_immediate(raw);
}
}
else if ((op & b11110) == b11100)
- result = armv7_read_instr_bic_register(raw);
+ result = armv7_read_arm_instr_bic_register(raw);
else if ((op & b11110) == b11110)
- result = armv7_read_instr_mvn_register(raw);
+ result = armv7_read_arm_instr_mvn_register(raw);
return result;
@@ -457,7 +403,7 @@ static GArchInstruction *process_armv7_data_processing_register(uint32_t raw)
* *
******************************************************************************/
-static GArchInstruction *process_armv7_data_processing_immediate(uint32_t raw)
+static GArchInstruction *process_armv7_arm_data_processing_immediate(uint32_t raw)
{
GArchInstruction *result; /* Instruction à retourner */
uint32_t op; /* Champ 'op' à retrouver */
@@ -474,71 +420,71 @@ static GArchInstruction *process_armv7_data_processing_immediate(uint32_t raw)
rn = (raw >> 16) & 0xf;
if ((op & b11110) == b00000)
- result = armv7_read_instr_and_immediate(raw);
+ result = armv7_read_arm_instr_and_immediate(raw);
else if ((op & b11110) == b00010)
- result = armv7_read_instr_eor_immediate(raw);
+ result = armv7_read_arm_instr_eor_immediate(raw);
else if ((op & b11110) == b00100)
{
if (rn == b1111)
- result = armv7_read_instr_adr(raw);
+ result = armv7_read_arm_instr_adr(raw);
else
- result = armv7_read_instr_sub_immediate_arm(raw);
+ result = armv7_read_arm_instr_sub_immediate_arm(raw);
}
else if ((op & b11110) == b00110)
- result = armv7_read_instr_rsb_immediate(raw);
+ result = armv7_read_arm_instr_rsb_immediate(raw);
else if ((op & b11110) == b01000)
{
if (rn == b1111)
- result = armv7_read_instr_adr(raw);
+ result = armv7_read_arm_instr_adr(raw);
else
- result = armv7_read_instr_add_immediate_arm(raw);
+ result = armv7_read_arm_instr_add_immediate_arm(raw);
}
else if ((op & b11110) == b01010)
- result = armv7_read_instr_adc_immediate(raw);
+ result = armv7_read_arm_instr_adc_immediate(raw);
else if ((op & b11110) == b01100)
- result = armv7_read_instr_sbc_immediate(raw);
+ result = armv7_read_arm_instr_sbc_immediate(raw);
else if ((op & b11110) == b01110)
- result = armv7_read_instr_rsc_immediate(raw);
+ result = armv7_read_arm_instr_rsc_immediate(raw);
/*
else if ((op & b11110) == b10000)
- result = process_armv7_data_processing_and_miscellaneous_instructions(raw);
+ result = process_armv7_arm_data_processing_and_miscellaneous_instructions(raw);
*/
else if (op == b10001)
- result = armv7_read_instr_tst_immediate(raw);
+ result = armv7_read_arm_instr_tst_immediate(raw);
else if (op == b10011)
- result = armv7_read_instr_teq_immediate(raw);
+ result = armv7_read_arm_instr_teq_immediate(raw);
else if (op == b10101)
- result = armv7_read_instr_cmp_immediate(raw);
+ result = armv7_read_arm_instr_cmp_immediate(raw);
else if (op == b10111)
- result = armv7_read_instr_cmn_immediate(raw);
+ result = armv7_read_arm_instr_cmn_immediate(raw);
else if ((op & b11110) == b11000)
- result = armv7_read_instr_orr_immediate(raw);
+ result = armv7_read_arm_instr_orr_immediate(raw);
else if ((op & b11110) == b11010)
- result = armv7_read_instr_mov_immediate(raw);
+ result = armv7_read_arm_instr_mov_immediate(raw);
else if ((op & b11110) == b11100)
- result = armv7_read_instr_bic_immediate(raw);
+ result = armv7_read_arm_instr_bic_immediate(raw);
else if ((op & b11110) == b11110)
- result = armv7_read_instr_mvn_immediate(raw);
+ result = armv7_read_arm_instr_mvn_immediate(raw);
return result;
@@ -567,7 +513,7 @@ static GArchInstruction *process_armv7_data_processing_immediate(uint32_t raw)
* *
******************************************************************************/
-static GArchInstruction *process_armv7_multiply_and_multiply_accumulate(uint32_t raw)
+static GArchInstruction *process_armv7_arm_multiply_and_multiply_accumulate(uint32_t raw)
{
GArchInstruction *result; /* Instruction à retourner */
uint32_t op; /* Champ 'op' à retrouver */
@@ -585,34 +531,34 @@ static GArchInstruction *process_armv7_multiply_and_multiply_accumulate(uint32_t
op = (raw >> 20) & 0x1f;
if ((op & b1110) == b0000)
- result = armv7_read_instr_mul(raw);
+ result = armv7_read_arm_instr_mul(raw);
else if ((op & b1110) == b0010)
- result = armv7_read_instr_mla(raw);
+ result = armv7_read_arm_instr_mla(raw);
else if (op == b0100)
- result = armv7_read_instr_umaal(raw);
+ result = armv7_read_arm_instr_umaal(raw);
else if (op == b0101)
result = NULL; /* Non défini */
else if (op == b0110)
- result = armv7_read_instr_mls(raw);
+ result = armv7_read_arm_instr_mls(raw);
else if (op == b0111)
result = NULL; /* Non défini */
else if ((op & b1110) == b1000)
- result = armv7_read_instr_umull(raw);
+ result = armv7_read_arm_instr_umull(raw);
else if ((op & b1110) == b1010)
- result = armv7_read_instr_umlal(raw);
+ result = armv7_read_arm_instr_umlal(raw);
else if ((op & b1110) == b1100)
- result = armv7_read_instr_smull(raw);
+ result = armv7_read_arm_instr_smull(raw);
else if ((op & b1110) == b1110)
- result = armv7_read_instr_smlal(raw);
+ result = armv7_read_arm_instr_smlal(raw);
return result;
@@ -637,7 +583,7 @@ static GArchInstruction *process_armv7_multiply_and_multiply_accumulate(uint32_t
* *
******************************************************************************/
-static GArchInstruction *process_armv7_branch_branch_with_link_and_block_data_transfer(uint32_t raw)
+static GArchInstruction *process_armv7_arm_branch_branch_with_link_and_block_data_transfer(uint32_t raw)
{
GArchInstruction *result; /* Instruction à retourner */
uint32_t op; /* Champ 'op' à retrouver */
@@ -656,61 +602,61 @@ static GArchInstruction *process_armv7_branch_branch_with_link_and_block_data_tr
r = (raw >> 15) & 0x1;
if ((op & b111101) == b000000)
- result = armv7_read_instr_stmda_stmed(raw);
+ result = armv7_read_arm_instr_stmda_stmed(raw);
else if ((op & b111101) == b000001)
- result = armv7_read_instr_ldmda_ldmfa(raw);
+ result = armv7_read_arm_instr_ldmda_ldmfa(raw);
else if ((op & b111101) == b001000)
- result = armv7_read_instr_stm_stmia_stmea(raw);
+ result = armv7_read_arm_instr_stm_stmia_stmea(raw);
else if (op == b001001)
- result = armv7_read_instr_ldm_ldmia_ldmfd_arm(raw);
+ result = armv7_read_arm_instr_ldm_ldmia_ldmfd_arm(raw);
else if (op == b001011)
{
if (rn != b1101)
- result = armv7_read_instr_ldm_ldmia_ldmfd_arm(raw);
+ result = armv7_read_arm_instr_ldm_ldmia_ldmfd_arm(raw);
else /* if (rn == b1101) */
- result = armv7_read_instr_pop_arm(raw);
+ result = armv7_read_arm_instr_pop_arm(raw);
}
else if (op == b010000)
- result = armv7_read_instr_stmdb_stmfd(raw);
+ result = armv7_read_arm_instr_stmdb_stmfd(raw);
else if (op == b010010)
{
if (rn != b1101)
- result = armv7_read_instr_stmdb_stmfd(raw);
+ result = armv7_read_arm_instr_stmdb_stmfd(raw);
else /* if (rn == b1101) */
- result = armv7_read_instr_push(raw);
+ result = armv7_read_arm_instr_push(raw);
}
else if ((op & b111101) == b010001)
- result = armv7_read_instr_ldmdb_ldmea(raw);
+ result = armv7_read_arm_instr_ldmdb_ldmea(raw);
else if ((op & b111101) == b011000)
- result = armv7_read_instr_stmib_stmfa(raw);
+ result = armv7_read_arm_instr_stmib_stmfa(raw);
else if ((op & b111101) == b011001)
- result = armv7_read_instr_ldmib_ldmed(raw);
+ result = armv7_read_arm_instr_ldmib_ldmed(raw);
else if ((op & b100101) == b000100)
- result = armv7_read_instr_stm_user_registers(raw);
+ result = armv7_read_arm_instr_stm_user_registers(raw);
else if ((op & b100101) == b000101)
{
if (r == b0)
- result = armv7_read_instr_ldm_user_registers(raw);
+ result = armv7_read_arm_instr_ldm_user_registers(raw);
else /* if (r == b1) */
- result = armv7_read_instr_ldm_exception_return(raw);
+ result = armv7_read_arm_instr_ldm_exception_return(raw);
}
else if ((op & b110000) == b100000)
- result = armv7_read_instr_b(raw);
+ result = armv7_read_arm_instr_b(raw);
else if ((op & b110000) == b110000)
- result = armv7_read_instr_bl_blx_immediate(raw);
+ result = armv7_read_arm_instr_bl_blx_immediate(raw);
return result;
diff --git a/src/arch/arm/v7/arm.h b/src/arch/arm/v7/arm.h
index 3b6aa3d..2a751a5 100644
--- a/src/arch/arm/v7/arm.h
+++ b/src/arch/arm/v7/arm.h
@@ -30,7 +30,7 @@
/* Désassemble une instruction ARMv7 classique. */
-GArchInstruction *process_armv7_instruction_set_encoding(uint32_t raw);
+GArchInstruction *process_armv7_arm_instruction_set_encoding(uint32_t raw);
diff --git a/src/arch/arm/v7/build_tmp_decl.sh b/src/arch/arm/v7/build_tmp_decl.sh
index 1236e81..1833f1b 100755
--- a/src/arch/arm/v7/build_tmp_decl.sh
+++ b/src/arch/arm/v7/build_tmp_decl.sh
@@ -2,7 +2,7 @@
arch=$1
-header="opcodes/opcodes_$arch.h"
+header="opcodes/${arch}_opcodes.h"
headertmp="opcodes/opcodes_tmp_$arch.h"
echo "#ifndef ${arch}_def_tmp_h" > $headertmp
@@ -16,14 +16,14 @@ for n in $needed; do
echo " $n..."
- grep -q $n $header
+ grep -q "$n(" $header
if [ $? -ne 0 ]; then
echo "#define $n(r) NULL" >> $headertmp
else
- echo "$n foudn in $header"
+ echo "$n found in $header"
fi
diff --git a/src/arch/arm/v7/helpers.h b/src/arch/arm/v7/helpers.h
index d72bb88..394302b 100644
--- a/src/arch/arm/v7/helpers.h
+++ b/src/arch/arm/v7/helpers.h
@@ -36,20 +36,56 @@
-#define ARMExpandImm_C(imm12, c) \
- ({ \
- uint32_t __val; \
- __val = armv7_arm_expand_imm_c(imm12, (bool []) { c }); \
- g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \
+#define ARMExpandImm_C(imm12, c) \
+ ({ \
+ GArchOperand *__result; \
+ uint32_t __val; \
+ if (armv7_arm_expand_imm_c(imm12, (bool []) { c }, &__val)) \
+ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \
+ else \
+ __result = NULL; \
+ __result; \
})
-#define ARMExpandImm(imm12) \
- ({ \
- uint32_t __val; \
- __val = armv7_arm_expand_imm_c(imm12, NULL); \
- g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \
+#define ARMExpandImm(imm12) \
+ ({ \
+ GArchOperand *__result; \
+ uint32_t __val; \
+ if (armv7_arm_expand_imm(imm12, &__val)) \
+ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \
+ else \
+ __result = NULL; \
+ __result; \
})
+#define ThumbExpandImm_C(imm12, c) \
+ ({ \
+ GArchOperand *__result; \
+ uint32_t __val; \
+ if (armv7_thumb_expand_imm_c(imm12, (bool []) { c }, &__val)) \
+ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \
+ else \
+ __result = NULL; \
+ __result; \
+ })
+
+#define ThumbExpandImm(imm12) \
+ ({ \
+ GArchOperand *__result; \
+ uint32_t __val; \
+ if (armv7_thumb_expand_imm(imm12, &__val)) \
+ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \
+ else \
+ __result = NULL; \
+ __result; \
+ })
+
+
+
+
+
+
+
#define DecodeImmShift(type, imm5) \
({ \
GArchOperand *__result; \
@@ -86,7 +122,7 @@ return shift_t;
({ \
MemoryDataSize __mds; \
uint ## i ## _t __val; \
- mds = MDS_ ## sz ## _BITS_UNSIGNED; \
+ __mds = MDS_ ## i ## _BITS_UNSIGNED; \
__val = armv7_zero_extend(x, n, i); \
g_imm_operand_new_from_value(__mds, __val); \
})
@@ -97,7 +133,7 @@ return shift_t;
({ \
MemoryDataSize __mds; \
uint ## i ## _t __val; \
- mds = MDS_ ## sz ## _BITS_UNSIGNED; \
+ __mds = MDS_ ## i ## _BITS_UNSIGNED; \
__val = 0; \
g_imm_operand_new_from_value(__mds, __val); \
})
diff --git a/src/arch/arm/v7/opcodes/Makefile.am b/src/arch/arm/v7/opcodes/Makefile.am
index 9e49c31..b2f5695 100644
--- a/src/arch/arm/v7/opcodes/Makefile.am
+++ b/src/arch/arm/v7/opcodes/Makefile.am
@@ -3,34 +3,90 @@ noinst_LTLIBRARIES = libarcharmv7opcodes.la
# ls *c | grep -v thumb | sort | sed 's/^/\t/' | sed 's/$/\t\t\\/'
libarcharmv7opcodes_la_SOURCES = \
- adc.c \
- add.c \
- and.c \
- bic.c \
- bl.c \
- bx.c \
- cmn.c \
- cmp.c \
- eor.c \
- mla.c \
- mls.c \
- mov.c \
- mul.c \
- mvn.c \
- orr.c \
- rsb.c \
- rsc.c \
- sbc.c \
- smlal.c \
- smull.c \
- sub.c \
- subs.c \
- teq.c \
- tst.c \
- umaal.c \
- umlal.c \
- umull.c \
- yield.c
+ arm_adc.c \
+ arm_add.c \
+ arm_and.c \
+ arm_bic.c \
+ arm_bl.c \
+ arm_bx.c \
+ arm_cmn.c \
+ arm_cmp.c \
+ arm_eor.c \
+ arm_mla.c \
+ arm_mls.c \
+ arm_mov.c \
+ arm_mul.c \
+ arm_mvn.c \
+ arm_orr.c \
+ arm_rsb.c \
+ arm_rsc.c \
+ arm_sbc.c \
+ arm_smlal.c \
+ arm_smull.c \
+ arm_sub.c \
+ arm_subs.c \
+ arm_teq.c \
+ arm_tst.c \
+ arm_umaal.c \
+ arm_umlal.c \
+ arm_umull.c \
+ arm_yield.c \
+ thumb_16_adc.c \
+ thumb_16_add.c \
+ thumb_16_and.c \
+ thumb_16_bic.c \
+ thumb_16_bl.c \
+ thumb_16_bx.c \
+ thumb_16_cmn.c \
+ thumb_16_cmp.c \
+ thumb_16_eor.c \
+ thumb_16_mla.c \
+ thumb_16_mls.c \
+ thumb_16_mov.c \
+ thumb_16_mul.c \
+ thumb_16_mvn.c \
+ thumb_16_orr.c \
+ thumb_16_rsb.c \
+ thumb_16_rsc.c \
+ thumb_16_sbc.c \
+ thumb_16_smlal.c \
+ thumb_16_smull.c \
+ thumb_16_sub.c \
+ thumb_16_subs.c \
+ thumb_16_teq.c \
+ thumb_16_tst.c \
+ thumb_16_umaal.c \
+ thumb_16_umlal.c \
+ thumb_16_umull.c \
+ thumb_16_yield.c \
+ thumb_32_adc.c \
+ thumb_32_add.c \
+ thumb_32_and.c \
+ thumb_32_bic.c \
+ thumb_32_bl.c \
+ thumb_32_bx.c \
+ thumb_32_cmn.c \
+ thumb_32_cmp.c \
+ thumb_32_eor.c \
+ thumb_32_mla.c \
+ thumb_32_mls.c \
+ thumb_32_mov.c \
+ thumb_32_mul.c \
+ thumb_32_mvn.c \
+ thumb_32_orr.c \
+ thumb_32_rsb.c \
+ thumb_32_rsc.c \
+ thumb_32_sbc.c \
+ thumb_32_smlal.c \
+ thumb_32_smull.c \
+ thumb_32_sub.c \
+ thumb_32_subs.c \
+ thumb_32_teq.c \
+ thumb_32_tst.c \
+ thumb_32_umaal.c \
+ thumb_32_umlal.c \
+ thumb_32_umull.c \
+ thumb_32_yield.c
libarcharmv7opcodes_la_LIBADD =
diff --git a/src/arch/arm/v7/opcodes/opcodes_tmp_arm.h b/src/arch/arm/v7/opcodes/opcodes_tmp_arm.h
new file mode 100644
index 0000000..82590a4
--- /dev/null
+++ b/src/arch/arm/v7/opcodes/opcodes_tmp_arm.h
@@ -0,0 +1,24 @@
+#ifndef arm_def_tmp_h
+#define arm_def_tmp_h
+#define armv7_read_arm_instr_adr(r) NULL
+#define armv7_read_arm_instr_asr_immediate(r) NULL
+#define armv7_read_arm_instr_b(r) NULL
+#define armv7_read_arm_instr_ldmda_ldmfa(r) NULL
+#define armv7_read_arm_instr_ldmdb_ldmea(r) NULL
+#define armv7_read_arm_instr_ldm_exception_return(r) NULL
+#define armv7_read_arm_instr_ldmib_ldmed(r) NULL
+#define armv7_read_arm_instr_ldm_ldmia_ldmfd_arm(r) NULL
+#define armv7_read_arm_instr_ldm_user_registers(r) NULL
+#define armv7_read_arm_instr_lsl_immediate(r) NULL
+#define armv7_read_arm_instr_lsr_immediate(r) NULL
+#define armv7_read_arm_instr_movt(r) NULL
+#define armv7_read_arm_instr_pop_arm(r) NULL
+#define armv7_read_arm_instr_push(r) NULL
+#define armv7_read_arm_instr_ror_immediate(r) NULL
+#define armv7_read_arm_instr_rrx(r) NULL
+#define armv7_read_arm_instr_stmda_stmed(r) NULL
+#define armv7_read_arm_instr_stmdb_stmfd(r) NULL
+#define armv7_read_arm_instr_stmib_stmfa(r) NULL
+#define armv7_read_arm_instr_stm_stmia_stmea(r) NULL
+#define armv7_read_arm_instr_stm_user_registers(r) NULL
+#endif
diff --git a/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h
index 402e083..3f7e8e5 100644
--- a/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h
+++ b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h
@@ -34,7 +34,6 @@
#define armv7_read_thumb_16_instr_lsl_register(r) NULL
#define armv7_read_thumb_16_instr_lsr_immediate(r) NULL
#define armv7_read_thumb_16_instr_lsr_register(r) NULL
-#define armv7_read_thumb_16_instr_mov_immediate(r) NULL
#define armv7_read_thumb_16_instr_mov_register_thumb(r) NULL
#define armv7_read_thumb_16_instr_mul(r) NULL
#define armv7_read_thumb_16_instr_mvn_register(r) NULL
diff --git a/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h
index 016b7d3..8cd59a0 100644
--- a/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h
+++ b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h
@@ -1,35 +1,22 @@
#ifndef thumb_32_def_tmp_h
#define thumb_32_def_tmp_h
-#define armv7_read_thumb_32_instr_(r) NULL
-#define armv7_read_thumb_32_instr_adc_immediate(r) NULL
-#define armv7_read_thumb_32_instr_adc_register(r) NULL
#define armv7_read_thumb_32_instr_add_immediate_thumb(r) NULL
#define armv7_read_thumb_32_instr_add_register_thumb(r) NULL
#define armv7_read_thumb_32_instr_adr(r) NULL
-#define armv7_read_thumb_32_instr_and_immediate(r) NULL
-#define armv7_read_thumb_32_instr_and_register(r) NULL
#define armv7_read_thumb_32_instr_asr_register(r) NULL
#define armv7_read_thumb_32_instr_b(r) NULL
#define armv7_read_thumb_32_instr_bfc(r) NULL
#define armv7_read_thumb_32_instr_bfi(r) NULL
-#define armv7_read_thumb_32_instr_bic_immediate(r) NULL
-#define armv7_read_thumb_32_instr_bic_register(r) NULL
#define armv7_read_thumb_32_instr_b_mrs(r) NULL
#define armv7_read_thumb_32_instr_b_msr_register(r) NULL
#define armv7_read_thumb_32_instr_bxj(r) NULL
#define armv7_read_thumb_32_instr_clrex(r) NULL
#define armv7_read_thumb_32_instr_clz(r) NULL
-#define armv7_read_thumb_32_instr_cmn_immediate(r) NULL
-#define armv7_read_thumb_32_instr_cmn_register(r) NULL
-#define armv7_read_thumb_32_instr_cmp_immediate(r) NULL
-#define armv7_read_thumb_32_instr_cmp_register(r) NULL
#define armv7_read_thumb_32_instr_cps_thumb(r) NULL
#define armv7_read_thumb_32_instr_dbg(r) NULL
#define armv7_read_thumb_32_instr_dmb(r) NULL
#define armv7_read_thumb_32_instr_dsb(r) NULL
#define armv7_read_thumb_32_instr_enterx_leavex(r) NULL
-#define armv7_read_thumb_32_instr_eor_immediate(r) NULL
-#define armv7_read_thumb_32_instr_eor_register(r) NULL
#define armv7_read_thumb_32_instr_eret(r) NULL
#define armv7_read_thumb_32_instr_hvc(r) NULL
#define armv7_read_thumb_32_instr_isb(r) NULL
@@ -41,22 +28,14 @@
#define armv7_read_thumb_32_instr_ldrt(r) NULL
#define armv7_read_thumb_32_instr_lsl_register(r) NULL
#define armv7_read_thumb_32_instr_lsr_register(r) NULL
-#define armv7_read_thumb_32_instr_mla(r) NULL
-#define armv7_read_thumb_32_instr_mls(r) NULL
-#define armv7_read_thumb_32_instr_mov_immediate(r) NULL
#define armv7_read_thumb_32_instr_movt(r) NULL
#define armv7_read_thumb_32_instr_mrs(r) NULL
#define armv7_read_thumb_32_instr_mrs_banked_register(r) NULL
#define armv7_read_thumb_32_instr_msr_banked_register(r) NULL
#define armv7_read_thumb_32_instr_msr_register(r) NULL
-#define armv7_read_thumb_32_instr_mul(r) NULL
-#define armv7_read_thumb_32_instr_mvn_immediate(r) NULL
-#define armv7_read_thumb_32_instr_mvn_register(r) NULL
#define armv7_read_thumb_32_instr_nop(r) NULL
#define armv7_read_thumb_32_instr_orn_immediate(r) NULL
#define armv7_read_thumb_32_instr_orn_register(r) NULL
-#define armv7_read_thumb_32_instr_orr_immediate(r) NULL
-#define armv7_read_thumb_32_instr_orr_register(r) NULL
#define armv7_read_thumb_32_instr_pkh(r) NULL
#define armv7_read_thumb_32_instr_pop_thumb(r) NULL
#define armv7_read_thumb_32_instr_push(r) NULL
@@ -70,13 +49,9 @@
#define armv7_read_thumb_32_instr_revsh(r) NULL
#define armv7_read_thumb_32_instr_rfe(r) NULL
#define armv7_read_thumb_32_instr_ror_register(r) NULL
-#define armv7_read_thumb_32_instr_rsb_immediate(r) NULL
-#define armv7_read_thumb_32_instr_rsb_register(r) NULL
#define armv7_read_thumb_32_instr_sadd16(r) NULL
#define armv7_read_thumb_32_instr_sadd8(r) NULL
#define armv7_read_thumb_32_instr_sasx(r) NULL
-#define armv7_read_thumb_32_instr_sbc_immediate(r) NULL
-#define armv7_read_thumb_32_instr_sbc_register(r) NULL
#define armv7_read_thumb_32_instr_sbfx(r) NULL
#define armv7_read_thumb_32_instr_sdiv(r) NULL
#define armv7_read_thumb_32_instr_sel(r) NULL
@@ -90,17 +65,16 @@
#define armv7_read_thumb_32_instr_smc_previously_smi(r) NULL
#define armv7_read_thumb_32_instr_smlabb_smlabt_smlatb_smlatt(r) NULL
#define armv7_read_thumb_32_instr_smlad(r) NULL
-#define armv7_read_thumb_32_instr_smlal(r) NULL
#define armv7_read_thumb_32_instr_smlalbb_smlalbt_smlaltb_smlaltt(r) NULL
#define armv7_read_thumb_32_instr_smlald(r) NULL
#define armv7_read_thumb_32_instr_smlawb_smlawt(r) NULL
#define armv7_read_thumb_32_instr_smlsd(r) NULL
+#define armv7_read_thumb_32_instr_smlsld(r) NULL
#define armv7_read_thumb_32_instr_smmla(r) NULL
#define armv7_read_thumb_32_instr_smmls(r) NULL
#define armv7_read_thumb_32_instr_smmul(r) NULL
#define armv7_read_thumb_32_instr_smuad(r) NULL
#define armv7_read_thumb_32_instr_smulbb_smulbt_smultb_smultt(r) NULL
-#define armv7_read_thumb_32_instr_smull(r) NULL
#define armv7_read_thumb_32_instr_smulwb_smulwt(r) NULL
#define armv7_read_thumb_32_instr_smusd(r) NULL
#define armv7_read_thumb_32_instr_sqadd16(r) NULL
@@ -135,10 +109,6 @@
#define armv7_read_thumb_32_instr_sxtb(r) NULL
#define armv7_read_thumb_32_instr_sxtb16(r) NULL
#define armv7_read_thumb_32_instr_sxth(r) NULL
-#define armv7_read_thumb_32_instr_teq_immediate(r) NULL
-#define armv7_read_thumb_32_instr_teq_register(r) NULL
-#define armv7_read_thumb_32_instr_tst_immediate(r) NULL
-#define armv7_read_thumb_32_instr_tst_register(r) NULL
#define armv7_read_thumb_32_instr_uadd16(r) NULL
#define armv7_read_thumb_32_instr_uadd8(r) NULL
#define armv7_read_thumb_32_instr_uasx(r) NULL
@@ -151,9 +121,6 @@
#define armv7_read_thumb_32_instr_uhsax(r) NULL
#define armv7_read_thumb_32_instr_uhsub16(r) NULL
#define armv7_read_thumb_32_instr_uhsub8(r) NULL
-#define armv7_read_thumb_32_instr_umaal(r) NULL
-#define armv7_read_thumb_32_instr_umlal(r) NULL
-#define armv7_read_thumb_32_instr_umull(r) NULL
#define armv7_read_thumb_32_instr_uqadd16(r) NULL
#define armv7_read_thumb_32_instr_uqadd8(r) NULL
#define armv7_read_thumb_32_instr_uqasx(r) NULL
@@ -175,5 +142,4 @@
#define armv7_read_thumb_32_instr_uxth(r) NULL
#define armv7_read_thumb_32_instr_wfe(r) NULL
#define armv7_read_thumb_32_instr_wfi(r) NULL
-#define armv7_read_thumb_32_instr_yield(r) NULL
#endif
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index ad52bd2..ff9f4a5 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -10,9 +10,9 @@ D2C_ARCH = armv7
D2C_HEADER = _ARCH_ARM_V7
D2C_ENCODINGS = \
- -e a= \
- -e t=thumb16_ \
- -e T=thumb32_
+ -e A=arm_ \
+ -e t=thumb_16_ \
+ -e T=thumb_32_
D2C_MACROS = \
-M SetFlags=g_armv7_instruction_define_setflags \
@@ -77,7 +77,25 @@ fix_includes_in_c:
fi; \
done
-finish_disass: $(D2C_OUTDIR)/opcodes/opcodes.h
+finish_disass: finish_disass_t16 finish_disass_t32 finish_disass_arm
+
+finish_disass_t16: $(D2C_OUTDIR)/opcodes/thumb_16_opcodes.h
+ @if grep -q '##INCLUDES##' $<; then \
+ $(fix2_verbose)sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $< ; \
+ fi
+ @if ! grep -q 'endif' $<; then \
+ $(fix2_verbose)echo -en "\n\n#endif /* _ARCH_ARM_V7_OPCODES_OPCODES_H */\n" >> $< ; \
+ fi
+
+finish_disass_t32: $(D2C_OUTDIR)/opcodes/thumb_32_opcodes.h
+ @if grep -q '##INCLUDES##' $<; then \
+ $(fix2_verbose)sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $< ; \
+ fi
+ @if ! grep -q 'endif' $<; then \
+ $(fix2_verbose)echo -en "\n\n#endif /* _ARCH_ARM_V7_OPCODES_OPCODES_H */\n" >> $< ; \
+ fi
+
+finish_disass_arm: $(D2C_OUTDIR)/opcodes/arm_opcodes.h
@if grep -q '##INCLUDES##' $<; then \
$(fix2_verbose)sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $< ; \
fi
@@ -86,4 +104,4 @@ finish_disass: $(D2C_OUTDIR)/opcodes/opcodes.h
fi
clean:
- rm -f $(ARMV7_DEFS:.d=.g) $(D2C_OUTDIR)/opcodes/*c $(D2C_OUTDIR)/opcodes/opcodes.h
+ rm -f $(ARMV7_DEFS:.d=.g) $(D2C_OUTDIR)/opcodes/*c $(D2C_OUTDIR)/opcodes/{thumb_16_,thumb_32_,}opcodes.h
diff --git a/src/arch/arm/v7/opdefs/mov_A88102.d b/src/arch/arm/v7/opdefs/mov_A88102.d
index 2401df2..dcafc73 100644
--- a/src/arch/arm/v7/opdefs/mov_A88102.d
+++ b/src/arch/arm/v7/opdefs/mov_A88102.d
@@ -32,7 +32,7 @@
@conv {
Rd = Register(Rd)
- const = ZeroExtend(imm8, 32)
+ const = ZeroExtend(imm8, 8, 32)
}
@@ -69,7 +69,7 @@
@conv {
Rd = Register(Rd)
- const = ZeroExtend(imm4:i:imm3:imm8, 32)
+ const = ZeroExtend(imm4:i:imm3:imm8, 12, 32)
}
@@ -114,7 +114,7 @@
c = Condition(cond)
Rd = Register(Rd)
- const = ZeroExtend(imm4:imm12, 32)
+ const = ZeroExtend(imm4:imm12, 16, 32)
}
diff --git a/src/arch/arm/v7/processor.c b/src/arch/arm/v7/processor.c
index 4292672..7f263a6 100644
--- a/src/arch/arm/v7/processor.c
+++ b/src/arch/arm/v7/processor.c
@@ -25,6 +25,8 @@
#include "arm.h"
+#include "thumb_16.h"
+#include "thumb_32.h"
#include "../context.h"
#include "../processor-int.h"
#include "../../raw.h"
@@ -239,7 +241,8 @@ static GArchInstruction *g_armv7_processor_disassemble(const GArmV7Processor *pr
/* TODO : thumb... */
- result = process_armv7_instruction_set_encoding(raw);
+ //result = process_armv7_instruction_set_encoding(raw);
+ result = process_armv7_thumb_32_instruction_set_encoding(raw);
/*
if (raw == 0xe1a0000a)
diff --git a/src/arch/arm/v7/pseudo.c b/src/arch/arm/v7/pseudo.c
index aac8bb7..53064bb 100644
--- a/src/arch/arm/v7/pseudo.c
+++ b/src/arch/arm/v7/pseudo.c
@@ -38,24 +38,27 @@
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
* carry = retenue enventuelle à constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'LSL_C'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_lsl_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry)
+bool armv7_lsl_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry, uint32_t *value)
{
- assert(n <= 32);
- assert(shift > 0);
+ if (n > 32) return false;
+ if (shift == 0) return false;
if (carry != NULL)
*carry = x & (1 << (n - 1));
- return x << shift;
+ *value = x << shift;
+
+ return true;
}
@@ -65,24 +68,25 @@ uint32_t armv7_lsl_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry
* Paramètres : x = valeur sur 32 bits maximum à traiter. *
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'LSL'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_lsl(uint32_t x, unsigned int n, unsigned int shift)
+bool armv7_lsl(uint32_t x, unsigned int n, unsigned int shift, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
+ bool result; /* Bilan final à retourner */
if (shift == 0)
- result = x;
+ result = true;
else
- result = armv7_lsl_c(x, n, shift, NULL);
+ result = armv7_lsl_c(x, n, shift, NULL, value);
return result;
@@ -95,24 +99,27 @@ uint32_t armv7_lsl(uint32_t x, unsigned int n, unsigned int shift)
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
* carry = retenue enventuelle à constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'LSR_C'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_lsr_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry)
+bool armv7_lsr_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry, uint32_t *value)
{
- assert(n <= 32);
- assert(shift > 0);
+ if (n > 32) return false;
+ if (shift == 0) return false;
if (carry != NULL)
*carry = x & (1 << (shift - 1));
- return x >> shift;
+ *value = x >> shift;
+
+ return true;
}
@@ -122,24 +129,25 @@ uint32_t armv7_lsr_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry
* Paramètres : x = valeur sur 32 bits maximum à traiter. *
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'LSR'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_lsr(uint32_t x, unsigned int n, unsigned int shift)
+bool armv7_lsr(uint32_t x, unsigned int n, unsigned int shift, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
+ bool result; /* Bilan final à retourner */
if (shift == 0)
result = x;
else
- result = armv7_lsr_c(x, n, shift, NULL);
+ result = armv7_lsr_c(x, n, shift, NULL, value);
return result;
@@ -152,24 +160,27 @@ uint32_t armv7_lsr(uint32_t x, unsigned int n, unsigned int shift)
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
* carry = retenue enventuelle à constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'ASR_C'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_asr_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry)
+bool armv7_asr_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry, uint32_t *value)
{
- assert(n <= 32);
- assert(shift > 0);
+ if (n > 32) return false;
+ if (shift == 0) return false;
if (carry != NULL)
*carry = x & (1 << (shift - 1));
- return ((int32_t)x) >> shift;
+ *value = ((int32_t)x) >> shift;
+
+ return true;
}
@@ -179,24 +190,25 @@ uint32_t armv7_asr_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry
* Paramètres : x = valeur sur 32 bits maximum à traiter. *
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'ASR'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_asr(uint32_t x, unsigned int n, unsigned int shift)
+bool armv7_asr(uint32_t x, unsigned int n, unsigned int shift, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
+ bool result; /* Bilan final à retourner */
if (shift == 0)
- result = x;
+ result = true;
else
- result = armv7_asr_c(x, n, shift, NULL);
+ result = armv7_asr_c(x, n, shift, NULL, value);
return result;
@@ -209,28 +221,27 @@ uint32_t armv7_asr(uint32_t x, unsigned int n, unsigned int shift)
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
* carry = retenue enventuelle à constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'ROR_C'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_ror_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry)
+bool armv7_ror_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
+ if (n > 32) return false;
+ if (shift == 0) return false;
- assert(n <= 32);
- assert(shift > 0);
-
- result = (x >> shift) | (x << (32 - shift));
+ *value = (x >> shift) | (x << (32 - shift));
if (carry != NULL)
- *carry = result & (1 << (n - 1));
+ *carry = *value & (1 << (n - 1));
- return result;
+ return true;
}
@@ -240,24 +251,25 @@ uint32_t armv7_ror_c(uint32_t x, unsigned int n, unsigned int shift, bool *carry
* Paramètres : x = valeur sur 32 bits maximum à traiter. *
* n = nombre de bits à prendre en compte. *
* shift = nombre de décallages visés. *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'ROR'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_ror(uint32_t x, unsigned int n, unsigned int shift)
+bool armv7_ror(uint32_t x, unsigned int n, unsigned int shift, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
+ bool result; /* Bilan final à retourner */
if (shift == 0)
- result = x;
+ result = true;
else
- result = armv7_ror_c(x, n, shift, NULL);
+ result = armv7_ror_c(x, n, shift, NULL, value);
return result;
@@ -269,29 +281,27 @@ uint32_t armv7_ror(uint32_t x, unsigned int n, unsigned int shift)
* Paramètres : x = valeur sur 32 bits maximum à traiter. *
* n = nombre de bits à prendre en compte. *
* carry = retenue enventuelle à utiliser puis constituer. [OUT]*
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'RRX_C'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_rrx_c(uint32_t x, unsigned int n, bool *carry)
+bool armv7_rrx_c(uint32_t x, unsigned int n, bool *carry, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
bool new_c; /* Nouvelle retenue à retenir */
- assert(carry != NULL);
-
new_c = x & 0x1;
- result = (*carry ? 1 : 0) << (n - 1) | x >> 1;
+ *value = (*carry ? 1 : 0) << (n - 1) | x >> 1;
*carry = new_c;
- return result;
+ return true;
}
@@ -301,18 +311,19 @@ uint32_t armv7_rrx_c(uint32_t x, unsigned int n, bool *carry)
* Paramètres : x = valeur sur 32 bits maximum à traiter. *
* n = nombre de bits à prendre en compte. *
* carry = retenue enventuelle à utiliser. *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'RRX'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_rrx(uint32_t x, unsigned int n, bool carry)
+bool armv7_rrx(uint32_t x, unsigned int n, bool carry, uint32_t *value)
{
- return armv7_rrx_c(x, n, &carry);
+ return armv7_rrx_c(x, n, &carry, value);
}
@@ -321,18 +332,19 @@ uint32_t armv7_rrx(uint32_t x, unsigned int n, bool carry)
* *
* Paramètres : imm12 = valeur sur 32 bits maximum à traiter. *
* carry = retenue enventuelle à utiliser / constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'ARMExpandImm_C'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_arm_expand_imm_c(uint32_t imm12, bool *carry)
+bool armv7_arm_expand_imm_c(uint32_t imm12, bool *carry, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
+ bool result; /* Bilan final à retourner */
uint32_t unrotated; /* Transformation à décaller */
/**
@@ -341,7 +353,7 @@ uint32_t armv7_arm_expand_imm_c(uint32_t imm12, bool *carry)
unrotated = armv7_zero_extend(imm12 & 0xff, 8, 32);
- result = armv7_shift(unrotated, 32, SRType_ROR, 2 * ((imm12 >> 8) & 0xf), carry);
+ result = armv7_shift(unrotated, 32, SRType_ROR, 2 * ((imm12 >> 8) & 0xf), carry, value);
return result;
@@ -352,18 +364,107 @@ uint32_t armv7_arm_expand_imm_c(uint32_t imm12, bool *carry)
* *
* Paramètres : imm12 = valeur sur 32 bits maximum à traiter. *
* carry = retenue enventuelle à utiliser / constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'ARMExpandImm'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+bool armv7_arm_expand_imm(uint32_t imm12, uint32_t *value)
+{
+ return armv7_arm_expand_imm_c(imm12, (bool []) { false /* FIXME : APSR.C */ }, value);
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : imm12 = valeur sur 32 bits maximum à traiter. *
+* carry = retenue enventuelle à utiliser / constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
+* *
+* Description : Traduit la fonction 'ThumbExpandImm_C'. *
+* *
+* Retour : Bilan de l'opération. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+bool armv7_thumb_expand_imm_c(uint32_t imm12, bool *carry, uint32_t *value)
+{
+ bool result; /* Conclusion à faire remonter */
+ uint8_t byte; /* Octet à reproduire */
+ uint32_t unrotated; /* Transformation à décaller */
+
+ result = true;
+
+ if (((imm12 >> 10) & b11) == b00)
+ {
+ byte = imm12 & 0xff;
+
+ switch ((imm12 >> 8) & b11)
+ {
+ case b00:
+ *value = armv7_zero_extend(byte, 8, 32);
+ break;
+
+ case b01:
+ if (byte == 0)
+ result = false;
+ else
+ *value = byte << 16 | byte;
+ break;
+
+ case b10:
+ if (byte == 0)
+ result = false;
+ else
+ *value = byte << 24 | byte << 8;
+ break;
+
+ case b11:
+ if (byte == 0)
+ result = false;
+ else
+ *value = byte << 24 | byte << 16 | byte << 8 | byte;
+ break;
+
+ }
+
+ }
+ else
+ {
+ unrotated = 1 << 7 | (imm12 & 0x3f);
+ result = armv7_ror_c(unrotated, 32, (imm12 >> 7) & 0x1f, carry, value);
+ }
+
+ return result;
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : imm12 = valeur sur 32 bits maximum à traiter. *
+* carry = retenue enventuelle à utiliser / constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
+* *
+* Description : Traduit la fonction 'ThumbExpandImm'. *
+* *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_arm_expand_imm(uint32_t imm12)
+bool armv7_thumb_expand_imm(uint32_t imm12, uint32_t *value)
{
- return armv7_arm_expand_imm_c(imm12, (bool []) { false /* FIXME : APSR.C */ });
+ return armv7_thumb_expand_imm_c(imm12, (bool []) { false /* FIXME : APSR.C */ }, value);
}
@@ -464,7 +565,7 @@ bool armv7_decode_reg_shift(uint8_t type2, SRType *type)
break;
case b11:
- *type = SRType_ROR;
+ *type = SRType_ROR;
break;
default:
@@ -485,45 +586,46 @@ bool armv7_decode_reg_shift(uint8_t type2, SRType *type)
* type = type d'opération à mener. *
* amount = quantité liée à l'opération à mener. *
* carry = retenue enventuelle à utiliser / constituer. [OUT] *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'Shift_C'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_shift_c(uint32_t x, unsigned int n, SRType type, unsigned int amount, bool *carry)
+bool armv7_shift_c(uint32_t x, unsigned int n, SRType type, unsigned int amount, bool *carry, uint32_t *value)
{
- uint32_t result; /* Valeur finale à retourner */
+ bool result; /* Bilan final à retourner */
- assert(!(type == SRType_RRX && amount != 1));
+ if (type == SRType_RRX && amount != 1) return false;
- if (amount == 0) return x;
+ if (amount == 0) return true;
- result = 0; /* Pour GCC... */
+ result = true; /* Pour GCC... */
switch (type)
{
case SRType_LSL:
- result = armv7_lsl_c(x, n, amount, carry);
+ result = armv7_lsl_c(x, n, amount, carry, value);
break;
case SRType_LSR:
- result = armv7_lsr_c(x, n, amount, carry);
+ result = armv7_lsr_c(x, n, amount, carry, value);
break;
case SRType_ASR:
- result = armv7_asr_c(x, n, amount, carry);
+ result = armv7_asr_c(x, n, amount, carry, value);
break;
case SRType_ROR:
- result = armv7_ror_c(x, n, amount, carry);
+ result = armv7_ror_c(x, n, amount, carry, value);
break;
case SRType_RRX:
- result = armv7_rrx_c(x, n, carry);
+ result = armv7_rrx_c(x, n, carry, value);
break;
}
@@ -540,18 +642,19 @@ uint32_t armv7_shift_c(uint32_t x, unsigned int n, SRType type, unsigned int amo
* type = type d'opération à mener. *
* amount = quantité liée à l'opération à mener. *
* carry = retenue enventuelle à utiliser. *
+* value = nouvelle valeur calculée. [OUT] *
* *
* Description : Traduit la fonction 'Shift'. *
* *
-* Retour : Nouvelle valeur calculée. *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-uint32_t armv7_shift(uint32_t x, unsigned int n, SRType type, unsigned int amount, bool carry)
+bool armv7_shift(uint32_t x, unsigned int n, SRType type, unsigned int amount, bool carry, uint32_t *value)
{
- return armv7_shift_c(x, n, type, amount, &carry);
+ return armv7_shift_c(x, n, type, amount, &carry, value);
}
diff --git a/src/arch/arm/v7/pseudo.h b/src/arch/arm/v7/pseudo.h
index 5645234..bf8fe2a 100644
--- a/src/arch/arm/v7/pseudo.h
+++ b/src/arch/arm/v7/pseudo.h
@@ -36,34 +36,34 @@
/* Traduit la fonction 'LSL_C'. */
-uint32_t armv7_lsl_c(uint32_t, unsigned int, unsigned int, bool *);
+bool armv7_lsl_c(uint32_t, unsigned int, unsigned int, bool *, uint32_t *);
/* Traduit la fonction 'LSL'. */
-uint32_t armv7_lsl(uint32_t, unsigned int, unsigned int);
+bool armv7_lsl(uint32_t, unsigned int, unsigned int, uint32_t *);
/* Traduit la fonction 'LSR_C'. */
-uint32_t armv7_lsr_c(uint32_t, unsigned int, unsigned int, bool *);
+bool armv7_lsr_c(uint32_t, unsigned int, unsigned int, bool *, uint32_t *);
/* Traduit la fonction 'LSR'. */
-uint32_t armv7_lsr(uint32_t, unsigned int, unsigned int);
+bool armv7_lsr(uint32_t, unsigned int, unsigned int, uint32_t *);
/* Traduit la fonction 'ASR_C'. */
-uint32_t armv7_asr_c(uint32_t, unsigned int, unsigned int, bool *);
+bool armv7_asr_c(uint32_t, unsigned int, unsigned int, bool *, uint32_t *);
/* Traduit la fonction 'ASR'. */
-uint32_t armv7_asr(uint32_t, unsigned int, unsigned int);
+bool armv7_asr(uint32_t, unsigned int, unsigned int, uint32_t *);
/* Traduit la fonction 'ROR_C'. */
-uint32_t armv7_ror_c(uint32_t, unsigned int, unsigned int, bool *);
+bool armv7_ror_c(uint32_t, unsigned int, unsigned int, bool *, uint32_t *);
/* Traduit la fonction 'ROR'. */
-uint32_t armv7_ror(uint32_t, unsigned int, unsigned int);
+bool armv7_ror(uint32_t, unsigned int, unsigned int, uint32_t *);
/* Traduit la fonction 'RRX_C'. */
-uint32_t armv7_rrx_c(uint32_t, unsigned int, bool *);
+bool armv7_rrx_c(uint32_t, unsigned int, bool *, uint32_t *);
/* Traduit la fonction 'RRX'. */
-uint32_t armv7_rrx(uint32_t, unsigned int, bool);
+bool armv7_rrx(uint32_t, unsigned int, bool, uint32_t *);
@@ -73,10 +73,23 @@ uint32_t armv7_rrx(uint32_t, unsigned int, bool);
/* Traduit la fonction 'ARMExpandImm_C'. */
-uint32_t armv7_arm_expand_imm_c(uint32_t, bool *);
+bool armv7_arm_expand_imm_c(uint32_t, bool *, uint32_t *);
/* Traduit la fonction 'ARMExpandImm'. */
-uint32_t armv7_arm_expand_imm(uint32_t);
+bool armv7_arm_expand_imm(uint32_t, uint32_t *);
+
+
+
+/**
+ * § A6.3.2 - Modified immediate constants in Thumb instructions
+ */
+
+
+/* Traduit la fonction 'ThumbExpandImm_C'. */
+bool armv7_thumb_expand_imm_c(uint32_t, bool *, uint32_t *);
+
+/* Traduit la fonction 'ThumbExpandImm'. */
+bool armv7_thumb_expand_imm(uint32_t, uint32_t *);
@@ -103,10 +116,10 @@ bool armv7_decode_imm_shift(uint8_t, uint8_t, SRType *, uint32_t *);
bool armv7_decode_reg_shift(uint8_t, SRType *);
/* Traduit la fonction 'Shift_C'. */
-uint32_t armv7_shift_c(uint32_t, unsigned int, SRType, unsigned int, bool *);
+bool armv7_shift_c(uint32_t, unsigned int, SRType, unsigned int, bool *, uint32_t *);
/* Traduit la fonction 'Shift'. */
-uint32_t armv7_shift(uint32_t, unsigned int, SRType, unsigned int, bool);
+bool armv7_shift(uint32_t, unsigned int, SRType, unsigned int, bool, uint32_t *);
diff --git a/src/arch/arm/v7/thumb_16.c b/src/arch/arm/v7/thumb_16.c
index a27183d..9365708 100644
--- a/src/arch/arm/v7/thumb_16.c
+++ b/src/arch/arm/v7/thumb_16.c
@@ -27,7 +27,7 @@
#include <stdint.h>
-#include "opcodes/opcodes_thumb_16.h"
+#include "opcodes/thumb_16_opcodes.h"
#include "opcodes/opcodes_tmp_thumb_16.h"
#include "../../../common/bconst.h"
@@ -82,49 +82,49 @@ GArchInstruction *process_armv7_thumb_16_instruction_set_encoding(uint16_t raw)
opcode = (raw >> 10) & b111111;
- if ((opcode & b110000) == b000000)
- result = process_armv7_thumb_16_shift_immediate_add_subtract_move_and_compare(raw);
+ if ((opcode & b110000) == b000000)
+ result = process_armv7_thumb_16_shift_immediate_add_subtract_move_and_compare(raw);
- else if (opcode == b010000)
- result = process_armv7_thumb_16_data_processing(raw);
+ else if (opcode == b010000)
+ result = process_armv7_thumb_16_data_processing(raw);
- else if (opcode == b010001)
- result = process_armv7_thumb_16_special_data_instructions_and_branch_and_exchange(raw);
+ else if (opcode == b010001)
+ result = process_armv7_thumb_16_special_data_instructions_and_branch_and_exchange(raw);
- else if ((opcode & b111110) == b010010)
- result = armv7_read_thumb_16_instr_ldr_literal(raw);
+ else if ((opcode & b111110) == b010010)
+ result = armv7_read_thumb_16_instr_ldr_literal(raw);
- else if ((opcode & b111100) == b010100)
- result = armv7_read_thumb_16_instr_ldr_literal(raw);
+ else if ((opcode & b111100) == b010100)
+ result = armv7_read_thumb_16_instr_ldr_literal(raw);
- else if ((opcode & b111000) == b011000)
- result = armv7_read_thumb_16_instr_ldr_literal(raw);
+ else if ((opcode & b111000) == b011000)
+ result = armv7_read_thumb_16_instr_ldr_literal(raw);
- else if ((opcode & b111000) == b100000)
- result = process_armv7_thumb_16_load_store_single_data_item(raw);
+ else if ((opcode & b111000) == b100000)
+ result = process_armv7_thumb_16_load_store_single_data_item(raw);
- else if ((opcode & b111110) == b101000)
- result = armv7_read_thumb_16_instr_adr(raw);
+ else if ((opcode & b111110) == b101000)
+ result = armv7_read_thumb_16_instr_adr(raw);
- else if ((opcode & b111110) == b101010)
- result = armv7_read_thumb_16_instr_add_sp_plus_immediate(raw);
+ else if ((opcode & b111110) == b101010)
+ result = armv7_read_thumb_16_instr_add_sp_plus_immediate(raw);
- else if ((opcode & b111100) == b101100)
- result = process_armv7_thumb_16_miscellaneous_16_bit_instructions(raw);
+ else if ((opcode & b111100) == b101100)
+ result = process_armv7_thumb_16_miscellaneous_16_bit_instructions(raw);
- else if ((opcode & b111110) == b110000)
- result = armv7_read_thumb_16_instr_stm_stmia_stmea(raw);
+ else if ((opcode & b111110) == b110000)
+ result = armv7_read_thumb_16_instr_stm_stmia_stmea(raw);
- else if ((opcode & b111110) == b110010)
- result = armv7_read_thumb_16_instr_ldm_ldmia_ldmfd_thumb(raw);
+ else if ((opcode & b111110) == b110010)
+ result = armv7_read_thumb_16_instr_ldm_ldmia_ldmfd_thumb(raw);
- else if ((opcode & b111100) == b110100)
- result = process_armv7_thumb_16_conditional_branch_and_supervisor_call(raw);
+ else if ((opcode & b111100) == b110100)
+ result = process_armv7_thumb_16_conditional_branch_and_supervisor_call(raw);
- else if ((opcode & b111110) == b111000)
- result = armv7_read_thumb_16_instr_b(raw);
+ else if ((opcode & b111110) == b111000)
+ result = armv7_read_thumb_16_instr_b(raw);
- return result;
+ return result;
}
@@ -157,38 +157,38 @@ static GArchInstruction *process_armv7_thumb_16_shift_immediate_add_subtract_mov
opcode = (raw >> 9) & b11111;
- if ((opcode & b11100) == b00000)
- result = armv7_read_thumb_16_instr_lsl_immediate(raw);
+ if ((opcode & b11100) == b00000)
+ result = armv7_read_thumb_16_instr_lsl_immediate(raw);
- else if ((opcode & b11100) == b00100)
- result = armv7_read_thumb_16_instr_lsr_immediate(raw);
+ else if ((opcode & b11100) == b00100)
+ result = armv7_read_thumb_16_instr_lsr_immediate(raw);
- else if ((opcode & b11100) == b01000)
- result = armv7_read_thumb_16_instr_asr_immediate(raw);
+ else if ((opcode & b11100) == b01000)
+ result = armv7_read_thumb_16_instr_asr_immediate(raw);
- else if (opcode == b01100)
- result = armv7_read_thumb_16_instr_add_register_thumb(raw);
+ else if (opcode == b01100)
+ result = armv7_read_thumb_16_instr_add_register_thumb(raw);
- else if (opcode == b01101)
- result = armv7_read_thumb_16_instr_sub_register(raw);
+ else if (opcode == b01101)
+ result = armv7_read_thumb_16_instr_sub_register(raw);
- else if (opcode == b01110)
- result = armv7_read_thumb_16_instr_add_immediate_thumb(raw);
+ else if (opcode == b01110)
+ result = armv7_read_thumb_16_instr_add_immediate_thumb(raw);
- else if (opcode == b01111)
- result = armv7_read_thumb_16_instr_sub_immediate_thumb(raw);
+ else if (opcode == b01111)
+ result = armv7_read_thumb_16_instr_sub_immediate_thumb(raw);
- else if ((opcode & b11100) == b10000)
- result = armv7_read_thumb_16_instr_mov_immediate(raw);
+ else if ((opcode & b11100) == b10000)
+ result = armv7_read_thumb_16_instr_mov_immediate(raw);
- else if ((opcode & b11100) == b10100)
- result = armv7_read_thumb_16_instr_cmp_immediate(raw);
+ else if ((opcode & b11100) == b10100)
+ result = armv7_read_thumb_16_instr_cmp_immediate(raw);
- else if ((opcode & b11100) == b11000)
- result = armv7_read_thumb_16_instr_add_immediate_thumb(raw);
+ else if ((opcode & b11100) == b11000)
+ result = armv7_read_thumb_16_instr_add_immediate_thumb(raw);
- else if ((opcode & b11100) == b11100)
- result = armv7_read_thumb_16_instr_sub_immediate_thumb(raw);
+ else if ((opcode & b11100) == b11100)
+ result = armv7_read_thumb_16_instr_sub_immediate_thumb(raw);
return result;
@@ -223,73 +223,73 @@ static GArchInstruction *process_armv7_thumb_16_data_processing(uint16_t raw)
opcode = (raw >> 6) & b1111;
- switch (opcode)
- {
- case b0000:
- result = armv7_read_thumb_16_instr_and_register(raw);
- break;
+ switch (opcode)
+ {
+ case b0000:
+ result = armv7_read_thumb_16_instr_and_register(raw);
+ break;
- case b0001:
- result = armv7_read_thumb_16_instr_eor_register(raw);
- break;
+ case b0001:
+ result = armv7_read_thumb_16_instr_eor_register(raw);
+ break;
- case b0010:
- result = armv7_read_thumb_16_instr_lsl_register(raw);
- break;
+ case b0010:
+ result = armv7_read_thumb_16_instr_lsl_register(raw);
+ break;
- case b0011:
- result = armv7_read_thumb_16_instr_lsr_register(raw);
- break;
+ case b0011:
+ result = armv7_read_thumb_16_instr_lsr_register(raw);
+ break;
- case b0100:
- result = armv7_read_thumb_16_instr_asr_register(raw);
- break;
+ case b0100:
+ result = armv7_read_thumb_16_instr_asr_register(raw);
+ break;
- case b0101:
- result = armv7_read_thumb_16_instr_adc_register(raw);
- break;
+ case b0101:
+ result = armv7_read_thumb_16_instr_adc_register(raw);
+ break;
- case b0110:
- result = armv7_read_thumb_16_instr_sbc_register(raw);
- break;
+ case b0110:
+ result = armv7_read_thumb_16_instr_sbc_register(raw);
+ break;
- case b0111:
- result = armv7_read_thumb_16_instr_ror_register(raw);
- break;
+ case b0111:
+ result = armv7_read_thumb_16_instr_ror_register(raw);
+ break;
- case b1000:
- result = armv7_read_thumb_16_instr_tst_register(raw);
- break;
+ case b1000:
+ result = armv7_read_thumb_16_instr_tst_register(raw);
+ break;
- case b1001:
- result = armv7_read_thumb_16_instr_rsb_immediate(raw);
- break;
+ case b1001:
+ result = armv7_read_thumb_16_instr_rsb_immediate(raw);
+ break;
- case b1010:
- result = armv7_read_thumb_16_instr_cmp_register(raw);
- break;
+ case b1010:
+ result = armv7_read_thumb_16_instr_cmp_register(raw);
+ break;
- case b1011:
- result = armv7_read_thumb_16_instr_cmn_register(raw);
- break;
+ case b1011:
+ result = armv7_read_thumb_16_instr_cmn_register(raw);
+ break;
- case b1100:
- result = armv7_read_thumb_16_instr_orr_register(raw);
- break;
+ case b1100:
+ result = armv7_read_thumb_16_instr_orr_register(raw);
+ break;
- case b1101:
- result = armv7_read_thumb_16_instr_mul(raw);
- break;
+ case b1101:
+ result = armv7_read_thumb_16_instr_mul(raw);
+ break;
- case b1110:
- result = armv7_read_thumb_16_instr_bic_register(raw);
- break;
+ case b1110:
+ result = armv7_read_thumb_16_instr_bic_register(raw);
+ break;
- case b1111:
- result = armv7_read_thumb_16_instr_mvn_register(raw);
- break;
+ case b1111:
+ result = armv7_read_thumb_16_instr_mvn_register(raw);
+ break;
- }
+ }
return result;
@@ -324,34 +324,34 @@ static GArchInstruction *process_armv7_thumb_16_special_data_instructions_and_br
opcode = (raw >> 6) & b1111;
- if (opcode == b0000)
- result = armv7_read_thumb_16_instr_add_register_thumb(raw);
+ if (opcode == b0000)
+ result = armv7_read_thumb_16_instr_add_register_thumb(raw);
- else if (opcode == b0001)
- result = armv7_read_thumb_16_instr_add_register_thumb(raw);
+ else if (opcode == b0001)
+ result = armv7_read_thumb_16_instr_add_register_thumb(raw);
- else if ((opcode & b1110) == b0010)
- result = armv7_read_thumb_16_instr_add_register_thumb(raw);
+ else if ((opcode & b1110) == b0010)
+ result = armv7_read_thumb_16_instr_add_register_thumb(raw);
- else if ((opcode & b1100) == b0100)
- result = armv7_read_thumb_16_instr_cmp_register(raw);
+ else if ((opcode & b1100) == b0100)
+ result = armv7_read_thumb_16_instr_cmp_register(raw);
- else if (opcode == b1000)
- result = armv7_read_thumb_16_instr_mov_register_thumb(raw);
+ else if (opcode == b1000)
+ result = armv7_read_thumb_16_instr_mov_register_thumb(raw);
- else if (opcode == b1001)
- result = armv7_read_thumb_16_instr_mov_register_thumb(raw);
+ else if (opcode == b1001)
+ result = armv7_read_thumb_16_instr_mov_register_thumb(raw);
- else if ((opcode & b1110) == b1010)
- result = armv7_read_thumb_16_instr_mov_register_thumb(raw);
+ else if ((opcode & b1110) == b1010)
+ result = armv7_read_thumb_16_instr_mov_register_thumb(raw);
- else if ((opcode & b1110) == b1100)
- result = armv7_read_thumb_16_instr_bx(raw);
+ else if ((opcode & b1110) == b1100)
+ result = armv7_read_thumb_16_instr_bx(raw);
- else if ((opcode & b1110) == b1110)
- result = armv7_read_thumb_16_instr_blx_register(raw);
+ else if ((opcode & b1110) == b1110)
+ result = armv7_read_thumb_16_instr_blx_register(raw);
- return result;
+ return result;
}
@@ -382,87 +382,87 @@ static GArchInstruction *process_armv7_thumb_16_load_store_single_data_item(uint
result = NULL;
opa = (raw >> 12) & b1111;
- opb = (raw >> 9) & b111;
+ opb = (raw >> 9) & b111;
- switch (opa)
- {
+ switch (opa)
+ {
case b0101:
- switch (opb)
- {
- case b000:
- result = armv7_read_thumb_16_instr_str_register(raw);
- break;
+ switch (opb)
+ {
+ case b000:
+ result = armv7_read_thumb_16_instr_str_register(raw);
+ break;
- case b001:
- result = armv7_read_thumb_16_instr_strh_register(raw);
- break;
+ case b001:
+ result = armv7_read_thumb_16_instr_strh_register(raw);
+ break;
- case b010:
- result = armv7_read_thumb_16_instr_strb_register(raw);
- break;
+ case b010:
+ result = armv7_read_thumb_16_instr_strb_register(raw);
+ break;
- case b011:
- result = armv7_read_thumb_16_instr_ldrsb_register(raw);
- break;
+ case b011:
+ result = armv7_read_thumb_16_instr_ldrsb_register(raw);
+ break;
- case b100:
- result = armv7_read_thumb_16_instr_ldr_register_thumb(raw);
- break;
+ case b100:
+ result = armv7_read_thumb_16_instr_ldr_register_thumb(raw);
+ break;
- case b101:
- result = armv7_read_thumb_16_instr_ldrh_register(raw);
- break;
+ case b101:
+ result = armv7_read_thumb_16_instr_ldrh_register(raw);
+ break;
- case b110:
- result = armv7_read_thumb_16_instr_ldrb_register(raw);
- break;
+ case b110:
+ result = armv7_read_thumb_16_instr_ldrb_register(raw);
+ break;
- case b111:
- result = armv7_read_thumb_16_instr_ldrsh_register(raw);
- break;
+ case b111:
+ result = armv7_read_thumb_16_instr_ldrsh_register(raw);
+ break;
- }
- break;
+ }
+ break;
case b0110:
- if ((opb & b100) == b000)
- result = armv7_read_thumb_16_instr_str_immediate_thumb(raw);
- else /*if ((opb & b100) == b100)*/
- result = armv7_read_thumb_16_instr_ldr_immediate_thumb(raw);
+ if ((opb & b100) == b000)
+ result = armv7_read_thumb_16_instr_str_immediate_thumb(raw);
+ else /*if ((opb & b100) == b100)*/
+ result = armv7_read_thumb_16_instr_ldr_immediate_thumb(raw);
- break;
+ break;
case b0111:
- if ((opb & b100) == b000)
- result = armv7_read_thumb_16_instr_strb_immediate_thumb(raw);
- else /*if ((opb & b100) == b100)*/
- result = armv7_read_thumb_16_instr_ldrb_immediate_thumb(raw);
+ if ((opb & b100) == b000)
+ result = armv7_read_thumb_16_instr_strb_immediate_thumb(raw);
+ else /*if ((opb & b100) == b100)*/
+ result = armv7_read_thumb_16_instr_ldrb_immediate_thumb(raw);
- break;
+ break;
case b1000:
- if ((opb & b100) == b000)
- result = armv7_read_thumb_16_instr_strh_immediate_thumb(raw);
- else /*if ((opb & b100) == b100)*/
- result = armv7_read_thumb_16_instr_ldrh_immediate_thumb(raw);
+ if ((opb & b100) == b000)
+ result = armv7_read_thumb_16_instr_strh_immediate_thumb(raw);
+ else /*if ((opb & b100) == b100)*/
+ result = armv7_read_thumb_16_instr_ldrh_immediate_thumb(raw);
- break;
+ break;
case b1001:
- if ((opb & b100) == b000)
- result = armv7_read_thumb_16_instr_str_immediate_thumb(raw);
- else /*if ((opb & b100) == b100)*/
- result = armv7_read_thumb_16_instr_ldr_immediate_thumb(raw);
+ if ((opb & b100) == b000)
+ result = armv7_read_thumb_16_instr_str_immediate_thumb(raw);
+ else /*if ((opb & b100) == b100)*/
+ result = armv7_read_thumb_16_instr_ldr_immediate_thumb(raw);
- break;
+ break;
- }
+ }
- return result;
+ return result;
}
@@ -495,64 +495,64 @@ static GArchInstruction *process_armv7_thumb_16_miscellaneous_16_bit_instruction
opcode = (raw >> 5) & b1111111;
- if ((opcode & b1111100) == b0000000)
- result = armv7_read_thumb_16_instr_add_sp_plus_immediate(raw);
+ if ((opcode & b1111100) == b0000000)
+ result = armv7_read_thumb_16_instr_add_sp_plus_immediate(raw);
- else if ((opcode & b1111100) == b0000100)
- result = armv7_read_thumb_16_instr_sub_sp_minus_immediate(raw);
+ else if ((opcode & b1111100) == b0000100)
+ result = armv7_read_thumb_16_instr_sub_sp_minus_immediate(raw);
- else if ((opcode & b1111000) == b0001000)
- result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
+ else if ((opcode & b1111000) == b0001000)
+ result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
- else if ((opcode & b1111110) == b0010000)
- result = armv7_read_thumb_16_instr_sxth(raw);
+ else if ((opcode & b1111110) == b0010000)
+ result = armv7_read_thumb_16_instr_sxth(raw);
- else if ((opcode & b1111110) == b0010010)
- result = armv7_read_thumb_16_instr_sxtb(raw);
+ else if ((opcode & b1111110) == b0010010)
+ result = armv7_read_thumb_16_instr_sxtb(raw);
- else if ((opcode & b1111110) == b0010100)
- result = armv7_read_thumb_16_instr_uxth(raw);
+ else if ((opcode & b1111110) == b0010100)
+ result = armv7_read_thumb_16_instr_uxth(raw);
- else if ((opcode & b1111110) == b0010110)
- result = armv7_read_thumb_16_instr_uxtb(raw);
+ else if ((opcode & b1111110) == b0010110)
+ result = armv7_read_thumb_16_instr_uxtb(raw);
- else if ((opcode & b1111000) == b0011000)
- result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
+ else if ((opcode & b1111000) == b0011000)
+ result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
- else if ((opcode & b1110000) == b0100000)
- result = armv7_read_thumb_16_instr_push(raw);
+ else if ((opcode & b1110000) == b0100000)
+ result = armv7_read_thumb_16_instr_push(raw);
- else if (opcode == b0110010)
- result = armv7_read_thumb_16_instr_setend(raw);
+ else if (opcode == b0110010)
+ result = armv7_read_thumb_16_instr_setend(raw);
- else if (opcode == b0110011)
- result = armv7_read_thumb_16_instr_cps_thumb(raw);
+ else if (opcode == b0110011)
+ result = armv7_read_thumb_16_instr_cps_thumb(raw);
- else if ((opcode & b1111000) == b1001000)
- result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
+ else if ((opcode & b1111000) == b1001000)
+ result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
- else if ((opcode & b1111110) == b1010000)
- result = armv7_read_thumb_16_instr_rev(raw);
+ else if ((opcode & b1111110) == b1010000)
+ result = armv7_read_thumb_16_instr_rev(raw);
- else if ((opcode & b1111110) == b1010010)
- result = armv7_read_thumb_16_instr_rev16(raw);
+ else if ((opcode & b1111110) == b1010010)
+ result = armv7_read_thumb_16_instr_rev16(raw);
- else if ((opcode & b1111110) == b1010110)
- result = armv7_read_thumb_16_instr_revsh(raw);
+ else if ((opcode & b1111110) == b1010110)
+ result = armv7_read_thumb_16_instr_revsh(raw);
- else if ((opcode & b1111000) == b1011000)
- result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
+ else if ((opcode & b1111000) == b1011000)
+ result = armv7_read_thumb_16_instr_cbnz_cbz(raw);
- else if ((opcode & b1110000) == b1100000)
- result = armv7_read_thumb_16_instr_pop_thumb(raw);
+ else if ((opcode & b1110000) == b1100000)
+ result = armv7_read_thumb_16_instr_pop_thumb(raw);
- else if ((opcode & b1111000) == b1110000)
- result = armv7_read_thumb_16_instr_bkpt(raw);
+ else if ((opcode & b1111000) == b1110000)
+ result = armv7_read_thumb_16_instr_bkpt(raw);
- else if ((opcode & b1111000) == b1111000)
- result = process_armv7_thumb_16_miscellaneous_16_bit_instructions_if_then_and_hints(raw);
+ else if ((opcode & b1111000) == b1111000)
+ result = process_armv7_thumb_16_miscellaneous_16_bit_instructions_if_then_and_hints(raw);
- return result;
+ return result;
}
@@ -578,7 +578,7 @@ static GArchInstruction *process_armv7_thumb_16_miscellaneous_16_bit_instruction
/**
* Suit les directives de :
* § A6.2.5 Miscellaneous 16-bit instructions
- * |-> If-Then, and hints
+ * |-> If-Then, and hints
*/
if ((raw & 0xff00) != 0xbf00) return NULL;
@@ -588,35 +588,35 @@ static GArchInstruction *process_armv7_thumb_16_miscellaneous_16_bit_instruction
opa = (raw >> 4) & b1111;
opb = (raw >> 0) & b1111;
- if (opb == b0000)
- switch (opa)
- {
- case b0000:
- result = armv7_read_thumb_16_instr_nop(raw);
- break;
+ if (opb == b0000)
+ switch (opa)
+ {
+ case b0000:
+ result = armv7_read_thumb_16_instr_nop(raw);
+ break;
- case b0001:
- result = armv7_read_thumb_16_instr_yield(raw);
- break;
+ case b0001:
+ result = armv7_read_thumb_16_instr_yield(raw);
+ break;
- case b0010:
- result = armv7_read_thumb_16_instr_wfe(raw);
- break;
+ case b0010:
+ result = armv7_read_thumb_16_instr_wfe(raw);
+ break;
- case b0011:
- result = armv7_read_thumb_16_instr_wfi(raw);
- break;
+ case b0011:
+ result = armv7_read_thumb_16_instr_wfi(raw);
+ break;
- case b0100:
- result = armv7_read_thumb_16_instr_sev(raw);
- break;
+ case b0100:
+ result = armv7_read_thumb_16_instr_sev(raw);
+ break;
- }
+ }
- else
- result = armv7_read_thumb_16_instr_it(raw);
+ else
+ result = armv7_read_thumb_16_instr_it(raw);
- return result;
+ return result;
}
@@ -649,22 +649,22 @@ static GArchInstruction *process_armv7_thumb_16_conditional_branch_and_superviso
opcode = (raw >> 8) & b1111;
- switch (opcode)
- {
- case b1110:
- result = armv7_read_thumb_16_instr_udf(raw);
- break;
+ switch (opcode)
+ {
+ case b1110:
+ result = armv7_read_thumb_16_instr_udf(raw);
+ break;
- case b1111:
- result = armv7_read_thumb_16_instr_svc_previously_swi(raw);
- break;
+ case b1111:
+ result = armv7_read_thumb_16_instr_svc_previously_swi(raw);
+ break;
- default:
- result = armv7_read_thumb_16_instr_b(raw);
- break;
+ default:
+ result = armv7_read_thumb_16_instr_b(raw);
+ break;
- }
+ }
- return result;
+ return result;
}
diff --git a/src/arch/arm/v7/thumb_32.c b/src/arch/arm/v7/thumb_32.c
index b58c206..6af804c 100644
--- a/src/arch/arm/v7/thumb_32.c
+++ b/src/arch/arm/v7/thumb_32.c
@@ -27,7 +27,7 @@
#include <stdint.h>
-#include "opcodes/opcodes_thumb_32.h"
+#include "opcodes/thumb_32_opcodes.h"
#include "opcodes/opcodes_tmp_thumb_32.h"
#include "../../../common/bconst.h"
@@ -128,6 +128,9 @@ GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t raw)
* § A6.3 32-bit Thumb instruction encoding
*/
+ if (raw == 0x0b00f04f || raw == 0x4ff000b0)
+ printf("[INIT] raw = 0x%x - mask :: %d\n", raw, (((raw >> 29) & b111) != b111));
+
if (((raw >> 29) & b111) != b111) return NULL;
result = NULL;
@@ -136,6 +139,9 @@ GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t raw)
op2 = (raw >> 20) & b1111111;
op = (raw >> 15) & b1;
+ if (raw == 0x0b00f04f)
+ printf("OP1 :: %d\n", op1);
+
switch (op1)
{
case b01:
@@ -947,6 +953,7 @@ static GArchInstruction *process_armv7_thumb_32_data_processing_shifted_register
result = NULL;
+ op = (raw >> 21) & b1111;
rn = (raw >> 16) & b1111;
rds = (((raw >> 8) & b1111) << 1) | ((raw >> 20) & b1);
@@ -1065,76 +1072,76 @@ static GArchInstruction *process_armv7_thumb_32_data_processing_register(uint32_
rn = (raw >> 16) & b1111;
op2 = (raw >> 4) & b1111;
- if ((op1 & b1110) == b0000 && op2 == b0000)
- result = armv7_read_thumb_32_instr_lsl_register(raw);
-
- else if ((op1 & b1110) == b0010 && op2 == b0000)
- result = armv7_read_thumb_32_instr_lsr_register(raw);
-
- else if ((op1 & b1110) == b0100 && op2 == b0000)
- result = armv7_read_thumb_32_instr_asr_register(raw);
-
- else if ((op1 & b1110) == b0110 && op2 == b0000)
- result = armv7_read_thumb_32_instr_ror_register(raw);
-
- else if (op1 == b0000 && (op2 & b1000) == b1000)
- {
- if (rn == b1111)
- result = armv7_read_thumb_32_instr_sxth(raw);
- else
- result = armv7_read_thumb_32_instr_sxtah(raw);
- }
-
- else if (op1 == b0001 && (op2 & b1000) == b1000)
- {
- if (rn == b1111)
- result = armv7_read_thumb_32_instr_uxth(raw);
- else
- result = armv7_read_thumb_32_instr_uxtah(raw);
- }
-
- else if (op1 == b0010 && (op2 & b1000) == b1000)
- {
- if (rn == b1111)
- result = armv7_read_thumb_32_instr_sxtb16(raw);
- else
- result = armv7_read_thumb_32_instr_sxtab16(raw);
- }
-
- else if (op1 == b0011 && (op2 & b1000) == b1000)
- {
- if (rn == b1111)
- result = armv7_read_thumb_32_instr_uxtb16(raw);
- else
- result = armv7_read_thumb_32_instr_uxtab16(raw);
- }
-
- else if (op1 == b0100 && (op2 & b1000) == b1000)
- {
- if (rn == b1111)
- result = armv7_read_thumb_32_instr_sxtb(raw);
- else
- result = armv7_read_thumb_32_instr_sxtab(raw);
- }
-
- else if (op1 == b0101 && (op2 & b1000) == b1000)
- {
- if (rn == b1111)
- result = armv7_read_thumb_32_instr_uxtb(raw);
- else
- result = armv7_read_thumb_32_instr_uxtab(raw);
- }
-
- else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0000)
- result = process_armv7_thumb_32_parallel_addition_and_subtraction_signed(raw);
-
- else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0100)
- result = process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(raw);
-
- else if ((op1 & b1100) == b1000 && (op2 & b1100) == b1000)
- result = process_armv7_thumb_32_miscellaneous_operations(raw);
-
- return result;
+ if ((op1 & b1110) == b0000 && op2 == b0000)
+ result = armv7_read_thumb_32_instr_lsl_register(raw);
+
+ else if ((op1 & b1110) == b0010 && op2 == b0000)
+ result = armv7_read_thumb_32_instr_lsr_register(raw);
+
+ else if ((op1 & b1110) == b0100 && op2 == b0000)
+ result = armv7_read_thumb_32_instr_asr_register(raw);
+
+ else if ((op1 & b1110) == b0110 && op2 == b0000)
+ result = armv7_read_thumb_32_instr_ror_register(raw);
+
+ else if (op1 == b0000 && (op2 & b1000) == b1000)
+ {
+ if (rn == b1111)
+ result = armv7_read_thumb_32_instr_sxth(raw);
+ else
+ result = armv7_read_thumb_32_instr_sxtah(raw);
+ }
+
+ else if (op1 == b0001 && (op2 & b1000) == b1000)
+ {
+ if (rn == b1111)
+ result = armv7_read_thumb_32_instr_uxth(raw);
+ else
+ result = armv7_read_thumb_32_instr_uxtah(raw);
+ }
+
+ else if (op1 == b0010 && (op2 & b1000) == b1000)
+ {
+ if (rn == b1111)
+ result = armv7_read_thumb_32_instr_sxtb16(raw);
+ else
+ result = armv7_read_thumb_32_instr_sxtab16(raw);
+ }
+
+ else if (op1 == b0011 && (op2 & b1000) == b1000)
+ {
+ if (rn == b1111)
+ result = armv7_read_thumb_32_instr_uxtb16(raw);
+ else
+ result = armv7_read_thumb_32_instr_uxtab16(raw);
+ }
+
+ else if (op1 == b0100 && (op2 & b1000) == b1000)
+ {
+ if (rn == b1111)
+ result = armv7_read_thumb_32_instr_sxtb(raw);
+ else
+ result = armv7_read_thumb_32_instr_sxtab(raw);
+ }
+
+ else if (op1 == b0101 && (op2 & b1000) == b1000)
+ {
+ if (rn == b1111)
+ result = armv7_read_thumb_32_instr_uxtb(raw);
+ else
+ result = armv7_read_thumb_32_instr_uxtab(raw);
+ }
+
+ else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0000)
+ result = process_armv7_thumb_32_parallel_addition_and_subtraction_signed(raw);
+
+ else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0100)
+ result = process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(raw);
+
+ else if ((op1 & b1100) == b1000 && (op2 & b1100) == b1000)
+ result = process_armv7_thumb_32_miscellaneous_operations(raw);
+
+ return result;
}
@@ -1633,7 +1640,7 @@ static GArchInstruction *process_armv7_thumb_32_long_multiply_long_multiply_accu
case b101:
if ((op2 & b1110) == b1100)
- result = armv7_read_thumb_32_instr_(raw);
+ result = armv7_read_thumb_32_instr_smlsld(raw);
break;
case b110:
diff --git a/tools/d2c/coder.c b/tools/d2c/coder.c
index 5856d80..b4bf21f 100644
--- a/tools/d2c/coder.c
+++ b/tools/d2c/coder.c
@@ -455,6 +455,7 @@ bool dump_all_routines_using_coder(const rented_coder *coder)
const string_exch *encoding; /* Type d'encodage visé */
bool exist; /* Présence du fichier visé ? */
int header_fd; /* Fichier de déclarations */
+ char *uname; /* Nom en majuscule */
char *dash; /* Présence d'un tiret ? */
char *filename; /* Nom de fichier commun */
int code_fd; /* Fichier de définitions */
@@ -472,8 +473,12 @@ bool dump_all_routines_using_coder(const rented_coder *coder)
if (!exist)
{
- dprintf(header_fd, "#ifndef %s_OPCODES_OPCODES_H\n", coder->header);
- dprintf(header_fd, "#define %s_OPCODES_OPCODES_H\n", coder->header);
+ uname = make_string_upper(strdup(encoding->dest));
+
+ dprintf(header_fd, "#ifndef %s_%sOPCODES_OPCODES_H\n", coder->header, uname);
+ dprintf(header_fd, "#define %s_%sOPCODES_OPCODES_H\n", coder->header, uname);
+
+ free(uname);
dprintf(header_fd, "\n");
dprintf(header_fd, "\n");
@@ -506,7 +511,7 @@ bool dump_all_routines_using_coder(const rented_coder *coder)
if (!exist)
{
- dprintf(code_fd, "#include \"opcodes.h\"\n");
+ dprintf(code_fd, "#include \"%sopcodes.h\"\n", encoding->dest);
dprintf(code_fd, "\n");
dprintf(code_fd, "##INCLUDES##\n");
@@ -584,7 +589,8 @@ static bool dump_all_matching_specs_in_coder(const rented_coder *coder, const st
/* Désassemblage : déclaration */
dprintf(hfd, "/* Décode une instruction de type '%s'. */\n", coder->ins);
- dprintf(hfd, "GArchInstruction *%s_read_instr_%s%s(uint%u_t);\n", coder->arch, keyword, coder->details, wide);
+ dprintf(hfd, "GArchInstruction *%s_read_%sinstr_%s%s(uint%u_t);\n",
+ coder->arch, encoding->dest, keyword, coder->details, wide);
dprintf(hfd, "\n");
/* Désassemblage : définitions */
@@ -613,7 +619,8 @@ static bool dump_all_matching_specs_in_coder(const rented_coder *coder, const st
dprintf(cfd, "\n");
- dprintf(cfd, "GArchInstruction *%s_read_instr_%s%s(uint%u_t raw)", coder->arch, keyword, coder->details, wide);
+ dprintf(cfd, "GArchInstruction *%s_read_%sinstr_%s%s(uint%u_t raw)",
+ coder->arch, encoding->dest, keyword, coder->details, wide);
dprintf(cfd, "\n");
dprintf(cfd, "{");
dprintf(cfd, "\n");
@@ -631,7 +638,8 @@ static bool dump_all_matching_specs_in_coder(const rented_coder *coder, const st
if (!has_encoding_spec_prefix(spec, encoding->src))
continue;
- result = write_encoding_spec_disass(spec, cfd, coder->arch, coder->ins, coder->details, wide, coder->pp);
+ result = write_encoding_spec_disass(spec, cfd, coder->arch, encoding->dest,
+ coder->ins, coder->details, wide, coder->pp);
}
diff --git a/tools/d2c/conv.c b/tools/d2c/conv.c
index 323f63d..6676edc 100644
--- a/tools/d2c/conv.c
+++ b/tools/d2c/conv.c
@@ -428,7 +428,7 @@ static bool compute_conv_expr_size(const conv_expr_t *expr, const coding_bits *b
break;
- case CET_COMPOSED:
+ case CET_COMPOSED:
result = true;
*size = 0;
@@ -599,11 +599,22 @@ static bool ensure_conv_expr_content_fully_marked(conv_expr_t *expr, const codin
{
bool found; /* Bilan d'opération à renvoyer*/
raw_bitfield *field; /* Eventuel champ brut associé */
+ conv_func *func; /* Eventuelle fonction liée */
+
+ found = find_var_by_name(bts, lst, name, &field, &func);
- found = find_var_by_name(bts, lst, name, &field, NULL);
+ if (found)
+ {
+ if (field != NULL)
+ mark_raw_bitfield_as_used(field);
+ else /*if (func != NULL) */
+ mark_conv_func(func, bts, lst);
- if (found && field != NULL)
- mark_raw_bitfield_as_used(field);
+ printf(" VAR '%s' found (bf=%d fc=%d)\n", name, !!field, !!func);
+
+
+ }
+ else printf(" VAR '%s' not found...\n", name);
return found;
@@ -663,6 +674,7 @@ static bool ensure_conv_expr_content_fully_declared(conv_expr_t *expr, int fd, c
size_t i; /* Boucle de parcours */
/* Si l'expression a déjà été définie lors d'un précédent besoin... */
+ printf(" sub declared ? %d -- type = %d\n", sub->declared, sub->type);
if (sub->declared) return true;
bool declare_by_name(int _f, const coding_bits *_bts, const conv_list *_lst, unsigned int _wide, const char *name)
@@ -675,7 +687,9 @@ static bool ensure_conv_expr_content_fully_declared(conv_expr_t *expr, int fd, c
if (found && func != NULL)
{
dprintf(_f, "\t\tuint%u_t val_%s;\n", _wide, name);
+ printf("========= DECLARE for '%s'\n", name);
found = declare_conv_func(func, _f, _bts, _lst, _wide);
+ printf("========= END DECLARE for '%s'\n", name);
}
return found;
@@ -848,7 +862,7 @@ static bool define_conv_expr(conv_expr_t *expr, int fd, const coding_bits *bits,
dprintf(fd, "%lu", expr->number);
break;
- case CET_COMPOSED:
+ case CET_COMPOSED:
result = compute_conv_expr_size(expr, bits, list, &max_size);
@@ -1360,6 +1374,7 @@ bool declare_conv_func(conv_func *func, int fd, const coding_bits *bits, const c
bool result; /* Bilan à remonter */
/* Si la fonction a déjà été définie lors d'un précédent besoin... */
+ printf(" func declared ? %d\n", func->declared);
if (func->declared) return true;
if (func->is_expr)
diff --git a/tools/d2c/rules.c b/tools/d2c/rules.c
index a868864..73ec965 100644
--- a/tools/d2c/rules.c
+++ b/tools/d2c/rules.c
@@ -368,10 +368,12 @@ void register_conditional_rule(decoding_rules *rules, cond_expr *expr, CondActio
/******************************************************************************
* *
-* Paramètres : rules = ensemble de règles à consulter. *
-* fd = descripteur d'un flux ouvert en écriture. *
-* bits = gestionnaire des bits d'encodage. *
-* exit = exprime le besoin d'une voie de sortie. [OUT] *
+* Paramètres : rules = ensemble de règles à consulter. *
+* fd = descripteur d'un flux ouvert en écriture. *
+* arch = architecture visée par l'opération. *
+* subarch = sous-catégorie de cette même architecture. *
+* bits = gestionnaire des bits d'encodage. *
+* exit = exprime le besoin d'une voie de sortie. [OUT] *
* *
* Description : Traduit en code les éventuelles règles présentes. *
* *
@@ -381,7 +383,7 @@ void register_conditional_rule(decoding_rules *rules, cond_expr *expr, CondActio
* *
******************************************************************************/
-bool write_decoding_rules(decoding_rules *rules, int fd, const coding_bits *bits, bool *exit)
+bool write_decoding_rules(decoding_rules *rules, int fd, const char *arch, const char *subarch, const coding_bits *bits, bool *exit)
{
bool result; /* Bilan à remonter */
const extra_rule *rule; /* Règle en cours d'écriture */
@@ -414,7 +416,7 @@ bool write_decoding_rules(decoding_rules *rules, int fd, const coding_bits *bits
goto wcsr_exit;
}
- dprintf(fd, "\t\t\tinstr = armv7_read_instr_%s", rule->details);
+ dprintf(fd, "\t\t\tinstr = %s_read_%sinstr_%s", arch, subarch, rule->details);
/* TODO : adapter les paramètres d'appel selon le 'coder' */
dprintf(fd, "(_raw);\n");
diff --git a/tools/d2c/rules.h b/tools/d2c/rules.h
index 8530d76..af2cac5 100644
--- a/tools/d2c/rules.h
+++ b/tools/d2c/rules.h
@@ -85,7 +85,7 @@ void delete_decoding_rules(decoding_rules *);
void register_conditional_rule(decoding_rules *, cond_expr *, CondActionType, const char *);
/* Traduit en code les éventuelles règles présentes. */
-bool write_decoding_rules(decoding_rules *, int, const coding_bits *, bool *);
+bool write_decoding_rules(decoding_rules *, int, const char *, const char *, const coding_bits *, bool *);
diff --git a/tools/d2c/spec.c b/tools/d2c/spec.c
index 675fd05..867df37 100644
--- a/tools/d2c/spec.c
+++ b/tools/d2c/spec.c
@@ -246,6 +246,7 @@ decoding_rules *get_rules_in_encoding_spec(const encoding_spec *spec)
* Paramètres : spec = spécification servant de base à l'opération. *
* fd = descripteur d'un flux ouvert en écriture. *
* arch = architecture visée par l'opération. *
+* subarch = sous-catégorie de cette même architecture. *
* ins = désignation première de l'instruction manipulée. *
* details = particularités de l'instruction. *
* keyword = nom clef de l'instruction utilisable dans du code. *
@@ -260,7 +261,7 @@ decoding_rules *get_rules_in_encoding_spec(const encoding_spec *spec)
* *
******************************************************************************/
-bool write_encoding_spec_disass(const encoding_spec *spec, int fd, const char *arch, const char *ins, const char *details, unsigned int wide, const pre_processor *pp)
+bool write_encoding_spec_disass(const encoding_spec *spec, int fd, const char *arch, const char *subarch, const char *ins, const char *details, unsigned int wide, const pre_processor *pp)
{
bool result; /* Bilan à retourner */
char *keyword; /* Mot clef appelable en code */
@@ -301,7 +302,7 @@ bool write_encoding_spec_disass(const encoding_spec *spec, int fd, const char *a
/* Inclusion des éventuelles règles */
- result &= write_decoding_rules(spec->rules, fd, spec->bits, &exit);
+ result &= write_decoding_rules(spec->rules, fd, arch, subarch, spec->bits, &exit);
/* Création de l'instruction en elle-même */
diff --git a/tools/d2c/spec.h b/tools/d2c/spec.h
index 46d922b..561fc32 100644
--- a/tools/d2c/spec.h
+++ b/tools/d2c/spec.h
@@ -65,7 +65,7 @@ conv_list *get_conversions_in_encoding_spec(const encoding_spec *);
decoding_rules *get_rules_in_encoding_spec(const encoding_spec *);
/* Traduit en code une sous-fonction de désassemblage. */
-bool write_encoding_spec_disass(const encoding_spec *, int, const char *, const char *, const char *, unsigned int, const pre_processor *);
+bool write_encoding_spec_disass(const encoding_spec *, int, const char *, const char *, const char *, const char *, unsigned int, const pre_processor *);
--
cgit v0.11.2-87-g4458