/* Chrysalide - Outil d'analyse de fichiers binaires
 * ##FILE## - traduction d'instructions ARMv7
 *
 * Copyright (C) 2015 Cyrille Bagard
 *
 *  This file is part of Chrysalide.
 *
 *  Chrysalide is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 3 of the License, or
 *  (at your option) any later version.
 *
 *  Chrysalide is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
 */


@title STR (immediate, Thumb)

@desc Store Register (immediate) calculates an address from a base register value and an immediate offset, and stores a word from a register to memory. It can use offset, post-indexed, or pre-indexed addressing. For information about memory accesses see Memory accesses on page A8-294.

@encoding (t1) {

	@half 0 1 1 0 0 imm5(5) Rn(3) Rt(3)

	@syntax <reg_T> <mem_access>

	@conv {

		reg_T = Register(Rt)
		reg_N = Register(Rn)
		imm32 = ZeroExtend(imm5:'00', 32)
		mem_access = MakeMemoryAccess(reg_N, imm32, NULL, true, true, false)

	}

}

@encoding (t2) {

	@half 1 0 0 1 0 Rt(3) imm8(8)

	@syntax <reg_T> <mem_access>

	@conv {

		reg_T = Register(Rt)
		imm32 = ZeroExtend(imm8:'00', 32)
		SP = Register(13)
		mem_access = MakeMemoryAccess(SP, imm32, NULL, true, true, false)

	}

}

@encoding (T3) {

	@word 1 1 1 1 1 0 0 0 1 1 0 0 Rn(4) Rt(4) imm12(12)

	@syntax ".W" <reg_T> <mem_access>

	@conv {

		reg_T = Register(Rt)
		reg_N = Register(Rn)
		imm32 = ZeroExtend(imm12, 32)
		mem_access = MakeMemoryAccess(reg_N, imm32, NULL, true, true, false)

	}

}

@encoding (T4) {

	@word 1 1 1 1 1 0 0 0 0 1 0 0 Rn(4) Rt(4) 1 P(1) U(1) W(1) imm8(8)

	@syntax <reg_T> <mem_access>

	@conv {

		reg_T = Register(Rt)
		reg_N = Register(Rn)
		imm32 = ZeroExtend(imm8, 32)
		index = (P == '1')
		add = (U == '1')
		wback = (W == '1')
		mem_access = MakeMemoryAccess(reg_N, imm32, NULL, index, add, wback)

	}

}