/* Chrysalide - Outil d'analyse de fichiers binaires
* thumb_32.c - désassemblage des instructions ARMv7 Thumb 32 bits
*
* Copyright (C) 2014 Cyrille Bagard
*
* This file is part of Chrysalide.
*
* Chrysalide is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* Chrysalide is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with Foobar. If not, see .
*/
#include "thumb_32.h"
#include
#include "simd.h"
#include "opcodes/thumb_32_opcodes.h"
#include "opcodes/opcodes_tmp_thumb_32.h"
#include "../../undefined.h"
#include "../../../common/bconst.h"
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.1. */
static GArchInstruction *process_armv7_thumb_32_data_processing_modified_immediate(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.3. */
static GArchInstruction *process_armv7_thumb_32_data_processing_plain_binary_immediate(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.4. */
static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.4b. */
static GArchInstruction *process_armv7_thumb_32_change_processor_state_and_hints(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.4t. */
static GArchInstruction *process_armv7_thumb_32_miscellaneous_control_instructions(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.5. */
static GArchInstruction *process_armv7_thumb_32_load_store_multiple(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.6. */
static GArchInstruction *process_armv7_thumb_32_load_store_dual_load_store_exclusive_table_branch(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.7. */
static GArchInstruction *process_armv7_thumb_32_load_word(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.8. */
static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.9. */
static GArchInstruction *process_armv7_thumb_32_load_byte_memory_hints(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.10. */
static GArchInstruction *process_armv7_thumb_32_store_single_data_item(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.11. */
static GArchInstruction *process_armv7_thumb_32_data_processing_shifted_register(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.11b. */
static GArchInstruction *process_armv7_thumb_32_move_register_and_immediate_shifts(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.12. */
static GArchInstruction *process_armv7_thumb_32_data_processing_register(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.13. */
static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_signed(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.14. */
static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.15. */
static GArchInstruction *process_armv7_thumb_32_miscellaneous_operations(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.16. */
static GArchInstruction *process_armv7_thumb_32_multiply_multiply_accumulate_and_absolute_difference(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.17. */
static GArchInstruction *process_armv7_thumb_32_long_multiply_long_multiply_accumulate_and_divide(uint32_t);
/* Désassemble une instruction ARMv7 liées au chapitre A6.3.18. */
static GArchInstruction *process_armv7_thumb_32_coprocessor_advanced_simd_and_floating_point_instructions(uint32_t);
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
uint32_t op; /* Champ 'op' à retrouver */
/**
* Suit les directives de :
* § A6.3 32-bit Thumb instruction encoding
*/
if (((raw >> 29) & b111) != b111) return NULL;
result = NULL;
op1 = (raw >> 27) & b11;
op2 = (raw >> 20) & b1111111;
op = (raw >> 15) & b1;
switch (op1)
{
case b01:
if ((op2 & b1100100) == b0000000)
result = process_armv7_thumb_32_load_store_multiple(raw);
else if ((op2 & b1100100) == b0000100)
result = process_armv7_thumb_32_load_store_dual_load_store_exclusive_table_branch(raw);
else if ((op2 & b1100000) == b0100000)
result = process_armv7_thumb_32_data_processing_shifted_register(raw);
else if ((op2 & b1000000) == b1000000)
result = process_armv7_thumb_32_coprocessor_advanced_simd_and_floating_point_instructions(raw);
break;
case b10:
if (op == 1)
result = process_armv7_thumb_32_branches_and_miscellaneous_control(raw);
else
{
if ((op2 & b0100000) == b0000000)
result = process_armv7_thumb_32_data_processing_modified_immediate(raw);
else if ((op2 & b0100000) == b0100000)
result = process_armv7_thumb_32_data_processing_plain_binary_immediate(raw);
}
break;
case b11:
if ((op2 & b1110001) == b0000000)
result = process_armv7_thumb_32_store_single_data_item(raw);
else if ((op2 & b1100111) == b0000001)
result = process_armv7_thumb_32_load_byte_memory_hints(raw);
else if ((op2 & b1100111) == b0000011)
result = process_armv7_thumb_32_load_halfword_memory_hints(raw);
else if ((op2 & b1100111) == b0000101)
result = process_armv7_thumb_32_load_word(raw);
else if ((op2 & b1100111) == b0000111)
result = g_undef_instruction_new(IBS_UNDEFINED);
else if ((op2 & b1110001) == b0010000)
result = process_armv7_simd_advanced_simd_element_or_structure_load_store_instructions(raw, false);
else if ((op2 & b1110000) == b0100000)
result = process_armv7_thumb_32_data_processing_register(raw);
else if ((op2 & b1111000) == b0110000)
result = process_armv7_thumb_32_multiply_multiply_accumulate_and_absolute_difference(raw);
else if ((op2 & b1111000) == b0111000)
result = process_armv7_thumb_32_long_multiply_long_multiply_accumulate_and_divide(raw);
else if ((op2 & b1000000) == b1000000)
result = process_armv7_thumb_32_coprocessor_advanced_simd_and_floating_point_instructions(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.1. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_data_processing_modified_immediate(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op; /* Champ 'op' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t rds; /* Champ 'rds' à retrouver */
/**
* Suit les directives de :
* § A6.3.1 Data-processing (modified immediate)
*/
if ((raw & 0xfa008000) != 0xf0000000) return NULL;
result = NULL;
op = (raw >> 21) & b1111;
rn = (raw >> 16) & b1111;
rds = (((raw >> 8) & b1111) << 1) | ((raw >> 20) & b1);
switch (op)
{
case b0000:
if (rds == b11111)
result = armv7_read_thumb_32_instr_tst_immediate(raw);
else
result = armv7_read_thumb_32_instr_and_immediate(raw);
break;
case b0001:
result = armv7_read_thumb_32_instr_bic_immediate(raw);
break;
case b0010:
if (rn == b1111)
result = armv7_read_thumb_32_instr_mov_immediate(raw);
else
result = armv7_read_thumb_32_instr_orr_immediate(raw);
break;
case b0011:
if (rn == b1111)
result = armv7_read_thumb_32_instr_mvn_immediate(raw);
else
result = armv7_read_thumb_32_instr_orn_immediate(raw);
break;
case b0100:
if (rds == b11111)
result = armv7_read_thumb_32_instr_teq_immediate(raw);
else
result = armv7_read_thumb_32_instr_eor_immediate(raw);
break;
case b1000:
if (rds == b11111)
result = armv7_read_thumb_32_instr_cmn_immediate(raw);
else
result = armv7_read_thumb_32_instr_add_immediate_thumb(raw);
break;
case b1010:
result = armv7_read_thumb_32_instr_adc_immediate(raw);
break;
case b1011:
result = armv7_read_thumb_32_instr_sbc_immediate(raw);
break;
case b1101:
if (rds == b11111)
result = armv7_read_thumb_32_instr_cmp_immediate(raw);
else
result = armv7_read_thumb_32_instr_sub_immediate_thumb(raw);
break;
case b1110:
result = armv7_read_thumb_32_instr_rsb_immediate(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.3. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_data_processing_plain_binary_immediate(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op; /* Champ 'op' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
/**
* Suit les directives de :
* § A6.3.3 Data-processing (plain binary immediate)
*/
if ((raw & 0xfa008000) != 0xf2000000) return NULL;
result = NULL;
op = (raw >> 20) & b11111;
rn = (raw >> 16) & b1111;
switch (op)
{
case b00000:
if (rn == b1111)
result = armv7_read_thumb_32_instr_adr(raw);
else
result = armv7_read_thumb_32_instr_add_immediate_thumb(raw);
break;
case b00100:
result = armv7_read_thumb_32_instr_mov_immediate(raw);
break;
case b01010:
if (rn == b11111)
result = armv7_read_thumb_32_instr_adr(raw);
else
result = armv7_read_thumb_32_instr_sub_immediate_thumb(raw);
break;
case b01100:
result = armv7_read_thumb_32_instr_movt(raw);
break;
case b10000:
result = armv7_read_thumb_32_instr_ssat(raw);
break;
case b10010:
if ((raw & 0x000070c0) != 0)
result = armv7_read_thumb_32_instr_ssat(raw);
else
result = armv7_read_thumb_32_instr_ssat16(raw);
break;
case b10100:
result = armv7_read_thumb_32_instr_sbfx(raw);
break;
case b10110:
if (rn == b11111)
result = armv7_read_thumb_32_instr_bfc(raw);
else
result = armv7_read_thumb_32_instr_bfi(raw);
break;
case b11000:
result = armv7_read_thumb_32_instr_usat(raw);
break;
case b11010:
if ((raw & 0x000070c0) != 0)
result = armv7_read_thumb_32_instr_usat(raw);
else
result = armv7_read_thumb_32_instr_usat16(raw);
break;
case b11100:
result = armv7_read_thumb_32_instr_ubfx(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.4. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op; /* Champ 'op' à retrouver */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
uint32_t imm8; /* Champ 'imm8' à retrouver */
/**
* Suit les directives de :
* § A6.3.4 Branches and miscellaneous control
*/
if ((raw & 0xf8000000) != 0xf0000000) return NULL;
result = NULL;
op = (raw >> 20) & b1111111;
op1 = (raw >> 12) & b111;
op2 = (raw >> 8) & b1111;
imm8 = (raw >> 0) & b11111111;
if (op1 == b000 && op == b1111110)
result = armv7_read_thumb_32_instr_hvc(raw);
else if (op1 == b000 && op == b1111111)
result = armv7_read_thumb_32_instr_smc_previously_smi(raw);
else if ((op1 & b101) == b000)
{
if ((op & b0111000) != b0111000)
result = armv7_read_thumb_32_instr_b(raw);
else if ((imm8 & b00100000) == b00100000 && (op & b1111110) == b0111000)
result = armv7_read_thumb_32_instr_msr_banked_register(raw);
else if ((imm8 & b00100000) == b00000000 && op == b0111000 && (op2 & b0011) == b0000)
result = armv7_read_thumb_32_instr_msr_register(raw);
else if ((imm8 & b00100000) == b00000000 && op == b0111000 && (op2 & b0011) == b0001)
result = armv7_read_thumb_32_instr_b_msr_register(raw);
else if ((imm8 & b00100000) == b00000000 && op == b0111000 && (op2 & b0010) == b0010)
result = armv7_read_thumb_32_instr_b_msr_register(raw);
else if ((imm8 & b00100000) == b00000000 && op == b0111001)
result = armv7_read_thumb_32_instr_b_msr_register(raw);
else if (op == b0111010)
result = process_armv7_thumb_32_change_processor_state_and_hints(raw);
else if (op == b0111011)
result = process_armv7_thumb_32_miscellaneous_control_instructions(raw);
else if (op == b0111100)
result = armv7_read_thumb_32_instr_bxj(raw);
else if (imm8 == b00000000 && op == b0111101)
result = armv7_read_thumb_32_instr_eret(raw);
else if (imm8 != b00000000 && op == b0111101)
result = armv7_read_thumb_32_instr_subs_pc_lr_thumb(raw);
else if ((imm8 & b00100000) == b00100000 && (op & b1111110) == b0111110)
result = armv7_read_thumb_32_instr_mrs_banked_register(raw);
else if ((imm8 & b00100000) == b00000000 && op == b0111110)
result = armv7_read_thumb_32_instr_mrs(raw);
else if ((imm8 & b00100000) == b00000000 && op == b0111111)
result = armv7_read_thumb_32_instr_b_mrs(raw);
}
else if ((op1 & b101) == b001)
result = armv7_read_thumb_32_instr_b(raw);
else if (op1 == b010 && op == b1111111)
result = armv7_read_thumb_32_instr_udf(raw);
else if ((op1 & b101) == b100)
result = armv7_read_thumb_32_instr_bl_blx_immediate(raw);
else if ((op1 & b101) == b101)
result = armv7_read_thumb_32_instr_bl_blx_immediate(raw);
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 classique. *
* *
* Retour : Désassemble une instruction ARMv7 liées au chapitre A6.3.4b. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_change_processor_state_and_hints(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.4 Branches and miscellaneous control
* |-> Change Processor State, and hints
*/
if ((raw & 0xfff0d000) != 0xf3a08000) return NULL;
result = NULL;
op1 = (raw >> 8) & b111;
op2 = (raw >> 0) & b11111111;
if (op1 != b000)
result = armv7_read_thumb_32_instr_cps_thumb(raw);
else
{
if (op2 == b00000000)
result = armv7_read_thumb_32_instr_nop(raw);
else if (op2 == b00000001)
result = armv7_read_thumb_32_instr_yield(raw);
else if (op2 == b00000010)
result = armv7_read_thumb_32_instr_wfe(raw);
else if (op2 == b00000011)
result = armv7_read_thumb_32_instr_wfi(raw);
else if (op2 == b00000100)
result = armv7_read_thumb_32_instr_sev(raw);
else if ((op2 & b11110000) == b11110000)
result = armv7_read_thumb_32_instr_dbg(raw);
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.4t. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_miscellaneous_control_instructions(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op; /* Champ 'op' à retrouver */
/**
* Suit les directives de :
* § A6.3.4 Branches and miscellaneous control
* |-> Miscellaneous control instructions
*/
if ((raw & 0xfff0d000) != 0xf3b08000) return NULL;
result = NULL;
op = (raw >> 4) & b1111;
switch (op)
{
case b0000:
result = armv7_read_thumb_32_instr_enterx_leavex(raw);
break;
case b0001:
result = armv7_read_thumb_32_instr_enterx_leavex(raw);
break;
case b0010:
result = armv7_read_thumb_32_instr_clrex(raw);
break;
case b0100:
result = armv7_read_thumb_32_instr_dsb(raw);
break;
case b0101:
result = armv7_read_thumb_32_instr_dmb(raw);
break;
case b0110:
result = armv7_read_thumb_32_instr_isb(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.5. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_load_store_multiple(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op; /* Champ 'op' à retrouver */
uint32_t l; /* Champ 'l' à retrouver */
uint32_t wrn; /* Champ 'wrn' à retrouver */
/**
* Suit les directives de :
* § A6.3.5 Load/store multiple
*/
if ((raw & 0xfe400000) != 0xe8000000) return NULL;
result = NULL;
op = (raw >> 23) & b11;
l = (raw >> 20) & b1;
wrn = (((raw >> 21) & b1) << 4) | ((raw >> 16) & b1111);
switch (op)
{
case b00:
if (l == b0)
result = armv7_read_thumb_32_instr_srs_thumb(raw);
else
result = armv7_read_thumb_32_instr_rfe(raw);
break;
case b01:
if (l == b0)
result = armv7_read_thumb_32_instr_stm_stmia_stmea(raw);
else
{
if (wrn == b11101)
result = armv7_read_thumb_32_instr_pop_thumb(raw);
else
result = armv7_read_thumb_32_instr_ldm_ldmia_ldmfd_thumb(raw);
}
break;
case b10:
if (l == b0)
{
if (wrn == b11101)
result = armv7_read_thumb_32_instr_push(raw);
else
result = armv7_read_thumb_32_instr_stmdb_stmfd(raw);
}
else
result = armv7_read_thumb_32_instr_ldmdb_ldmea(raw);
break;
case b11:
if (l == b0)
result = armv7_read_thumb_32_instr_srs_thumb(raw);
else
result = armv7_read_thumb_32_instr_rfe(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.6. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_load_store_dual_load_store_exclusive_table_branch(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t op3; /* Champ 'op3' à retrouver */
/**
* Suit les directives de :
* § A6.3.6 Load/store dual, load/store exclusive, table branch
*/
if ((raw & 0xfe400000) != 0xe8400000) return NULL;
result = NULL;
op1 = (raw >> 23) & 0x3;
op2 = (raw >> 20) & 0x3;
rn = (raw >> 16) & 0xf;
op3 = (raw >> 4) & 0xf;
if (op1 == b00 && op2 == b00)
result = armv7_read_thumb_32_instr_strex(raw);
else if (op1 == b00 && op2 == b01)
result = armv7_read_thumb_32_instr_ldrex(raw);
else if ((op1 & b10) == b00 && op2 == b10)
result = armv7_read_thumb_32_instr_strd_immediate(raw);
else if ((op1 & b10) == b10 && (op2 & b01) == b00)
result = armv7_read_thumb_32_instr_strd_immediate(raw);
else if ((op1 & b10) == b00 && op2 == b11)
{
if (rn != b1111)
result = armv7_read_thumb_32_instr_ldrd_immediate(raw);
else/* if (rn == b1111)*/
result = armv7_read_thumb_32_instr_ldrd_literal(raw);
}
else if ((op1 & b10) == b10 && (op2 & b01) == b01)
{
if (rn != b1111)
result = armv7_read_thumb_32_instr_ldrd_immediate(raw);
else/* if (rn == b1111)*/
result = armv7_read_thumb_32_instr_ldrd_literal(raw);
}
else if (op1 == b01 && op2 == b00)
switch (op3)
{
case b0100:
result = armv7_read_thumb_32_instr_strexb(raw);
break;
case b0101:
result = armv7_read_thumb_32_instr_strexh(raw);
break;
case b0111:
result = armv7_read_thumb_32_instr_strexd(raw);
break;
}
else if (op1 == b01 && op2 == b01)
switch (op3)
{
case b0000:
result = armv7_read_thumb_32_instr_tbb_tbh(raw);
break;
case b0001:
result = armv7_read_thumb_32_instr_tbb_tbh(raw);
break;
case b0100:
result = armv7_read_thumb_32_instr_ldrexb(raw);
break;
case b0101:
result = armv7_read_thumb_32_instr_ldrexh(raw);
break;
case b0111:
result = armv7_read_thumb_32_instr_ldrexd(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.7. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_load_word(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.7 Load word
*/
if ((raw & 0xfe700000) != 0xf8500000) return NULL;
result = NULL;
op1 = (raw >> 23) & b11;
rn = (raw >> 16) & b1111;
op2 = (raw >> 6) & b111111;
switch (op1)
{
case b00:
if (op2 == b000000 && rn != b1111)
result = armv7_read_thumb_32_instr_ldr_register_thumb(raw);
else if ((op2 & b100100) == b100100 && rn != b1111)
result = armv7_read_thumb_32_instr_ldr_immediate_thumb(raw);
else if ((op2 & b111100) == b110000 && rn != b1111)
result = armv7_read_thumb_32_instr_ldr_immediate_thumb(raw);
else if ((op2 & b111100) == b111000 && rn != b1111)
result = armv7_read_thumb_32_instr_ldrt(raw);
break;
case b01:
if (rn != b1111)
result = armv7_read_thumb_32_instr_ldr_immediate_thumb(raw);
break;
}
if (result == NULL && (op1 & b10) == b00 && rn == b1111)
result = armv7_read_thumb_32_instr_ldr_literal(raw);
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.8. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t rt; /* Champ 'rt' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.8 Load halfword, memory hints
*/
if ((raw & 0xfe700000) != 0xf8300000) return NULL;
result = NULL;
op1 = (raw >> 23) & 0x3;
rn = (raw >> 16) & 0xf;
rt = (raw >> 12) & 0xf;
op2 = (raw >> 6) & 0x3f;
if (rn == b1111)
{
if ((op1 & b10) == b00)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrh_literal(raw);
else/* if (rt == b1111)*/
result = armv7_read_thumb_32_instr_pld_literal(raw);
}
else/* if ((op1 & b10) == b10)*/
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrsh_literal(raw);
else/* if (rt == b1111)*/
result = g_undef_instruction_new(IBS_NOP);
}
}
else/* if (rn != b1111)*/
{
if (op1 == b00)
{
if ((op2 & b100100) == b100100)
result = armv7_read_thumb_32_instr_ldrh_immediate_thumb(raw);
else if ((op2 & b111100) == b110000 && rt != b1111)
result = armv7_read_thumb_32_instr_ldrh_immediate_thumb(raw);
else if (op2 == b000000 && rt != b1111)
result = armv7_read_thumb_32_instr_ldrh_register(raw);
else if ((op2 & b111100) == b111000)
result = armv7_read_thumb_32_instr_ldrht(raw);
else if (op2 == b000000 && rt == b1111)
result = armv7_read_thumb_32_instr_pld_pldw_register(raw);
else if ((op2 & b111100) == b110000 && rt == b1111)
result = armv7_read_thumb_32_instr_pld_pldw_immediate(raw);
}
else if (op1 == b01)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrh_immediate_thumb(raw);
else/* if (rt == b1111)*/
result = armv7_read_thumb_32_instr_pld_pldw_immediate(raw);
}
else if (op1 == b10)
{
if ((op2 & b100100) == b100100)
result = armv7_read_thumb_32_instr_ldrsh_immediate(raw);
else if ((op2 & b111100) == b110000 && rt != b1111)
result = armv7_read_thumb_32_instr_ldrsh_immediate(raw);
else if (op2 == b000000 && rt != b1111)
result = armv7_read_thumb_32_instr_ldrsh_register(raw);
else if ((op2 & b111100) == b111000)
result = armv7_read_thumb_32_instr_ldrsht(raw);
else if (op2 == b000000 && rt == b1111)
result = g_undef_instruction_new(IBS_NOP);
else if ((op2 & b111100) == b110000 && rt == b1111)
result = g_undef_instruction_new(IBS_NOP);
}
else if (op1 == b11)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrsh_immediate(raw);
else/* if (rt == b1111)*/
result = g_undef_instruction_new(IBS_NOP);
}
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.9. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_load_byte_memory_hints(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t rt; /* Champ 'rt' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.9 Load byte, memory hints
*/
if ((raw & 0xfe700000) != 0xf8100000) return NULL;
result = NULL;
op1 = (raw >> 23) & b11;
rn = (raw >> 16) & b1111;
rt = (raw >> 12) & b1111;
op2 = (raw >> 6) & b111111;
if (op1 == b00 && op2 == b000000 && rn != b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrb_register(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pld_register(raw);
}
else if ((op1 & b10) == b00 && rn == b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrb_literal(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pld_literal(raw);
}
else if (op1 == b00 && (op2 & b100100) == b100100 && rn != b1111)
result = armv7_read_thumb_32_instr_ldrb_immediate_thumb(raw);
else if (op1 == b00 && (op2 & b111100) == b110000 && rn != b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrb_immediate_thumb(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pld_immediate(raw);
}
else if (op1 == b00 && (op2 & b111100) == b111000 && rn != b1111)
result = armv7_read_thumb_32_instr_ldrbt(raw);
else if (op1 == b01 && rn != b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrb_immediate_thumb(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pld_immediate(raw);
}
if (op1 == b10 && op2 == b000000 && rn != b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrsb_register(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pli_register(raw);
}
else if ((op1 & b10) == b10 && rn == b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrsb_literal(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pli_immediate_literal(raw);
}
else if (op1 == b10 && (op2 & b100100) == b100100 && rn != b1111)
result = armv7_read_thumb_32_instr_ldrsb_immediate(raw);
else if (op1 == b10 && (op2 & b111100) == b110000 && rn != b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrsb_immediate(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pli_immediate_literal(raw);
}
else if (op1 == b10 && (op2 & b111100) == b111000 && rn != b1111)
result = armv7_read_thumb_32_instr_ldrsbt(raw);
else if (op1 == b11 && rn != b1111)
{
if (rt != b1111)
result = armv7_read_thumb_32_instr_ldrsb_immediate(raw);
else /*if (rt == b1111) */
result = armv7_read_thumb_32_instr_pli_immediate_literal(raw);
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.10. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_store_single_data_item(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.10 Store single data item
*/
if ((raw & 0xff100000) != 0xf8000000) return NULL;
result = NULL;
op1 = (raw >> 21) & b111;
op2 = (raw >> 6) & b111111;
switch (op1)
{
case b000:
if (op2 == b000000)
result = armv7_read_thumb_32_instr_strb_register(raw);
else if ((op2 & b100100) == b100100)
result = armv7_read_thumb_32_instr_strb_immediate_thumb(raw);
else if ((op2 & b111100) == b110000)
result = armv7_read_thumb_32_instr_strb_immediate_thumb(raw);
else if ((op2 & b111100) == b111000)
result = armv7_read_thumb_32_instr_strbt(raw);
break;
case b001:
if (op2 == b000000)
result = armv7_read_thumb_32_instr_strh_register(raw);
else if ((op2 & b100100) == b100100)
result = armv7_read_thumb_32_instr_strh_immediate_thumb(raw);
else if ((op2 & b111100) == b110000)
result = armv7_read_thumb_32_instr_strh_immediate_thumb(raw);
else if ((op2 & b111100) == b111000)
result = armv7_read_thumb_32_instr_strht(raw);
break;
case b010:
if (op2 == b000000)
result = armv7_read_thumb_32_instr_str_register(raw);
else if ((op2 & b100100) == b100100)
result = armv7_read_thumb_32_instr_str_immediate_thumb(raw);
else if ((op2 & b111100) == b110000)
result = armv7_read_thumb_32_instr_str_immediate_thumb(raw);
else if ((op2 & b111100) == b111000)
result = armv7_read_thumb_32_instr_strt(raw);
break;
case b100:
result = armv7_read_thumb_32_instr_strb_immediate_thumb(raw);
break;
case b101:
result = armv7_read_thumb_32_instr_strh_immediate_thumb(raw);
break;
case b110:
result = armv7_read_thumb_32_instr_str_immediate_thumb(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.11. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_data_processing_shifted_register(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op; /* Champ 'op' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t rds; /* Champ 'rds' à retrouver */
/**
* Suit les directives de :
* § A6.3.11 Data-processing (shifted register)
*/
if ((raw & 0xfe000000) != 0xea000000) return NULL;
result = NULL;
op = (raw >> 21) & b1111;
rn = (raw >> 16) & b1111;
rds = (((raw >> 8) & b1111) << 1) | ((raw >> 20) & b1);
switch (op)
{
case b0000:
if (rds == b11111)
result = armv7_read_thumb_32_instr_tst_register(raw);
else
result = armv7_read_thumb_32_instr_and_register(raw);
break;
case b0001:
result = armv7_read_thumb_32_instr_bic_register(raw);
break;
case b0010:
if (rn == b11111)
result = process_armv7_thumb_32_move_register_and_immediate_shifts(raw);
else
result = armv7_read_thumb_32_instr_orr_register(raw);
break;
case b0011:
if (rn == b11111)
result = armv7_read_thumb_32_instr_mvn_register(raw);
else
result = armv7_read_thumb_32_instr_orn_register(raw);
break;
case b0100:
if (rds == b11111)
result = armv7_read_thumb_32_instr_teq_register(raw);
else
result = armv7_read_thumb_32_instr_eor_register(raw);
break;
case b0110:
result = armv7_read_thumb_32_instr_pkh(raw);
break;
case b1000:
if (rds == b11111)
result = armv7_read_thumb_32_instr_cmn_register(raw);
else
result = armv7_read_thumb_32_instr_add_register_thumb(raw);
break;
case b1010:
result = armv7_read_thumb_32_instr_adc_register(raw);
break;
case b1011:
result = armv7_read_thumb_32_instr_sbc_register(raw);
break;
case b1101:
if (rds == b11111)
result = armv7_read_thumb_32_instr_cmp_register(raw);
else
result = armv7_read_thumb_32_instr_sub_register_thumb(raw);
break;
case b1110:
result = armv7_read_thumb_32_instr_rsb_register(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.11b.*
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_move_register_and_immediate_shifts(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t imm5; /* Champs 'imm[32]' à retrouver*/
uint32_t type; /* Champ 'type' à retrouver */
/**
* Suit les directives de :
* § A6.3.11 Data-processing (shifted register)
* |-> Move register and immediate shifts
*/
if ((raw & 0xffef0000) != 0xea4f0000) return NULL;
result = NULL;
imm5 = (((raw >> 12) & 0x7) << 2) | ((raw >> 6) & 0x3);
type = (raw >> 4) & 0x3;
switch (type)
{
case b00:
if (imm5 == b00000)
result = armv7_read_thumb_32_instr_mov_register_thumb(raw);
else/* if (imm5 != b00000)*/
result = armv7_read_thumb_32_instr_lsl_immediate(raw);
break;
case b01:
result = armv7_read_thumb_32_instr_lsr_immediate(raw);
break;
case b10:
result = armv7_read_thumb_32_instr_asr_immediate(raw);
break;
case b11:
if (imm5 == b00000)
result = armv7_read_thumb_32_instr_rrx(raw);
else/* if (imm5 != b00000)*/
result = armv7_read_thumb_32_instr_ror_immediate(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.12. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_data_processing_register(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.12 Data-processing (register)
*/
if ((raw & 0xff00f000) != 0xfa00f000) return NULL;
result = NULL;
op1 = (raw >> 20) & b1111;
rn = (raw >> 16) & b1111;
op2 = (raw >> 4) & b1111;
if ((op1 & b1110) == b0000 && op2 == b0000)
result = armv7_read_thumb_32_instr_lsl_register(raw);
else if ((op1 & b1110) == b0010 && op2 == b0000)
result = armv7_read_thumb_32_instr_lsr_register(raw);
else if ((op1 & b1110) == b0100 && op2 == b0000)
result = armv7_read_thumb_32_instr_asr_register(raw);
else if ((op1 & b1110) == b0110 && op2 == b0000)
result = armv7_read_thumb_32_instr_ror_register(raw);
else if (op1 == b0000 && (op2 & b1000) == b1000)
{
if (rn == b1111)
result = armv7_read_thumb_32_instr_sxth(raw);
else
result = armv7_read_thumb_32_instr_sxtah(raw);
}
else if (op1 == b0001 && (op2 & b1000) == b1000)
{
if (rn == b1111)
result = armv7_read_thumb_32_instr_uxth(raw);
else
result = armv7_read_thumb_32_instr_uxtah(raw);
}
else if (op1 == b0010 && (op2 & b1000) == b1000)
{
if (rn == b1111)
result = armv7_read_thumb_32_instr_sxtb16(raw);
else
result = armv7_read_thumb_32_instr_sxtab16(raw);
}
else if (op1 == b0011 && (op2 & b1000) == b1000)
{
if (rn == b1111)
result = armv7_read_thumb_32_instr_uxtb16(raw);
else
result = armv7_read_thumb_32_instr_uxtab16(raw);
}
else if (op1 == b0100 && (op2 & b1000) == b1000)
{
if (rn == b1111)
result = armv7_read_thumb_32_instr_sxtb(raw);
else
result = armv7_read_thumb_32_instr_sxtab(raw);
}
else if (op1 == b0101 && (op2 & b1000) == b1000)
{
if (rn == b1111)
result = armv7_read_thumb_32_instr_uxtb(raw);
else
result = armv7_read_thumb_32_instr_uxtab(raw);
}
else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0000)
result = process_armv7_thumb_32_parallel_addition_and_subtraction_signed(raw);
else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0100)
result = process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(raw);
else if ((op1 & b1100) == b1000 && (op2 & b1100) == b1000)
result = process_armv7_thumb_32_miscellaneous_operations(raw);
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.13. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_signed(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.13 Parallel addition and subtraction, signed
*/
if ((raw & 0xff80f000) != 0xfa80f000) return NULL;
result = NULL;
op1 = (raw >> 20) & b111;
op2 = (raw >> 4) & b11;
switch (op2)
{
case b00:
switch (op1)
{
case b001:
result = armv7_read_thumb_32_instr_sadd16(raw);
break;
case b010:
result = armv7_read_thumb_32_instr_sasx(raw);
break;
case b110:
result = armv7_read_thumb_32_instr_ssax(raw);
break;
case b101:
result = armv7_read_thumb_32_instr_ssub16(raw);
break;
case b000:
result = armv7_read_thumb_32_instr_sadd8(raw);
break;
case b100:
result = armv7_read_thumb_32_instr_ssub8(raw);
break;
}
break;
case b01:
switch (op1)
{
case b001:
result = armv7_read_thumb_32_instr_sqadd16(raw);
break;
case b010:
result = armv7_read_thumb_32_instr_sqasx(raw);
break;
case b110:
result = armv7_read_thumb_32_instr_sqsax(raw);
break;
case b101:
result = armv7_read_thumb_32_instr_sqsub16(raw);
break;
case b000:
result = armv7_read_thumb_32_instr_sqadd8(raw);
break;
case b100:
result = armv7_read_thumb_32_instr_sqsub8(raw);
break;
}
break;
case b10:
switch (op1)
{
case b001:
result = armv7_read_thumb_32_instr_shadd16(raw);
break;
case b010:
result = armv7_read_thumb_32_instr_shasx(raw);
break;
case b110:
result = armv7_read_thumb_32_instr_shsax(raw);
break;
case b101:
result = armv7_read_thumb_32_instr_shsub16(raw);
break;
case b000:
result = armv7_read_thumb_32_instr_shadd8(raw);
break;
case b100:
result = armv7_read_thumb_32_instr_shsub8(raw);
break;
}
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.14. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.14 Parallel addition and subtraction, unsigned
*/
if ((raw & 0xff80f0c0) != 0xfa80f040) return NULL;
result = NULL;
op1 = (raw >> 20) & b111;
op2 = (raw >> 4) & b11;
switch (op2)
{
case b00:
switch (op1)
{
case b001:
result = armv7_read_thumb_32_instr_uadd16(raw);
break;
case b010:
result = armv7_read_thumb_32_instr_uasx(raw);
break;
case b110:
result = armv7_read_thumb_32_instr_usax(raw);
break;
case b101:
result = armv7_read_thumb_32_instr_usub16(raw);
break;
case b000:
result = armv7_read_thumb_32_instr_uadd8(raw);
break;
case b100:
result = armv7_read_thumb_32_instr_usub8(raw);
break;
}
break;
case b01:
switch (op1)
{
case b001:
result = armv7_read_thumb_32_instr_uqadd16(raw);
break;
case b010:
result = armv7_read_thumb_32_instr_uqasx(raw);
break;
case b110:
result = armv7_read_thumb_32_instr_uqsax(raw);
break;
case b101:
result = armv7_read_thumb_32_instr_uqsub16(raw);
break;
case b000:
result = armv7_read_thumb_32_instr_uqadd8(raw);
break;
case b100:
result = armv7_read_thumb_32_instr_uqsub8(raw);
break;
}
break;
case b10:
switch (op1)
{
case b001:
result = armv7_read_thumb_32_instr_uhadd16(raw);
break;
case b010:
result = armv7_read_thumb_32_instr_uhasx(raw);
break;
case b110:
result = armv7_read_thumb_32_instr_uhsax(raw);
break;
case b101:
result = armv7_read_thumb_32_instr_uhsub16(raw);
break;
case b000:
result = armv7_read_thumb_32_instr_uhadd8(raw);
break;
case b100:
result = armv7_read_thumb_32_instr_uhsub8(raw);
break;
}
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.15. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_miscellaneous_operations(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.15 Miscellaneous operations
*/
if ((raw & 0xffc0f0c0) != 0xfa80f080) return NULL;
result = NULL;
op1 = (raw >> 20) & b11;
op2 = (raw >> 4) & b11;
switch (op1)
{
case b00:
switch (op2)
{
case b00:
result = armv7_read_thumb_32_instr_qadd(raw);
break;
case b01:
result = armv7_read_thumb_32_instr_qdadd(raw);
break;
case b10:
result = armv7_read_thumb_32_instr_qsub(raw);
break;
case b11:
result = armv7_read_thumb_32_instr_qdsub(raw);
break;
}
break;
case b01:
switch (op2)
{
case b00:
result = armv7_read_thumb_32_instr_rev(raw);
break;
case b01:
result = armv7_read_thumb_32_instr_rev16(raw);
break;
case b10:
result = armv7_read_thumb_32_instr_rbit(raw);
break;
case b11:
result = armv7_read_thumb_32_instr_revsh(raw);
break;
}
break;
case b10:
if (op2 == b00)
result = armv7_read_thumb_32_instr_sel(raw);
break;
case b11:
if (op2 == b00)
result = armv7_read_thumb_32_instr_clz(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.16. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_multiply_multiply_accumulate_and_absolute_difference(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t ra; /* Champ 'ra' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.16 Multiply, multiply accumulate, and absolute difference
*/
if ((raw & 0xff8000c0) != 0xfb000000) return NULL;
result = NULL;
op1 = (raw >> 20) & b111;
ra = (raw >> 12) & b1111;
op2 = (raw >> 4) & b11;
switch (op1)
{
case b000:
if (op2 == b00)
{
if (ra == b1111)
result = armv7_read_thumb_32_instr_mul(raw);
else
result = armv7_read_thumb_32_instr_mla(raw);
}
else if (op2 == b01)
result = armv7_read_thumb_32_instr_mls(raw);
break;
case b001:
if (ra == b1111)
result = armv7_read_thumb_32_instr_smulbb_smulbt_smultb_smultt(raw);
else
result = armv7_read_thumb_32_instr_smlabb_smlabt_smlatb_smlatt(raw);
break;
case b010:
if ((op2 & b10) == b00)
{
if (ra == b1111)
result = armv7_read_thumb_32_instr_smuad(raw);
else
result = armv7_read_thumb_32_instr_smlad(raw);
}
break;
case b011:
if ((op2 & b10) == b00)
{
if (ra == b1111)
result = armv7_read_thumb_32_instr_smulwb_smulwt(raw);
else
result = armv7_read_thumb_32_instr_smlawb_smlawt(raw);
}
break;
case b100:
if ((op2 & b10) == b00)
{
if (ra == b1111)
result = armv7_read_thumb_32_instr_smusd(raw);
else
result = armv7_read_thumb_32_instr_smlsd(raw);
}
break;
case b101:
if ((op2 & b10) == b00)
{
if (ra == b1111)
result = armv7_read_thumb_32_instr_smmul(raw);
else
result = armv7_read_thumb_32_instr_smmla(raw);
}
break;
case b110:
if ((op2 & b10) == b00)
result = armv7_read_thumb_32_instr_smmls(raw);
break;
case b111:
if (op2 == b00)
{
if (ra == b1111)
result = armv7_read_thumb_32_instr_usad8(raw);
else
result = armv7_read_thumb_32_instr_usada8(raw);
}
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.17. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_long_multiply_long_multiply_accumulate_and_divide(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t op2; /* Champ 'op2' à retrouver */
/**
* Suit les directives de :
* § A6.3.17 Long multiply, long multiply accumulate, and divide
*/
if ((raw & 0xff800000) != 0xfb800000) return NULL;
result = NULL;
op1 = (raw >> 20) & b111;
op2 = (raw >> 4) & b1111;
switch (op1)
{
case b000:
if (op2 == b0000)
result = armv7_read_thumb_32_instr_smull(raw);
break;
case b001:
if (op2 == b1111)
result = armv7_read_thumb_32_instr_sdiv(raw);
break;
case b010:
if (op2 == b0000)
result = armv7_read_thumb_32_instr_umull(raw);
break;
case b011:
if (op2 == b1111)
result = armv7_read_thumb_32_instr_udiv(raw);
break;
case b100:
if (op2 == b0000)
result = armv7_read_thumb_32_instr_smlal(raw);
else if ((op2 & b1100) == b1000)
result = armv7_read_thumb_32_instr_smlalbb_smlalbt_smlaltb_smlaltt(raw);
else if ((op2 & b1110) == b1100)
result = armv7_read_thumb_32_instr_smlald(raw);
break;
case b101:
if ((op2 & b1110) == b1100)
result = armv7_read_thumb_32_instr_smlsld(raw);
break;
case b110:
if (op2 == b0000)
result = armv7_read_thumb_32_instr_umlal(raw);
else if (op2 == b0110)
result = armv7_read_thumb_32_instr_umaal(raw);
break;
}
return result;
}
/******************************************************************************
* *
* Paramètres : raw = donnée brute de 32 bits à désassembler. *
* *
* Description : Désassemble une instruction ARMv7 liées au chapitre A6.3.18. *
* *
* Retour : Instruction mise en place ou NULL en cas d'échec. *
* *
* Remarques : - *
* *
******************************************************************************/
static GArchInstruction *process_armv7_thumb_32_coprocessor_advanced_simd_and_floating_point_instructions(uint32_t raw)
{
GArchInstruction *result; /* Instruction à renvoyer */
uint32_t op1; /* Champ 'op1' à retrouver */
uint32_t rn; /* Champ 'rn' à retrouver */
uint32_t coproc; /* Champ 'coproc' à retrouver */
uint32_t op; /* Champ 'op' à retrouver */
/**
* Suit les directives de :
* § A6.3.18 Coprocessor, Advanced SIMD, and Floating-point instructions
*/
if ((raw & 0xec000000) != 0xec000000) return NULL;
result = NULL;
op1 = (raw >> 20) & 0x3f;
rn = (raw >> 16) & 0xf;
coproc = (raw >> 8) & 0xf;
op = (raw >> 4) & 0x1;
if ((op1 & b111110) == b000000)
result = g_undef_instruction_new(IBS_UNDEFINED);
else if ((op1 & b110000) == b110000)
result = process_armv7_simd_advanced_simd_data_processing_instructions(raw, false);
else if ((coproc & b1110) != b1010)
{
if ((op1 & b100001) == b000000 && (op1 & b111010) != b000000)
result = armv7_read_thumb_32_instr_stc_stc2(raw);
else if ((op1 & b100001) == b000001 && (op1 & b111010) != b000000)
{
if (rn != b1111)
result = armv7_read_thumb_32_instr_ldc_ldc2_immediate(raw);
else/* if (rn == b1111)*/
result = armv7_read_thumb_32_instr_ldc_ldc2_literal(raw);
}
else if (op1 == b000100)
result = armv7_read_thumb_32_instr_mcrr_mcrr2(raw);
else if (op1 == b000101)
result = armv7_read_thumb_32_instr_mrrc_mrrc2(raw);
else if ((op1 & b110000) == b100000 && op == b0)
result = armv7_read_thumb_32_instr_cdp_cdp2(raw);
else if ((op1 & b110001) == b100000 && op == b1)
result = armv7_read_thumb_32_instr_mcr_mcr2(raw);
else if ((op1 & b110001) == b100001 && op == b1)
result = armv7_read_thumb_32_instr_mrc_mrc2(raw);
}
else if ((coproc & b1110) == b1010)
{
if ((op1 & b100000) == b000000 && (op1 & b111010) != b000000)
result = process_armv7_simd_extension_register_load_store_instructions(raw, false);
else if ((op1 & b111110) == b000100)
result = process_armv7_simd_64_bit_transfers_between_arm_core_and_extension_registers(raw, false);
else if ((op1 & b110000) == b100000)
{
if (op == b0)
result = process_armv7_simd_floating_point_data_processing_instructions(raw, false);
else/* if (op == b1)*/
result = process_armv7_simd_8_16_and_32_bit_transfer_between_arm_core_and_extension_registers(raw, false);
}
}
return result;
}