diff options
author | Cyrille Bagard <nocbos@gmail.com> | 2018-05-28 22:24:57 (GMT) |
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committer | Cyrille Bagard <nocbos@gmail.com> | 2018-05-28 22:24:57 (GMT) |
commit | 85f8cfc150a9cbb07136863bc1ec379b29c723ab (patch) | |
tree | e6c25f51e2fdcb547b1f80847fa3bcc6edf80889 /plugins/arm/v7/helpers.h | |
parent | 5311a943dffcc410739509b9215ca464f6d1e54c (diff) |
Added support for some ARMv7 SIMD instructions.
Diffstat (limited to 'plugins/arm/v7/helpers.h')
-rw-r--r-- | plugins/arm/v7/helpers.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/plugins/arm/v7/helpers.h b/plugins/arm/v7/helpers.h index ad23bc7..968dbf4 100644 --- a/plugins/arm/v7/helpers.h +++ b/plugins/arm/v7/helpers.h @@ -41,6 +41,7 @@ #include "registers/banked.h" #include "registers/basic.h" #include "registers/coproc.h" +#include "registers/simd.h" #include "registers/special.h" @@ -50,6 +51,18 @@ */ +#define AdvSIMDExpandImm(op, cmode, imm8) \ + ({ \ + GArchOperand *__result; \ + uint64_t __val; \ + if (armv7_advanced_simd_expand_imm(op, cmode, imm8, &__val)) \ + __result = g_imm_operand_new_from_value(MDS_64_BITS_UNSIGNED, __val); \ + else \ + __result = NULL; \ + __result; \ + }) + + #define ARMExpandImm(imm12) \ ({ \ GArchOperand *__result; \ @@ -151,6 +164,19 @@ }) +#define DoubleWordVector(idx) \ + ({ \ + GArchOperand *__result; \ + GArchRegister *__reg; \ + __reg = g_armv7_simd_register_new(SRM_DOUBLE_WORD, idx); \ + if (__reg == NULL) \ + __result = NULL; \ + else \ + __result = g_armv7_register_operand_new(G_ARMV7_REGISTER(__reg)); \ + __result; \ + }) + + #define Endian(big) \ ({ \ GArchOperand *__result; \ @@ -254,6 +280,19 @@ }) +#define QuadWordVector(idx) \ + ({ \ + GArchOperand *__result; \ + GArchRegister *__reg; \ + __reg = g_armv7_simd_register_new(SRM_QUAD_WORD, idx); \ + if (__reg == NULL) \ + __result = NULL; \ + else \ + __result = g_armv7_register_operand_new(G_ARMV7_REGISTER(__reg)); \ + __result; \ + }) + + #define SignExtend(val, size, top) \ ({ \ GArchOperand *__result; \ @@ -274,6 +313,19 @@ }) +#define SingleWordVector(idx) \ + ({ \ + GArchOperand *__result; \ + GArchRegister *__reg; \ + __reg = g_armv7_simd_register_new(SRM_SINGLE_WORD, idx); \ + if (__reg == NULL) \ + __result = NULL; \ + else \ + __result = g_armv7_register_operand_new(G_ARMV7_REGISTER(__reg)); \ + __result; \ + }) + + #define Register(idx) \ ({ \ GArchOperand *__result; \ |