diff options
author | Cyrille Bagard <nocbos@gmail.com> | 2017-12-02 11:04:35 (GMT) |
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committer | Cyrille Bagard <nocbos@gmail.com> | 2017-12-02 11:04:35 (GMT) |
commit | 2c988d3ec52cc4c949a35aca7ef335dac773df92 (patch) | |
tree | fe650d2fc8ddceb606abdf0d2e14e5ef6596be82 /plugins/arm/v7/opdefs/bl_A8825.d | |
parent | 23abef53590bf3dd6f88ff4dbe81e306abfa4386 (diff) |
Created a plugin for the ARM support.
Diffstat (limited to 'plugins/arm/v7/opdefs/bl_A8825.d')
-rw-r--r-- | plugins/arm/v7/opdefs/bl_A8825.d | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/plugins/arm/v7/opdefs/bl_A8825.d b/plugins/arm/v7/opdefs/bl_A8825.d new file mode 100644 index 0000000..da0def4 --- /dev/null +++ b/plugins/arm/v7/opdefs/bl_A8825.d @@ -0,0 +1,125 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * ##FILE## - traduction d'instructions ARMv7 + * + * Copyright (C) 2015 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * Chrysalide is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * Chrysalide is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +@title BL, BLX (immediate) + +@desc Branch with Link calls a subroutine at a PC-relative address. Branch with Link and Exchange Instruction Sets (immediate) calls a subroutine at a PC-relative address, and changes instruction set from ARM to Thumb, or from Thumb to ARM. + +@encoding (T1) { + + @word 1 1 1 1 0 S(1) imm10(10) 1 1 J1(1) 1 J2(1) imm11(11) + + @syntax <imm32> + + @conv { + + I1 = NOT(J1 EOR S) + I2 = NOT(J2 EOR S) + imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S & 0x1, 32) + + } + + @hooks { + + fetch = help_fetching_with_instruction_bl_from_thumb + link = handle_call_as_link + post = post_process_branch_and_link_instructions + + } + +} + +@encoding (T2) { + + @word 1 1 1 1 0 S(1) imm10H(10) 1 1 J1(1) 0 J2(1) imm10L(10) H(1) + + @syntax "blx" <imm32> + + @conv { + + I1 = NOT(J1 EOR S) + I2 = NOT(J2 EOR S) + imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', S & 0x1, 32) + + } + + @hooks { + + fetch = help_fetching_with_instruction_blx_from_thumb + link = handle_call_as_link + post = post_process_branch_and_link_instructions + + } + +} + +@encoding (A1) { + + @word cond(4) 1 0 1 1 imm24(24) + + @syntax <imm32> + + @conv { + + imm32 = SignExtend(imm24:'00', imm24 & 0x800000, 32) + + } + + @rules { + + chk_call StoreCondition(cond) + + } + + @hooks { + + fetch = help_fetching_with_instruction_bl_from_arm + link = handle_call_as_link + post = post_process_branch_and_link_instructions + + } + +} + +@encoding (A2) { + + @word 1 1 1 1 1 0 1 H(1) imm24(24) + + @syntax "blx" <imm32> + + @conv { + + imm32 = SignExtend(imm24:H:'0', imm24 & 0x800000, 32) + + } + + @hooks { + + fetch = help_fetching_with_instruction_blx_from_arm + link = handle_call_as_link + post = post_process_branch_and_link_instructions + + } + +} + |