Used unique identifiers for instructions everywhere.

238 files changed, 1462 insertions, 26 deletions

diff --git a/plugins/arm/v7/opdefs/Makefile.am b/plugins/arm/v7/opdefs/Makefile.am
index 40ab737..0ecabc4 100644
--- a/plugins/arm/v7/opdefs/Makefile.am
+++ b/plugins/arm/v7/opdefs/Makefile.am
@@ -28,22 +28,26 @@ D2C_SPECIFIC =
 FIXED_C_INCLUDES =						\
 	\#include <assert.h>				\
 	\n									\
-	\n\#include <arch/link.h>			\
 	\n\#include <common/bconst.h>		\
 	\n									\
+	\n\#include "identifiers.h"			\
 	\n\#include "../helpers.h"			\
 	\n\#include "../instruction.h"		\
-	\n\#include "../fetch.h"			\
-	\n\#include "../link.h"				\
-	\n\#include "../post.h"				\
-	\n\#include "../../instruction.h"	\
-	\n\#include "../../link.h"
+	\n\#include "../../instruction.h"
 
 FIXED_H_INCLUDES =						\
 	\#include <stdint.h>				\
     \n									\
     \n\#include <arch/instruction.h>
 
+FIXED_H_HOOKS_INCLUDES =				\
+	\#include <arch/link.h>				\
+	\n									\
+	\n\#include "../fetch.h"			\
+	\n\#include "../link.h"				\
+	\n\#include "../post.h"				\
+	\n\#include "../../link.h"
+
 
 # for i in $(seq 1 426); do test -f *A88$i.d && (ls *A88$i.d | sed 's/^/\t/' | sed 's/$/\t\t\t\t\t\t\\/') ; done
 ARMV7_DEFS = 							\
diff --git a/plugins/arm/v7/opdefs/adc_A881.d b/plugins/arm/v7/opdefs/adc_A881.d
index 9368a3c..d470638 100644
--- a/plugins/arm/v7/opdefs/adc_A881.d
+++ b/plugins/arm/v7/opdefs/adc_A881.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 0
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 1
+
 		@assert {
 
 			S == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 2
+
 		@assert {
 
 			S == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 3
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/adc_A882.d b/plugins/arm/v7/opdefs/adc_A882.d
index 249803a..aaca002 100644
--- a/plugins/arm/v7/opdefs/adc_A882.d
+++ b/plugins/arm/v7/opdefs/adc_A882.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 4
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 5
+
 		@assert {
 
 			S == 0
@@ -78,6 +82,8 @@
 
 	@syntax {
 
+		@subid 6
+
 		@assert {
 
 			S == 1
@@ -105,6 +111,8 @@
 
 	@syntax {
 
+		@subid 7
+
 		@assert {
 
 			S == 0
@@ -132,6 +140,8 @@
 
 	@syntax {
 
+		@subid 8
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/adc_A883.d b/plugins/arm/v7/opdefs/adc_A883.d
index d1012e2..0270402 100644
--- a/plugins/arm/v7/opdefs/adc_A883.d
+++ b/plugins/arm/v7/opdefs/adc_A883.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 9
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 10
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/add_A8810.d b/plugins/arm/v7/opdefs/add_A8810.d
index 82d4907..357dadc 100644
--- a/plugins/arm/v7/opdefs/add_A8810.d
+++ b/plugins/arm/v7/opdefs/add_A8810.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 33
+
 		@conv {
 
 			reg_D = Register(DM:Rdm)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 34
+
 		@conv {
 
 			reg_D = Register(13)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 35
+
 		@assert {
 
 			S == 0
@@ -98,6 +104,8 @@
 
 	@syntax {
 
+		@subid 36
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/add_A8811.d b/plugins/arm/v7/opdefs/add_A8811.d
index 8b8cb60..f5c19aa 100644
--- a/plugins/arm/v7/opdefs/add_A8811.d
+++ b/plugins/arm/v7/opdefs/add_A8811.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 37
+
 		@assert {
 
 			S == 0
@@ -64,6 +66,8 @@
 
 	@syntax {
 
+		@subid 38
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/add_A884.d b/plugins/arm/v7/opdefs/add_A884.d
index aafd1ef..c35685f 100644
--- a/plugins/arm/v7/opdefs/add_A884.d
+++ b/plugins/arm/v7/opdefs/add_A884.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 11
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 12
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 13
+
 		@assert {
 
 			S == 0
@@ -97,6 +103,8 @@
 
 	@syntax {
 
+		@subid 14
+
 		@assert {
 
 			S == 1
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 15
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/add_A885.d b/plugins/arm/v7/opdefs/add_A885.d
index 6416868..87b92a6 100644
--- a/plugins/arm/v7/opdefs/add_A885.d
+++ b/plugins/arm/v7/opdefs/add_A885.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 16
+
 		@assert {
 
 			S == 0
@@ -63,6 +65,8 @@
 
 	@syntax {
 
+		@subid 17
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/add_A886.d b/plugins/arm/v7/opdefs/add_A886.d
index bd5fde9..856272e 100644
--- a/plugins/arm/v7/opdefs/add_A886.d
+++ b/plugins/arm/v7/opdefs/add_A886.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 18
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 19
+
 		@conv {
 
 			reg_D = Register(DN:Rdn)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 20
+
 		@assert {
 
 			S == 0
@@ -98,6 +104,8 @@
 
 	@syntax {
 
+		@subid 21
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/add_A887.d b/plugins/arm/v7/opdefs/add_A887.d
index 5528631..6105f18 100644
--- a/plugins/arm/v7/opdefs/add_A887.d
+++ b/plugins/arm/v7/opdefs/add_A887.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 22
+
 		@assert {
 
 			S == 0
@@ -64,6 +66,8 @@
 
 	@syntax {
 
+		@subid 23
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/add_A888.d b/plugins/arm/v7/opdefs/add_A888.d
index 1566ed3..8fd6078 100644
--- a/plugins/arm/v7/opdefs/add_A888.d
+++ b/plugins/arm/v7/opdefs/add_A888.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 24
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 25
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/add_A889.d b/plugins/arm/v7/opdefs/add_A889.d
index ecba21c..834de50 100644
--- a/plugins/arm/v7/opdefs/add_A889.d
+++ b/plugins/arm/v7/opdefs/add_A889.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 26
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 27
+
 		@conv {
 
 			reg_D = Register(13)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 28
+
 		@assert {
 
 			S == 0
@@ -97,6 +103,8 @@
 
 	@syntax {
 
+		@subid 29
+
 		@assert {
 
 			S == 1
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 30
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -143,6 +153,8 @@
 
 	@syntax {
 
+		@subid 31
+
 		@assert {
 
 			S == 0
@@ -169,6 +181,8 @@
 
 	@syntax {
 
+		@subid 32
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/adr_A8812.d b/plugins/arm/v7/opdefs/adr_A8812.d
index 6417d8f..1f77eea 100644
--- a/plugins/arm/v7/opdefs/adr_A8812.d
+++ b/plugins/arm/v7/opdefs/adr_A8812.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 39
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 40
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 41
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -94,6 +100,8 @@
 
 	@syntax {
 
+		@subid 42
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -119,6 +127,8 @@
 
 	@syntax {
 
+		@subid 43
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/and_A8813.d b/plugins/arm/v7/opdefs/and_A8813.d
index fcec067..988bdd7 100644
--- a/plugins/arm/v7/opdefs/and_A8813.d
+++ b/plugins/arm/v7/opdefs/and_A8813.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 44
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 45
+
 		@assert {
 
 			S == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 46
+
 		@assert {
 
 			S == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 47
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/and_A8814.d b/plugins/arm/v7/opdefs/and_A8814.d
index 18fe4e2..1a807f9 100644
--- a/plugins/arm/v7/opdefs/and_A8814.d
+++ b/plugins/arm/v7/opdefs/and_A8814.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 48
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 49
+
 		@assert {
 
 			S == 0
@@ -78,6 +82,8 @@
 
 	@syntax {
 
+		@subid 50
+
 		@assert {
 
 			S == 1
@@ -105,6 +111,8 @@
 
 	@syntax {
 
+		@subid 51
+
 		@assert {
 
 			S == 0
@@ -132,6 +140,8 @@
 
 	@syntax {
 
+		@subid 52
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/and_A8815.d b/plugins/arm/v7/opdefs/and_A8815.d
index f53607e..3d890cb 100644
--- a/plugins/arm/v7/opdefs/and_A8815.d
+++ b/plugins/arm/v7/opdefs/and_A8815.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 53
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 54
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/asr_A8816.d b/plugins/arm/v7/opdefs/asr_A8816.d
index 71be77f..401c4c5 100644
--- a/plugins/arm/v7/opdefs/asr_A8816.d
+++ b/plugins/arm/v7/opdefs/asr_A8816.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 55
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 56
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 57
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 58
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 59
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/asr_A8817.d b/plugins/arm/v7/opdefs/asr_A8817.d
index bb33386..0ddeae9 100644
--- a/plugins/arm/v7/opdefs/asr_A8817.d
+++ b/plugins/arm/v7/opdefs/asr_A8817.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 60
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 61
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 62
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 63
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 64
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/b_A8818.d b/plugins/arm/v7/opdefs/b_A8818.d
index db5e763..d10b297 100644
--- a/plugins/arm/v7/opdefs/b_A8818.d
+++ b/plugins/arm/v7/opdefs/b_A8818.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 65
+
 		@conv {
 
 			imm32 = SignExtend(imm8:'0', 32, 8)
@@ -69,6 +71,8 @@
 
 	@syntax {
 
+		@subid 66
+
 		@conv {
 
 			imm32 = SignExtend(imm11:'0', 32, 11)
@@ -95,6 +99,8 @@
 
 	@syntax {
 
+		@subid 67
+
 		@conv {
 
 			imm32 = SignExtend(S:J2:J1:imm6:imm11:'0', 32, 20)
@@ -128,6 +134,8 @@
 
 	@syntax {
 
+		@subid 68
+
 		@conv {
 
 			imm32 = SignExtend(S:J2:J1:imm10:imm11:'0', 32, 24)
@@ -154,6 +162,8 @@
 
 	@syntax {
 
+		@subid 69
+
 		@conv {
 
 			imm32 = SignExtend(imm24:'00', 32, 25)
diff --git a/plugins/arm/v7/opdefs/bfc_A8819.d b/plugins/arm/v7/opdefs/bfc_A8819.d
index f3bba3c..f8875e5 100644
--- a/plugins/arm/v7/opdefs/bfc_A8819.d
+++ b/plugins/arm/v7/opdefs/bfc_A8819.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 70
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 71
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/bfi_A8820.d b/plugins/arm/v7/opdefs/bfi_A8820.d
index 096189d..aa71aa8 100644
--- a/plugins/arm/v7/opdefs/bfi_A8820.d
+++ b/plugins/arm/v7/opdefs/bfi_A8820.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 72
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -59,6 +61,8 @@
 
 	@syntax {
 
+		@subid 73
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/bic_A8821.d b/plugins/arm/v7/opdefs/bic_A8821.d
index b2e9896..59d4bb0 100644
--- a/plugins/arm/v7/opdefs/bic_A8821.d
+++ b/plugins/arm/v7/opdefs/bic_A8821.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 74
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 75
+
 		@assert {
 
 			S == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 76
+
 		@assert {
 
 			S == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 77
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/bic_A8822.d b/plugins/arm/v7/opdefs/bic_A8822.d
index eef59ae..f4746b9 100644
--- a/plugins/arm/v7/opdefs/bic_A8822.d
+++ b/plugins/arm/v7/opdefs/bic_A8822.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 78
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 79
+
 		@assert {
 
 			S == 0
@@ -78,6 +82,8 @@
 
 	@syntax {
 
+		@subid 80
+
 		@assert {
 
 			S == 1
@@ -105,6 +111,8 @@
 
 	@syntax {
 
+		@subid 81
+
 		@assert {
 
 			S == 0
@@ -132,6 +140,8 @@
 
 	@syntax {
 
+		@subid 82
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/bic_A8823.d b/plugins/arm/v7/opdefs/bic_A8823.d
index 94b3904..fb57338 100644
--- a/plugins/arm/v7/opdefs/bic_A8823.d
+++ b/plugins/arm/v7/opdefs/bic_A8823.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 83
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 84
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/bkpt_A8824.d b/plugins/arm/v7/opdefs/bkpt_A8824.d
index e7c9c57..e9c9f4b 100644
--- a/plugins/arm/v7/opdefs/bkpt_A8824.d
+++ b/plugins/arm/v7/opdefs/bkpt_A8824.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 85
+
 		@conv {
 
 			imm32 = ZeroExtend(imm8, 32)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 86
+
 		@conv {
 
 			imm32 = ZeroExtend(imm12:imm4, 32)
diff --git a/plugins/arm/v7/opdefs/bl_A8825.d b/plugins/arm/v7/opdefs/bl_A8825.d
index 52f0138..221bbc5 100644
--- a/plugins/arm/v7/opdefs/bl_A8825.d
+++ b/plugins/arm/v7/opdefs/bl_A8825.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 87
+
 		@conv {
 
 			imm32 = SignExtend(S:J2:J1:imm10:imm11:'0', 32, 24)
@@ -63,6 +65,8 @@
 
 	@syntax {
 
+		@subid 88
+
 		@conv {
 
 			imm32 = SignExtend(S:J1:J2:imm10H:imm10L:'00', 32, 24)
@@ -89,6 +93,8 @@
 
 	@syntax {
 
+		@subid 89
+
 		@conv {
 
 			imm32 = SignExtend(imm24:'00', 32, 25)
@@ -121,6 +127,8 @@
 
 	@syntax {
 
+		@subid 90
+
 		@conv {
 
 			imm32 = SignExtend(imm24:H:'0', 32, 25)
diff --git a/plugins/arm/v7/opdefs/blx_A8826.d b/plugins/arm/v7/opdefs/blx_A8826.d
index cfc965f..2c975d3 100644
--- a/plugins/arm/v7/opdefs/blx_A8826.d
+++ b/plugins/arm/v7/opdefs/blx_A8826.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 91
+
 		@conv {
 
 			reg_M = Register(Rm)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 92
+
 		@conv {
 
 			reg_M = Register(Rm)
diff --git a/plugins/arm/v7/opdefs/bx_A8827.d b/plugins/arm/v7/opdefs/bx_A8827.d
index 328cae1..64ad628 100644
--- a/plugins/arm/v7/opdefs/bx_A8827.d
+++ b/plugins/arm/v7/opdefs/bx_A8827.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 93
+
 		@conv {
 
 			reg_M = Register(Rm)
@@ -61,6 +63,8 @@
 
 	@syntax {
 
+		@subid 94
+
 		@conv {
 
 			reg_M = Register(Rm)
diff --git a/plugins/arm/v7/opdefs/bxj_A8828.d b/plugins/arm/v7/opdefs/bxj_A8828.d
index 9ebde4f..7c6ddb5 100644
--- a/plugins/arm/v7/opdefs/bxj_A8828.d
+++ b/plugins/arm/v7/opdefs/bxj_A8828.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 95
+
 		@conv {
 
 			reg_M = Register(Rm)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 96
+
 		@conv {
 
 			reg_M = Register(Rm)
diff --git a/plugins/arm/v7/opdefs/cb_A8829.d b/plugins/arm/v7/opdefs/cb_A8829.d
index 78f3a43..5e004b7 100644
--- a/plugins/arm/v7/opdefs/cb_A8829.d
+++ b/plugins/arm/v7/opdefs/cb_A8829.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 97
+
 		@assert {
 
 			op == 0
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 98
+
 		@assert {
 
 			op == 1
diff --git a/plugins/arm/v7/opdefs/cdp_A8830.d b/plugins/arm/v7/opdefs/cdp_A8830.d
index 723e231..32fc2f1 100644
--- a/plugins/arm/v7/opdefs/cdp_A8830.d
+++ b/plugins/arm/v7/opdefs/cdp_A8830.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 99
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -54,12 +56,14 @@
 
 }
 
-@encoding (A1) {
+@encoding (T2) {
 
-	@word 1 1 1 0 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4)
+	@word 1 1 1 1 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4)
 
 	@syntax {
 
+		@subid 100
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -77,12 +81,14 @@
 
 }
 
-@encoding (T2) {
+@encoding (A1) {
 
-	@word 1 1 1 1 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4)
+	@word 1 1 1 0 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4)
 
 	@syntax {
 
+		@subid 101
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -106,6 +112,8 @@
 
 	@syntax {
 
+		@subid 102
+
 		@conv {
 
 			cp = CoProcessor(coproc)
diff --git a/plugins/arm/v7/opdefs/clrex_A8832.d b/plugins/arm/v7/opdefs/clrex_A8832.d
index c191784..5edfb58 100644
--- a/plugins/arm/v7/opdefs/clrex_A8832.d
+++ b/plugins/arm/v7/opdefs/clrex_A8832.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 103
+
 		@asm clrex
 
 	}
@@ -49,6 +51,8 @@
 
 	@syntax {
 
+		@subid 104
+
 		@asm clrex
 
 	}
diff --git a/plugins/arm/v7/opdefs/clz_A8833.d b/plugins/arm/v7/opdefs/clz_A8833.d
index cdeded7..7cbb51c 100644
--- a/plugins/arm/v7/opdefs/clz_A8833.d
+++ b/plugins/arm/v7/opdefs/clz_A8833.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 105
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 106
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/cmn_A8834.d b/plugins/arm/v7/opdefs/cmn_A8834.d
index 38c8b04..45462c7 100644
--- a/plugins/arm/v7/opdefs/cmn_A8834.d
+++ b/plugins/arm/v7/opdefs/cmn_A8834.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 107
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 108
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/cmn_A8835.d b/plugins/arm/v7/opdefs/cmn_A8835.d
index 5ce4bd0..55c281c 100644
--- a/plugins/arm/v7/opdefs/cmn_A8835.d
+++ b/plugins/arm/v7/opdefs/cmn_A8835.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 109
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 110
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -76,6 +80,8 @@
 
 	@syntax {
 
+		@subid 111
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/cmn_A8836.d b/plugins/arm/v7/opdefs/cmn_A8836.d
index a6c3dcb..e1052a8 100644
--- a/plugins/arm/v7/opdefs/cmn_A8836.d
+++ b/plugins/arm/v7/opdefs/cmn_A8836.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 112
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/cmp_A8837.d b/plugins/arm/v7/opdefs/cmp_A8837.d
index 8df8db9..261467b 100644
--- a/plugins/arm/v7/opdefs/cmp_A8837.d
+++ b/plugins/arm/v7/opdefs/cmp_A8837.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 113
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 114
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 115
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/cmp_A8838.d b/plugins/arm/v7/opdefs/cmp_A8838.d
index eb2f698..401e4ac 100644
--- a/plugins/arm/v7/opdefs/cmp_A8838.d
+++ b/plugins/arm/v7/opdefs/cmp_A8838.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 116
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 117
+
 		@conv {
 
 			reg_N = Register(N:Rn)
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 118
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -95,6 +101,8 @@
 
 	@syntax {
 
+		@subid 119
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/cmp_A8839.d b/plugins/arm/v7/opdefs/cmp_A8839.d
index 1b29f30..6bdafb3 100644
--- a/plugins/arm/v7/opdefs/cmp_A8839.d
+++ b/plugins/arm/v7/opdefs/cmp_A8839.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 120
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/dbg_A8842.d b/plugins/arm/v7/opdefs/dbg_A8842.d
index 7cc73d1..d053ca3 100644
--- a/plugins/arm/v7/opdefs/dbg_A8842.d
+++ b/plugins/arm/v7/opdefs/dbg_A8842.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 121
+
 		@conv {
 
 			direct_option = UInt(option)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 122
+
 		@conv {
 
 			direct_option = UInt(option)
diff --git a/plugins/arm/v7/opdefs/dmb_A8843.d b/plugins/arm/v7/opdefs/dmb_A8843.d
index 14e69e2..b8d9717 100644
--- a/plugins/arm/v7/opdefs/dmb_A8843.d
+++ b/plugins/arm/v7/opdefs/dmb_A8843.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 123
+
 		@conv {
 
 			direct_option = UInt(option)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 124
+
 		@conv {
 
 			direct_option = UInt(option)
diff --git a/plugins/arm/v7/opdefs/dsb_A8844.d b/plugins/arm/v7/opdefs/dsb_A8844.d
index 2e4faf2..e8ede64 100644
--- a/plugins/arm/v7/opdefs/dsb_A8844.d
+++ b/plugins/arm/v7/opdefs/dsb_A8844.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 125
+
 		@conv {
 
 			direct_option = UInt(option)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 126
+
 		@conv {
 
 			direct_option = UInt(option)
diff --git a/plugins/arm/v7/opdefs/eor_A8846.d b/plugins/arm/v7/opdefs/eor_A8846.d
index 705d5b3..dfafa9b 100644
--- a/plugins/arm/v7/opdefs/eor_A8846.d
+++ b/plugins/arm/v7/opdefs/eor_A8846.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 127
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 128
+
 		@assert {
 
 			S == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 129
+
 		@assert {
 
 			S == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 130
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/eor_A8847.d b/plugins/arm/v7/opdefs/eor_A8847.d
index a4a8c13..f6e3387 100644
--- a/plugins/arm/v7/opdefs/eor_A8847.d
+++ b/plugins/arm/v7/opdefs/eor_A8847.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 131
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 132
+
 		@assert {
 
 			S == 0
@@ -78,6 +82,8 @@
 
 	@syntax {
 
+		@subid 133
+
 		@assert {
 
 			S == 1
@@ -105,6 +111,8 @@
 
 	@syntax {
 
+		@subid 134
+
 		@assert {
 
 			S == 0
@@ -132,6 +140,8 @@
 
 	@syntax {
 
+		@subid 135
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/eor_A8848.d b/plugins/arm/v7/opdefs/eor_A8848.d
index 0bd2f3e..94f0e92 100644
--- a/plugins/arm/v7/opdefs/eor_A8848.d
+++ b/plugins/arm/v7/opdefs/eor_A8848.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 136
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 137
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/ldr_A8862.d b/plugins/arm/v7/opdefs/ldr_A8862.d
index a9e8348..8f61aa3 100644
--- a/plugins/arm/v7/opdefs/ldr_A8862.d
+++ b/plugins/arm/v7/opdefs/ldr_A8862.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 138
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 139
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -79,6 +83,8 @@
 
 	@syntax {
 
+		@subid 140
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -100,6 +106,8 @@
 
 	@syntax {
 
+		@subid 141
+
 		@assert {
 
 			P == 1
@@ -122,6 +130,8 @@
 
 	@syntax {
 
+		@subid 142
+
 		@assert {
 
 			P == 1
@@ -144,6 +154,8 @@
 
 	@syntax {
 
+		@subid 143
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldr_A8863.d b/plugins/arm/v7/opdefs/ldr_A8863.d
index efb4523..c3b423f 100644
--- a/plugins/arm/v7/opdefs/ldr_A8863.d
+++ b/plugins/arm/v7/opdefs/ldr_A8863.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 144
+
 		@assert {
 
 			P == 1
@@ -65,6 +67,8 @@
 
 	@syntax {
 
+		@subid 145
+
 		@assert {
 
 			P == 1
@@ -93,6 +97,8 @@
 
 	@syntax {
 
+		@subid 146
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldr_A8864.d b/plugins/arm/v7/opdefs/ldr_A8864.d
index e6c41d9..c56fa4a 100644
--- a/plugins/arm/v7/opdefs/ldr_A8864.d
+++ b/plugins/arm/v7/opdefs/ldr_A8864.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 147
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -63,6 +65,8 @@
 
 	@syntax {
 
+		@subid 148
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -89,6 +93,8 @@
 
 	@syntax {
 
+		@subid 149
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldr_A8865.d b/plugins/arm/v7/opdefs/ldr_A8865.d
index 7199571..f314cd4 100644
--- a/plugins/arm/v7/opdefs/ldr_A8865.d
+++ b/plugins/arm/v7/opdefs/ldr_A8865.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 150
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 151
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldr_A8866.d b/plugins/arm/v7/opdefs/ldr_A8866.d
index 2917faf..9640894 100644
--- a/plugins/arm/v7/opdefs/ldr_A8866.d
+++ b/plugins/arm/v7/opdefs/ldr_A8866.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 152
+
 		@assert {
 
 			P == 1
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 153
+
 		@assert {
 
 			P == 1
@@ -95,6 +99,8 @@
 
 	@syntax {
 
+		@subid 154
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrb_A8867.d b/plugins/arm/v7/opdefs/ldrb_A8867.d
index f239eda..d42f086 100644
--- a/plugins/arm/v7/opdefs/ldrb_A8867.d
+++ b/plugins/arm/v7/opdefs/ldrb_A8867.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 155
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 156
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -79,6 +83,8 @@
 
 	@syntax {
 
+		@subid 157
+
 		@assert {
 
 			P == 1
@@ -101,6 +107,8 @@
 
 	@syntax {
 
+		@subid 158
+
 		@assert {
 
 			P == 1
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 159
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrb_A8868.d b/plugins/arm/v7/opdefs/ldrb_A8868.d
index c60acfd..4a7ef24 100644
--- a/plugins/arm/v7/opdefs/ldrb_A8868.d
+++ b/plugins/arm/v7/opdefs/ldrb_A8868.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 160
+
 		@assert {
 
 			P == 1
@@ -65,6 +67,8 @@
 
 	@syntax {
 
+		@subid 161
+
 		@assert {
 
 			P == 1
@@ -93,6 +97,8 @@
 
 	@syntax {
 
+		@subid 162
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrb_A8869.d b/plugins/arm/v7/opdefs/ldrb_A8869.d
index bff4b3d..ae6a83c 100644
--- a/plugins/arm/v7/opdefs/ldrb_A8869.d
+++ b/plugins/arm/v7/opdefs/ldrb_A8869.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 163
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 164
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrb_A8870.d b/plugins/arm/v7/opdefs/ldrb_A8870.d
index e120e46..3a730e0 100644
--- a/plugins/arm/v7/opdefs/ldrb_A8870.d
+++ b/plugins/arm/v7/opdefs/ldrb_A8870.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 165
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 166
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 167
+
 		@assert {
 
 			P == 1
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 168
+
 		@assert {
 
 			P == 1
@@ -138,6 +146,8 @@
 
 	@syntax {
 
+		@subid 169
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrbt_A8871.d b/plugins/arm/v7/opdefs/ldrbt_A8871.d
index e7a59f6..6403ef4 100644
--- a/plugins/arm/v7/opdefs/ldrbt_A8871.d
+++ b/plugins/arm/v7/opdefs/ldrbt_A8871.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 170
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 171
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 172
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrd_A8872.d b/plugins/arm/v7/opdefs/ldrd_A8872.d
index 6498f21..547bec4 100644
--- a/plugins/arm/v7/opdefs/ldrd_A8872.d
+++ b/plugins/arm/v7/opdefs/ldrd_A8872.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 173
+
 		@assert {
 
 			P == 1
@@ -60,6 +62,8 @@
 
 	@syntax {
 
+		@subid 174
+
 		@assert {
 
 			P == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 175
+
 		@assert {
 
 			P == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 176
+
 		@assert {
 
 			P == 1
@@ -141,6 +149,8 @@
 
 	@syntax {
 
+		@subid 177
+
 		@assert {
 
 			P == 1
@@ -170,6 +180,8 @@
 
 	@syntax {
 
+		@subid 178
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrd_A8873.d b/plugins/arm/v7/opdefs/ldrd_A8873.d
index f8e97f7..9b15a15 100644
--- a/plugins/arm/v7/opdefs/ldrd_A8873.d
+++ b/plugins/arm/v7/opdefs/ldrd_A8873.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 179
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 180
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrd_A8874.d b/plugins/arm/v7/opdefs/ldrd_A8874.d
index 6fd7936..1d57312 100644
--- a/plugins/arm/v7/opdefs/ldrd_A8874.d
+++ b/plugins/arm/v7/opdefs/ldrd_A8874.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 181
+
 		@assert {
 
 			P == 1
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 182
+
 		@assert {
 
 			P == 1
@@ -95,6 +99,8 @@
 
 	@syntax {
 
+		@subid 183
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrex_A8875.d b/plugins/arm/v7/opdefs/ldrex_A8875.d
index 73a2355..c5d85cc 100644
--- a/plugins/arm/v7/opdefs/ldrex_A8875.d
+++ b/plugins/arm/v7/opdefs/ldrex_A8875.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 184
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 185
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrexb_A8876.d b/plugins/arm/v7/opdefs/ldrexb_A8876.d
index 1b003ac..c90f3fe 100644
--- a/plugins/arm/v7/opdefs/ldrexb_A8876.d
+++ b/plugins/arm/v7/opdefs/ldrexb_A8876.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 186
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 187
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrexd_A8877.d b/plugins/arm/v7/opdefs/ldrexd_A8877.d
index 4555e2f..16b59dc 100644
--- a/plugins/arm/v7/opdefs/ldrexd_A8877.d
+++ b/plugins/arm/v7/opdefs/ldrexd_A8877.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 188
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 189
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrexh_A8878.d b/plugins/arm/v7/opdefs/ldrexh_A8878.d
index 5407195..fb08874 100644
--- a/plugins/arm/v7/opdefs/ldrexh_A8878.d
+++ b/plugins/arm/v7/opdefs/ldrexh_A8878.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 190
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 191
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrh_A8879.d b/plugins/arm/v7/opdefs/ldrh_A8879.d
index b38dbf8..75177f0 100644
--- a/plugins/arm/v7/opdefs/ldrh_A8879.d
+++ b/plugins/arm/v7/opdefs/ldrh_A8879.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 192
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 193
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -79,6 +83,8 @@
 
 	@syntax {
 
+		@subid 194
+
 		@assert {
 
 			P == 1
@@ -101,6 +107,8 @@
 
 	@syntax {
 
+		@subid 195
+
 		@assert {
 
 			P == 1
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 196
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrh_A8880.d b/plugins/arm/v7/opdefs/ldrh_A8880.d
index 305313e..f63e805 100644
--- a/plugins/arm/v7/opdefs/ldrh_A8880.d
+++ b/plugins/arm/v7/opdefs/ldrh_A8880.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 197
+
 		@assert {
 
 			P == 1
@@ -65,6 +67,8 @@
 
 	@syntax {
 
+		@subid 198
+
 		@assert {
 
 			P == 1
@@ -93,6 +97,8 @@
 
 	@syntax {
 
+		@subid 199
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrh_A8881.d b/plugins/arm/v7/opdefs/ldrh_A8881.d
index 495afdb..83baf79 100644
--- a/plugins/arm/v7/opdefs/ldrh_A8881.d
+++ b/plugins/arm/v7/opdefs/ldrh_A8881.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 200
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 201
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrh_A8882.d b/plugins/arm/v7/opdefs/ldrh_A8882.d
index eba872a..31f20cf 100644
--- a/plugins/arm/v7/opdefs/ldrh_A8882.d
+++ b/plugins/arm/v7/opdefs/ldrh_A8882.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 202
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 203
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 204
+
 		@assert {
 
 			P == 1
@@ -108,6 +114,8 @@
 
 	@syntax {
 
+		@subid 205
+
 		@assert {
 
 			P == 1
@@ -136,6 +144,8 @@
 
 	@syntax {
 
+		@subid 206
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrht_A8883.d b/plugins/arm/v7/opdefs/ldrht_A8883.d
index 22ec62a..851d06b 100644
--- a/plugins/arm/v7/opdefs/ldrht_A8883.d
+++ b/plugins/arm/v7/opdefs/ldrht_A8883.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 207
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 208
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 209
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrsb_A8884.d b/plugins/arm/v7/opdefs/ldrsb_A8884.d
index efdb1ac..327ffd3 100644
--- a/plugins/arm/v7/opdefs/ldrsb_A8884.d
+++ b/plugins/arm/v7/opdefs/ldrsb_A8884.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 210
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 211
+
 		@assert {
 
 			P == 1
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 212
+
 		@assert {
 
 			P == 1
@@ -102,6 +108,8 @@
 
 	@syntax {
 
+		@subid 213
+
 		@assert {
 
 			P == 0
@@ -130,6 +138,8 @@
 
 	@syntax {
 
+		@subid 214
+
 		@assert {
 
 			P == 1
@@ -158,6 +168,8 @@
 
 	@syntax {
 
+		@subid 215
+
 		@assert {
 
 			P == 1
@@ -186,6 +198,8 @@
 
 	@syntax {
 
+		@subid 216
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrsb_A8885.d b/plugins/arm/v7/opdefs/ldrsb_A8885.d
index d97345a..5c1447d 100644
--- a/plugins/arm/v7/opdefs/ldrsb_A8885.d
+++ b/plugins/arm/v7/opdefs/ldrsb_A8885.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 217
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 218
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrsb_A8886.d b/plugins/arm/v7/opdefs/ldrsb_A8886.d
index 05ce494..50b611d 100644
--- a/plugins/arm/v7/opdefs/ldrsb_A8886.d
+++ b/plugins/arm/v7/opdefs/ldrsb_A8886.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 219
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 220
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 221
+
 		@assert {
 
 			P == 1
@@ -108,6 +114,8 @@
 
 	@syntax {
 
+		@subid 222
+
 		@assert {
 
 			P == 1
@@ -136,6 +144,8 @@
 
 	@syntax {
 
+		@subid 223
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrsbt_A8887.d b/plugins/arm/v7/opdefs/ldrsbt_A8887.d
index 4adf33e..f90d8b7 100644
--- a/plugins/arm/v7/opdefs/ldrsbt_A8887.d
+++ b/plugins/arm/v7/opdefs/ldrsbt_A8887.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 224
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 225
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 226
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrsh_A8888.d b/plugins/arm/v7/opdefs/ldrsh_A8888.d
index f9d145f..a5ae458 100644
--- a/plugins/arm/v7/opdefs/ldrsh_A8888.d
+++ b/plugins/arm/v7/opdefs/ldrsh_A8888.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 227
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 228
+
 		@assert {
 
 			P == 1
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 229
+
 		@assert {
 
 			P == 1
@@ -102,6 +108,8 @@
 
 	@syntax {
 
+		@subid 230
+
 		@assert {
 
 			P == 0
@@ -130,6 +138,8 @@
 
 	@syntax {
 
+		@subid 231
+
 		@assert {
 
 			P == 1
@@ -158,6 +168,8 @@
 
 	@syntax {
 
+		@subid 232
+
 		@assert {
 
 			P == 1
@@ -186,6 +198,8 @@
 
 	@syntax {
 
+		@subid 233
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrsh_A8889.d b/plugins/arm/v7/opdefs/ldrsh_A8889.d
index 2831d0d..8ea8d24 100644
--- a/plugins/arm/v7/opdefs/ldrsh_A8889.d
+++ b/plugins/arm/v7/opdefs/ldrsh_A8889.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 234
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 235
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrsh_A8890.d b/plugins/arm/v7/opdefs/ldrsh_A8890.d
index a3ed440..9f0fb46 100644
--- a/plugins/arm/v7/opdefs/ldrsh_A8890.d
+++ b/plugins/arm/v7/opdefs/ldrsh_A8890.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 236
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 237
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 238
+
 		@assert {
 
 			P == 1
@@ -108,6 +114,8 @@
 
 	@syntax {
 
+		@subid 239
+
 		@assert {
 
 			P == 1
@@ -136,6 +144,8 @@
 
 	@syntax {
 
+		@subid 240
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/ldrsht_A8891.d b/plugins/arm/v7/opdefs/ldrsht_A8891.d
index 8d42214..759a6d8 100644
--- a/plugins/arm/v7/opdefs/ldrsht_A8891.d
+++ b/plugins/arm/v7/opdefs/ldrsht_A8891.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 241
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 242
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 243
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/ldrt_A8892.d b/plugins/arm/v7/opdefs/ldrt_A8892.d
index 8a54847..be38438 100644
--- a/plugins/arm/v7/opdefs/ldrt_A8892.d
+++ b/plugins/arm/v7/opdefs/ldrt_A8892.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 244
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 245
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 246
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/lsl_A8894.d b/plugins/arm/v7/opdefs/lsl_A8894.d
index eb073a8..617991f 100644
--- a/plugins/arm/v7/opdefs/lsl_A8894.d
+++ b/plugins/arm/v7/opdefs/lsl_A8894.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 247
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 248
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 249
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 250
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 251
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/lsl_A8895.d b/plugins/arm/v7/opdefs/lsl_A8895.d
index 7ca0470..761e2dc 100644
--- a/plugins/arm/v7/opdefs/lsl_A8895.d
+++ b/plugins/arm/v7/opdefs/lsl_A8895.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 252
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 253
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 254
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 255
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 256
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/lsr_A8896.d b/plugins/arm/v7/opdefs/lsr_A8896.d
index 77d08a2..07e1e21 100644
--- a/plugins/arm/v7/opdefs/lsr_A8896.d
+++ b/plugins/arm/v7/opdefs/lsr_A8896.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 257
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 258
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 259
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 260
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 261
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/lsr_A8897.d b/plugins/arm/v7/opdefs/lsr_A8897.d
index a7d529d..d0fd071 100644
--- a/plugins/arm/v7/opdefs/lsr_A8897.d
+++ b/plugins/arm/v7/opdefs/lsr_A8897.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 262
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 263
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 264
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 265
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 266
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/mcr_A8898.d b/plugins/arm/v7/opdefs/mcr_A8898.d
index fa35afc..c18639e 100644
--- a/plugins/arm/v7/opdefs/mcr_A8898.d
+++ b/plugins/arm/v7/opdefs/mcr_A8898.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 267
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -54,12 +56,14 @@
 
 }
 
-@encoding (A1) {
+@encoding (T2) {
 
-	@word 1 1 1 0 1 1 1 0 opc1(3) 0 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
+	@word 1 1 1 1 1 1 1 0 opc1(3) 0 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
 
 	@syntax {
 
+		@subid 268
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -77,12 +81,14 @@
 
 }
 
-@encoding (T2) {
+@encoding (A1) {
 
-	@word 1 1 1 1 1 1 1 0 opc1(3) 0 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
+	@word 1 1 1 0 1 1 1 0 opc1(3) 0 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
 
 	@syntax {
 
+		@subid 269
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -106,6 +112,8 @@
 
 	@syntax {
 
+		@subid 270
+
 		@conv {
 
 			cp = CoProcessor(coproc)
diff --git a/plugins/arm/v7/opdefs/mcrr_A8899.d b/plugins/arm/v7/opdefs/mcrr_A8899.d
index adc3a38..a7aa837 100644
--- a/plugins/arm/v7/opdefs/mcrr_A8899.d
+++ b/plugins/arm/v7/opdefs/mcrr_A8899.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 271
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -53,12 +55,14 @@
 
 }
 
-@encoding (A1) {
+@encoding (T2) {
 
-	@word 1 1 1 0 1 1 0 0 0 1 0 0 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
+	@word 1 1 1 1 1 1 0 0 0 1 0 0 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
 
 	@syntax {
 
+		@subid 272
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -75,12 +79,14 @@
 
 }
 
-@encoding (T2) {
+@encoding (A1) {
 
-	@word 1 1 1 1 1 1 0 0 0 1 0 0 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
+	@word 1 1 1 0 1 1 0 0 0 1 0 0 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
 
 	@syntax {
 
+		@subid 273
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 274
+
 		@conv {
 
 			cp = CoProcessor(coproc)
diff --git a/plugins/arm/v7/opdefs/mla_A88100.d b/plugins/arm/v7/opdefs/mla_A88100.d
index 661720f..c1d5c73 100644
--- a/plugins/arm/v7/opdefs/mla_A88100.d
+++ b/plugins/arm/v7/opdefs/mla_A88100.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 275
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 276
+
 		@assert {
 
 			S == 0
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 277
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/mls_A88101.d b/plugins/arm/v7/opdefs/mls_A88101.d
index 44ca17b..54dfe42 100644
--- a/plugins/arm/v7/opdefs/mls_A88101.d
+++ b/plugins/arm/v7/opdefs/mls_A88101.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 278
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 279
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/mov_A88102.d b/plugins/arm/v7/opdefs/mov_A88102.d
index 1d06076..f68fed6 100644
--- a/plugins/arm/v7/opdefs/mov_A88102.d
+++ b/plugins/arm/v7/opdefs/mov_A88102.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 280
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 281
+
 		@assert {
 
 			S == 0
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 282
+
 		@assert {
 
 			S == 1
@@ -100,6 +106,8 @@
 
 	@syntax {
 
+		@subid 283
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -119,6 +127,8 @@
 
 	@syntax {
 
+		@subid 284
+
 		@assert {
 
 			S == 0
@@ -144,6 +154,8 @@
 
 	@syntax {
 
+		@subid 285
+
 		@assert {
 
 			S == 1
@@ -175,6 +187,8 @@
 
 	@syntax {
 
+		@subid 286
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/mov_A88103.d b/plugins/arm/v7/opdefs/mov_A88103.d
index a51accc..c4a9f97 100644
--- a/plugins/arm/v7/opdefs/mov_A88103.d
+++ b/plugins/arm/v7/opdefs/mov_A88103.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 287
+
 		@conv {
 
 			reg_D = Register(D:Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 288
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 289
+
 		@assert {
 
 			S == 0
@@ -94,6 +100,8 @@
 
 	@syntax {
 
+		@subid 290
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/mov_A88104.d b/plugins/arm/v7/opdefs/mov_A88104.d
index da7ffd8..c619baa 100644
--- a/plugins/arm/v7/opdefs/mov_A88104.d
+++ b/plugins/arm/v7/opdefs/mov_A88104.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 291
+
 		@assert {
 
 			S == 0
@@ -62,6 +64,8 @@
 
 	@syntax {
 
+		@subid 292
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/movt_A88106.d b/plugins/arm/v7/opdefs/movt_A88106.d
index d3ac58d..852b745 100644
--- a/plugins/arm/v7/opdefs/movt_A88106.d
+++ b/plugins/arm/v7/opdefs/movt_A88106.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 293
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 294
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/mrc_A88107.d b/plugins/arm/v7/opdefs/mrc_A88107.d
index a1315a4..04591e7 100644
--- a/plugins/arm/v7/opdefs/mrc_A88107.d
+++ b/plugins/arm/v7/opdefs/mrc_A88107.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 295
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -54,12 +56,14 @@
 
 }
 
-@encoding (A1) {
+@encoding (T2) {
 
-	@word 1 1 1 0 1 1 1 0 opc1(3) 1 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
+	@word 1 1 1 1 1 1 1 0 opc1(3) 1 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
 
 	@syntax {
 
+		@subid 296
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -77,12 +81,14 @@
 
 }
 
-@encoding (T2) {
+@encoding (A1) {
 
-	@word 1 1 1 1 1 1 1 0 opc1(3) 1 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
+	@word 1 1 1 0 1 1 1 0 opc1(3) 1 CRn(4) Rt(4) coproc(4) opc2(3) 1 CRm(4)
 
 	@syntax {
 
+		@subid 297
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -106,6 +112,8 @@
 
 	@syntax {
 
+		@subid 298
+
 		@conv {
 
 			cp = CoProcessor(coproc)
diff --git a/plugins/arm/v7/opdefs/mrrc_A88108.d b/plugins/arm/v7/opdefs/mrrc_A88108.d
index cfb6a81..0e33e6c 100644
--- a/plugins/arm/v7/opdefs/mrrc_A88108.d
+++ b/plugins/arm/v7/opdefs/mrrc_A88108.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 299
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -53,12 +55,14 @@
 
 }
 
-@encoding (A1) {
+@encoding (T2) {
 
-	@word 1 1 1 0 1 1 0 0 0 1 0 1 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
+	@word 1 1 1 1 1 1 0 0 0 1 0 1 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
 
 	@syntax {
 
+		@subid 300
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -75,12 +79,14 @@
 
 }
 
-@encoding (T2) {
+@encoding (A1) {
 
-	@word 1 1 1 1 1 1 0 0 0 1 0 1 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
+	@word 1 1 1 0 1 1 0 0 0 1 0 1 Rt2(4) Rt(4) coproc(4) opc1(4) CRm(4)
 
 	@syntax {
 
+		@subid 301
+
 		@conv {
 
 			cp = CoProcessor(coproc)
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 302
+
 		@conv {
 
 			cp = CoProcessor(coproc)
diff --git a/plugins/arm/v7/opdefs/mul_A88114.d b/plugins/arm/v7/opdefs/mul_A88114.d
index bc7ccd8..a246a56 100644
--- a/plugins/arm/v7/opdefs/mul_A88114.d
+++ b/plugins/arm/v7/opdefs/mul_A88114.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 303
+
 		@conv {
 
 			reg_D = Register(Rdm)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 304
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 305
+
 		@assert {
 
 			S == 0
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 306
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/mvn_A88115.d b/plugins/arm/v7/opdefs/mvn_A88115.d
index 083a477..5c23abb 100644
--- a/plugins/arm/v7/opdefs/mvn_A88115.d
+++ b/plugins/arm/v7/opdefs/mvn_A88115.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 307
+
 		@assert {
 
 			S == 0
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 308
+
 		@assert {
 
 			S == 1
@@ -81,6 +85,8 @@
 
 	@syntax {
 
+		@subid 309
+
 		@assert {
 
 			S == 0
@@ -106,6 +112,8 @@
 
 	@syntax {
 
+		@subid 310
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/mvn_A88116.d b/plugins/arm/v7/opdefs/mvn_A88116.d
index 764a7cd..25185c9 100644
--- a/plugins/arm/v7/opdefs/mvn_A88116.d
+++ b/plugins/arm/v7/opdefs/mvn_A88116.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 311
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 312
+
 		@assert {
 
 			S == 0
@@ -76,6 +80,8 @@
 
 	@syntax {
 
+		@subid 313
+
 		@assert {
 
 			S == 1
@@ -102,6 +108,8 @@
 
 	@syntax {
 
+		@subid 314
+
 		@assert {
 
 			S == 0
@@ -128,6 +136,8 @@
 
 	@syntax {
 
+		@subid 315
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/mvn_A88117.d b/plugins/arm/v7/opdefs/mvn_A88117.d
index 71b4515..813d735 100644
--- a/plugins/arm/v7/opdefs/mvn_A88117.d
+++ b/plugins/arm/v7/opdefs/mvn_A88117.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 316
+
 		@assert {
 
 			S == 0
@@ -65,6 +67,8 @@
 
 	@syntax {
 
+		@subid 317
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/nop_A88119.d b/plugins/arm/v7/opdefs/nop_A88119.d
index a36379d..1ea0e96 100644
--- a/plugins/arm/v7/opdefs/nop_A88119.d
+++ b/plugins/arm/v7/opdefs/nop_A88119.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 318
+
 		@asm nop
 
 	}
@@ -49,6 +51,8 @@
 
 	@syntax {
 
+		@subid 319
+
 		@asm nop.w
 
 	}
@@ -61,6 +65,8 @@
 
 	@syntax {
 
+		@subid 320
+
 		@asm nop
 
 		@rules {
diff --git a/plugins/arm/v7/opdefs/orn_A88120.d b/plugins/arm/v7/opdefs/orn_A88120.d
index 3c376fd..4f3091c 100644
--- a/plugins/arm/v7/opdefs/orn_A88120.d
+++ b/plugins/arm/v7/opdefs/orn_A88120.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 321
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 322
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/orn_A88121.d b/plugins/arm/v7/opdefs/orn_A88121.d
index b0f6046..fcc9898 100644
--- a/plugins/arm/v7/opdefs/orn_A88121.d
+++ b/plugins/arm/v7/opdefs/orn_A88121.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 323
+
 		@assert {
 
 			S == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 324
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/orr_A88122.d b/plugins/arm/v7/opdefs/orr_A88122.d
index 6729f7c..be54518 100644
--- a/plugins/arm/v7/opdefs/orr_A88122.d
+++ b/plugins/arm/v7/opdefs/orr_A88122.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 325
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 326
+
 		@assert {
 
 			S == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 327
+
 		@assert {
 
 			S == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 328
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/orr_A88123.d b/plugins/arm/v7/opdefs/orr_A88123.d
index 8e6cc97..923b766 100644
--- a/plugins/arm/v7/opdefs/orr_A88123.d
+++ b/plugins/arm/v7/opdefs/orr_A88123.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 329
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 330
+
 		@assert {
 
 			S == 0
@@ -78,6 +82,8 @@
 
 	@syntax {
 
+		@subid 331
+
 		@assert {
 
 			S == 1
@@ -105,6 +111,8 @@
 
 	@syntax {
 
+		@subid 332
+
 		@assert {
 
 			S == 0
@@ -132,6 +140,8 @@
 
 	@syntax {
 
+		@subid 333
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/orr_A88124.d b/plugins/arm/v7/opdefs/orr_A88124.d
index d376530..85ddeba 100644
--- a/plugins/arm/v7/opdefs/orr_A88124.d
+++ b/plugins/arm/v7/opdefs/orr_A88124.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 334
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 335
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/pkh_A88125.d b/plugins/arm/v7/opdefs/pkh_A88125.d
index eab5071..76c185c 100644
--- a/plugins/arm/v7/opdefs/pkh_A88125.d
+++ b/plugins/arm/v7/opdefs/pkh_A88125.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 336
+
 		@assert {
 
 			tb == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 337
+
 		@assert {
 
 			tb == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 338
+
 		@assert {
 
 			tb == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 339
+
 		@assert {
 
 			tb == 1
diff --git a/plugins/arm/v7/opdefs/pld_A88126.d b/plugins/arm/v7/opdefs/pld_A88126.d
index e3899db..7e4994f 100644
--- a/plugins/arm/v7/opdefs/pld_A88126.d
+++ b/plugins/arm/v7/opdefs/pld_A88126.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 340
+
 		@assert {
 
 			W == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 341
+
 		@assert {
 
 			W == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 342
+
 		@assert {
 
 			W == 0
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 343
+
 		@assert {
 
 			W == 1
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 344
+
 		@assert {
 
 			R == 1
@@ -149,6 +159,8 @@
 
 	@syntax {
 
+		@subid 345
+
 		@assert {
 
 			R == 0
diff --git a/plugins/arm/v7/opdefs/pld_A88127.d b/plugins/arm/v7/opdefs/pld_A88127.d
index 5939a0c..49f27c8 100644
--- a/plugins/arm/v7/opdefs/pld_A88127.d
+++ b/plugins/arm/v7/opdefs/pld_A88127.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 346
+
 		@conv {
 
 			imm32 = ZeroExtend(imm12, 32)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 347
+
 		@conv {
 
 			imm32 = ZeroExtend(imm12, 32)
diff --git a/plugins/arm/v7/opdefs/pld_A88128.d b/plugins/arm/v7/opdefs/pld_A88128.d
index f6cf0a3..50c9bc8 100644
--- a/plugins/arm/v7/opdefs/pld_A88128.d
+++ b/plugins/arm/v7/opdefs/pld_A88128.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 348
+
 		@assert {
 
 			W == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 349
+
 		@assert {
 
 			W == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 350
+
 		@assert {
 
 			R == 1
@@ -106,6 +112,8 @@
 
 	@syntax {
 
+		@subid 351
+
 		@assert {
 
 			R == 0
diff --git a/plugins/arm/v7/opdefs/pop_A88131.d b/plugins/arm/v7/opdefs/pop_A88131.d
index c831d17..2881669 100644
--- a/plugins/arm/v7/opdefs/pop_A88131.d
+++ b/plugins/arm/v7/opdefs/pop_A88131.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 352
+
 		@conv {
 
 			registers = RegList(P:'0000000':register_list)
@@ -61,6 +63,8 @@
 
 	@syntax {
 
+		@subid 353
+
 		@conv {
 
 			registers = RegList(P:M:'0':register_list)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 354
+
 		@conv {
 
 			registers = SingleRegList(Rt)
diff --git a/plugins/arm/v7/opdefs/pop_A88132.d b/plugins/arm/v7/opdefs/pop_A88132.d
index 1846b7a..2cdfdfe 100644
--- a/plugins/arm/v7/opdefs/pop_A88132.d
+++ b/plugins/arm/v7/opdefs/pop_A88132.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 355
+
 		@conv {
 
 			registers = RegList(register_list)
@@ -67,6 +69,8 @@
 
 	@syntax {
 
+		@subid 356
+
 		@conv {
 
 			registers = SingleRegList(Rt)
diff --git a/plugins/arm/v7/opdefs/push_A88133.d b/plugins/arm/v7/opdefs/push_A88133.d
index d3b08c8..91be90b 100644
--- a/plugins/arm/v7/opdefs/push_A88133.d
+++ b/plugins/arm/v7/opdefs/push_A88133.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 357
+
 		@conv {
 
 			registers = RegList('0':M:'000000':register_list)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 358
+
 		@conv {
 
 			registers = RegList('0':M:'0':register_list)
@@ -73,6 +77,8 @@
 
 	@syntax {
 
+		@subid 359
+
 		@conv {
 
 			registers = SingleRegList(Rt)
@@ -91,6 +97,8 @@
 
 	@syntax {
 
+		@subid 360
+
 		@conv {
 
 			registers = RegList(register_list)
@@ -115,6 +123,8 @@
 
 	@syntax {
 
+		@subid 361
+
 		@conv {
 
 			registers = SingleRegList(Rt)
diff --git a/plugins/arm/v7/opdefs/qadd16_A88135.d b/plugins/arm/v7/opdefs/qadd16_A88135.d
index ca9371b..175ffe4 100644
--- a/plugins/arm/v7/opdefs/qadd16_A88135.d
+++ b/plugins/arm/v7/opdefs/qadd16_A88135.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 364
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 365
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qadd8_A88136.d b/plugins/arm/v7/opdefs/qadd8_A88136.d
index f3a07bd..6a6fd13 100644
--- a/plugins/arm/v7/opdefs/qadd8_A88136.d
+++ b/plugins/arm/v7/opdefs/qadd8_A88136.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 366
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 367
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qadd_A88134.d b/plugins/arm/v7/opdefs/qadd_A88134.d
index 2ced9c3..ab57530 100644
--- a/plugins/arm/v7/opdefs/qadd_A88134.d
+++ b/plugins/arm/v7/opdefs/qadd_A88134.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 362
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 363
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qasx_A88137.d b/plugins/arm/v7/opdefs/qasx_A88137.d
index 531bad7..ed856ae 100644
--- a/plugins/arm/v7/opdefs/qasx_A88137.d
+++ b/plugins/arm/v7/opdefs/qasx_A88137.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 368
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 369
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qdadd_A88138.d b/plugins/arm/v7/opdefs/qdadd_A88138.d
index 48f2169..cb32dab 100644
--- a/plugins/arm/v7/opdefs/qdadd_A88138.d
+++ b/plugins/arm/v7/opdefs/qdadd_A88138.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 370
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 371
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qdsub_A88139.d b/plugins/arm/v7/opdefs/qdsub_A88139.d
index 0e2398f..b510e45 100644
--- a/plugins/arm/v7/opdefs/qdsub_A88139.d
+++ b/plugins/arm/v7/opdefs/qdsub_A88139.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 372
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 373
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qsax_A88140.d b/plugins/arm/v7/opdefs/qsax_A88140.d
index e17c7f1..4953c88 100644
--- a/plugins/arm/v7/opdefs/qsax_A88140.d
+++ b/plugins/arm/v7/opdefs/qsax_A88140.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 374
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 375
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qsub16_A88142.d b/plugins/arm/v7/opdefs/qsub16_A88142.d
index 1176d51..5a9c950 100644
--- a/plugins/arm/v7/opdefs/qsub16_A88142.d
+++ b/plugins/arm/v7/opdefs/qsub16_A88142.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 378
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 379
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qsub8_A88143.d b/plugins/arm/v7/opdefs/qsub8_A88143.d
index e6d5924..518cde9 100644
--- a/plugins/arm/v7/opdefs/qsub8_A88143.d
+++ b/plugins/arm/v7/opdefs/qsub8_A88143.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 380
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 381
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/qsub_A88141.d b/plugins/arm/v7/opdefs/qsub_A88141.d
index 08f36a9..9fc14da 100644
--- a/plugins/arm/v7/opdefs/qsub_A88141.d
+++ b/plugins/arm/v7/opdefs/qsub_A88141.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 376
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 377
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/rbit_A88144.d b/plugins/arm/v7/opdefs/rbit_A88144.d
index 07a8023..b868310 100644
--- a/plugins/arm/v7/opdefs/rbit_A88144.d
+++ b/plugins/arm/v7/opdefs/rbit_A88144.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 382
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 383
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/rev16_A88146.d b/plugins/arm/v7/opdefs/rev16_A88146.d
index 45135d3..adb8f0b 100644
--- a/plugins/arm/v7/opdefs/rev16_A88146.d
+++ b/plugins/arm/v7/opdefs/rev16_A88146.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 387
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 388
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 389
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/rev_A88145.d b/plugins/arm/v7/opdefs/rev_A88145.d
index 36413c3..392e90c 100644
--- a/plugins/arm/v7/opdefs/rev_A88145.d
+++ b/plugins/arm/v7/opdefs/rev_A88145.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 384
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 385
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 386
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/revsh_A88147.d b/plugins/arm/v7/opdefs/revsh_A88147.d
index 28c101a..37df8b8 100644
--- a/plugins/arm/v7/opdefs/revsh_A88147.d
+++ b/plugins/arm/v7/opdefs/revsh_A88147.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 390
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 391
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -75,6 +79,8 @@
 
 	@syntax {
 
+		@subid 392
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/ror_A88149.d b/plugins/arm/v7/opdefs/ror_A88149.d
index 962e37e..5cb9893 100644
--- a/plugins/arm/v7/opdefs/ror_A88149.d
+++ b/plugins/arm/v7/opdefs/ror_A88149.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 393
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 394
+
 		@assert {
 
 			S == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 395
+
 		@assert {
 
 			S == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 396
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/ror_A88150.d b/plugins/arm/v7/opdefs/ror_A88150.d
index aec86e3..5c62d28 100644
--- a/plugins/arm/v7/opdefs/ror_A88150.d
+++ b/plugins/arm/v7/opdefs/ror_A88150.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 397
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 398
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 399
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 400
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 401
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/rrx_A88151.d b/plugins/arm/v7/opdefs/rrx_A88151.d
index 2d16327..1e26aa3 100644
--- a/plugins/arm/v7/opdefs/rrx_A88151.d
+++ b/plugins/arm/v7/opdefs/rrx_A88151.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 402
+
 		@assert {
 
 			S == 0
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 403
+
 		@assert {
 
 			S == 1
@@ -81,6 +85,8 @@
 
 	@syntax {
 
+		@subid 404
+
 		@assert {
 
 			S == 0
@@ -106,6 +112,8 @@
 
 	@syntax {
 
+		@subid 405
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/rsb_A88152.d b/plugins/arm/v7/opdefs/rsb_A88152.d
index 3e035ac..6eb7139 100644
--- a/plugins/arm/v7/opdefs/rsb_A88152.d
+++ b/plugins/arm/v7/opdefs/rsb_A88152.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 406
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 407
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 408
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 409
+
 		@assert {
 
 			S == 0
@@ -129,6 +137,8 @@
 
 	@syntax {
 
+		@subid 410
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/rsb_A88153.d b/plugins/arm/v7/opdefs/rsb_A88153.d
index cd2e6f5..a1fc0cc 100644
--- a/plugins/arm/v7/opdefs/rsb_A88153.d
+++ b/plugins/arm/v7/opdefs/rsb_A88153.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 411
+
 		@assert {
 
 			S == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 412
+
 		@assert {
 
 			S == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 413
+
 		@assert {
 
 			S == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 414
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/rsb_A88154.d b/plugins/arm/v7/opdefs/rsb_A88154.d
index f3d3651..c35f396 100644
--- a/plugins/arm/v7/opdefs/rsb_A88154.d
+++ b/plugins/arm/v7/opdefs/rsb_A88154.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 415
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 416
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/rsc_A88155.d b/plugins/arm/v7/opdefs/rsc_A88155.d
index 49a0c57..e9eb02d 100644
--- a/plugins/arm/v7/opdefs/rsc_A88155.d
+++ b/plugins/arm/v7/opdefs/rsc_A88155.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 417
+
 		@assert {
 
 			S == 0
@@ -63,6 +65,8 @@
 
 	@syntax {
 
+		@subid 418
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/rsc_A88156.d b/plugins/arm/v7/opdefs/rsc_A88156.d
index 59c0adb..e97f13e 100644
--- a/plugins/arm/v7/opdefs/rsc_A88156.d
+++ b/plugins/arm/v7/opdefs/rsc_A88156.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 419
+
 		@assert {
 
 			S == 0
@@ -64,6 +66,8 @@
 
 	@syntax {
 
+		@subid 420
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/rsc_A88157.d b/plugins/arm/v7/opdefs/rsc_A88157.d
index b9daae5..1280b3f 100644
--- a/plugins/arm/v7/opdefs/rsc_A88157.d
+++ b/plugins/arm/v7/opdefs/rsc_A88157.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 421
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 422
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sadd16_A88158.d b/plugins/arm/v7/opdefs/sadd16_A88158.d
index e69867d..9fa7760 100644
--- a/plugins/arm/v7/opdefs/sadd16_A88158.d
+++ b/plugins/arm/v7/opdefs/sadd16_A88158.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 423
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 424
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sadd8_A88159.d b/plugins/arm/v7/opdefs/sadd8_A88159.d
index 74c1e87..3420e45 100644
--- a/plugins/arm/v7/opdefs/sadd8_A88159.d
+++ b/plugins/arm/v7/opdefs/sadd8_A88159.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 425
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 426
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sasx_A88160.d b/plugins/arm/v7/opdefs/sasx_A88160.d
index 21e76d8..1056630 100644
--- a/plugins/arm/v7/opdefs/sasx_A88160.d
+++ b/plugins/arm/v7/opdefs/sasx_A88160.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 427
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 428
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sbc_A88161.d b/plugins/arm/v7/opdefs/sbc_A88161.d
index 43481aa..8243825 100644
--- a/plugins/arm/v7/opdefs/sbc_A88161.d
+++ b/plugins/arm/v7/opdefs/sbc_A88161.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 429
+
 		@assert {
 
 			S == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 430
+
 		@assert {
 
 			S == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 431
+
 		@assert {
 
 			S == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 432
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sbc_A88162.d b/plugins/arm/v7/opdefs/sbc_A88162.d
index f28187b..4504b1a 100644
--- a/plugins/arm/v7/opdefs/sbc_A88162.d
+++ b/plugins/arm/v7/opdefs/sbc_A88162.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 433
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 434
+
 		@assert {
 
 			S == 0
@@ -78,6 +82,8 @@
 
 	@syntax {
 
+		@subid 435
+
 		@assert {
 
 			S == 1
@@ -105,6 +111,8 @@
 
 	@syntax {
 
+		@subid 436
+
 		@assert {
 
 			S == 0
@@ -132,6 +140,8 @@
 
 	@syntax {
 
+		@subid 437
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sbc_A88163.d b/plugins/arm/v7/opdefs/sbc_A88163.d
index 96ce70d..5d54b34 100644
--- a/plugins/arm/v7/opdefs/sbc_A88163.d
+++ b/plugins/arm/v7/opdefs/sbc_A88163.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 438
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 439
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sbfx_A88164.d b/plugins/arm/v7/opdefs/sbfx_A88164.d
index 688d67b..c28c39c 100644
--- a/plugins/arm/v7/opdefs/sbfx_A88164.d
+++ b/plugins/arm/v7/opdefs/sbfx_A88164.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 440
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -59,6 +61,8 @@
 
 	@syntax {
 
+		@subid 441
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sdiv_A88165.d b/plugins/arm/v7/opdefs/sdiv_A88165.d
index c6017d5..2852046 100644
--- a/plugins/arm/v7/opdefs/sdiv_A88165.d
+++ b/plugins/arm/v7/opdefs/sdiv_A88165.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 442
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 443
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sel_A88166.d b/plugins/arm/v7/opdefs/sel_A88166.d
index 6fd5023..5b5e332 100644
--- a/plugins/arm/v7/opdefs/sel_A88166.d
+++ b/plugins/arm/v7/opdefs/sel_A88166.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 444
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 445
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/setend_A88167.d b/plugins/arm/v7/opdefs/setend_A88167.d
index 76f745c..1e6de01 100644
--- a/plugins/arm/v7/opdefs/setend_A88167.d
+++ b/plugins/arm/v7/opdefs/setend_A88167.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 446
+
 		@conv {
 
 			endian_specifier = Endian(E)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 447
+
 		@conv {
 
 			endian_specifier = Endian(E)
diff --git a/plugins/arm/v7/opdefs/sev_A88168.d b/plugins/arm/v7/opdefs/sev_A88168.d
index 5939afb..90f6056 100644
--- a/plugins/arm/v7/opdefs/sev_A88168.d
+++ b/plugins/arm/v7/opdefs/sev_A88168.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 448
+
 		@asm sev
 
 	}
@@ -49,6 +51,8 @@
 
 	@syntax {
 
+		@subid 449
+
 		@asm sev.w
 
 	}
@@ -61,6 +65,8 @@
 
 	@syntax {
 
+		@subid 450
+
 		@asm sev
 
 		@rules {
diff --git a/plugins/arm/v7/opdefs/shadd16_A88169.d b/plugins/arm/v7/opdefs/shadd16_A88169.d
index a408e3c..98c6768 100644
--- a/plugins/arm/v7/opdefs/shadd16_A88169.d
+++ b/plugins/arm/v7/opdefs/shadd16_A88169.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 451
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 452
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/shadd8_A88170.d b/plugins/arm/v7/opdefs/shadd8_A88170.d
index 0cfff4e..71cc9cf 100644
--- a/plugins/arm/v7/opdefs/shadd8_A88170.d
+++ b/plugins/arm/v7/opdefs/shadd8_A88170.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 453
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 454
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/shasx_A88171.d b/plugins/arm/v7/opdefs/shasx_A88171.d
index 243d568..d808b25 100644
--- a/plugins/arm/v7/opdefs/shasx_A88171.d
+++ b/plugins/arm/v7/opdefs/shasx_A88171.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 455
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 456
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/shsax_A88172.d b/plugins/arm/v7/opdefs/shsax_A88172.d
index d176085..59641e3 100644
--- a/plugins/arm/v7/opdefs/shsax_A88172.d
+++ b/plugins/arm/v7/opdefs/shsax_A88172.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 457
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 458
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/shsub16_A88173.d b/plugins/arm/v7/opdefs/shsub16_A88173.d
index 955070d..03bbbe8 100644
--- a/plugins/arm/v7/opdefs/shsub16_A88173.d
+++ b/plugins/arm/v7/opdefs/shsub16_A88173.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 459
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 460
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/shsub8_A88174.d b/plugins/arm/v7/opdefs/shsub8_A88174.d
index d90d270..e0df718 100644
--- a/plugins/arm/v7/opdefs/shsub8_A88174.d
+++ b/plugins/arm/v7/opdefs/shsub8_A88174.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 461
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 462
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/smlad_A88177.d b/plugins/arm/v7/opdefs/smlad_A88177.d
index 5fa0850..9f56ebb 100644
--- a/plugins/arm/v7/opdefs/smlad_A88177.d
+++ b/plugins/arm/v7/opdefs/smlad_A88177.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 463
+
 		@assert {
 
 			M == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 464
+
 		@assert {
 
 			M == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 465
+
 		@assert {
 
 			M == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 466
+
 		@assert {
 
 			M == 1
diff --git a/plugins/arm/v7/opdefs/smlal_A88178.d b/plugins/arm/v7/opdefs/smlal_A88178.d
index b504510..e6fcaf8 100644
--- a/plugins/arm/v7/opdefs/smlal_A88178.d
+++ b/plugins/arm/v7/opdefs/smlal_A88178.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 467
+
 		@conv {
 
 			reg_DLO = Register(RdLo)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 468
+
 		@assert {
 
 			S == 0
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 469
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/smlald_A88180.d b/plugins/arm/v7/opdefs/smlald_A88180.d
index c44a90b..54e0634 100644
--- a/plugins/arm/v7/opdefs/smlald_A88180.d
+++ b/plugins/arm/v7/opdefs/smlald_A88180.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 470
+
 		@assert {
 
 			M == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 471
+
 		@assert {
 
 			M == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 472
+
 		@assert {
 
 			M == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 473
+
 		@assert {
 
 			M == 1
diff --git a/plugins/arm/v7/opdefs/smlsd_A88182.d b/plugins/arm/v7/opdefs/smlsd_A88182.d
index 28546fa..cace235 100644
--- a/plugins/arm/v7/opdefs/smlsd_A88182.d
+++ b/plugins/arm/v7/opdefs/smlsd_A88182.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 474
+
 		@assert {
 
 			M == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 475
+
 		@assert {
 
 			M == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 476
+
 		@assert {
 
 			M == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 477
+
 		@assert {
 
 			M == 1
diff --git a/plugins/arm/v7/opdefs/smlsld_A88183.d b/plugins/arm/v7/opdefs/smlsld_A88183.d
index 101ff1c..67545f6 100644
--- a/plugins/arm/v7/opdefs/smlsld_A88183.d
+++ b/plugins/arm/v7/opdefs/smlsld_A88183.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 478
+
 		@assert {
 
 			M == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 479
+
 		@assert {
 
 			M == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 480
+
 		@assert {
 
 			M == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 481
+
 		@assert {
 
 			M == 1
diff --git a/plugins/arm/v7/opdefs/smmla_A88184.d b/plugins/arm/v7/opdefs/smmla_A88184.d
index 40c5589..9ac5778 100644
--- a/plugins/arm/v7/opdefs/smmla_A88184.d
+++ b/plugins/arm/v7/opdefs/smmla_A88184.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 482
+
 		@assert {
 
 			R == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 483
+
 		@assert {
 
 			R == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 484
+
 		@assert {
 
 			R == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 485
+
 		@assert {
 
 			R == 1
diff --git a/plugins/arm/v7/opdefs/smmls_A88185.d b/plugins/arm/v7/opdefs/smmls_A88185.d
index 356d60c..ea32b1a 100644
--- a/plugins/arm/v7/opdefs/smmls_A88185.d
+++ b/plugins/arm/v7/opdefs/smmls_A88185.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 486
+
 		@assert {
 
 			R == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 487
+
 		@assert {
 
 			R == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 488
+
 		@assert {
 
 			R == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 489
+
 		@assert {
 
 			R == 1
diff --git a/plugins/arm/v7/opdefs/smmul_A88186.d b/plugins/arm/v7/opdefs/smmul_A88186.d
index 3bfc841..b3d053f 100644
--- a/plugins/arm/v7/opdefs/smmul_A88186.d
+++ b/plugins/arm/v7/opdefs/smmul_A88186.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 490
+
 		@assert {
 
 			R == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 491
+
 		@assert {
 
 			R == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 492
+
 		@assert {
 
 			R == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 493
+
 		@assert {
 
 			R == 1
diff --git a/plugins/arm/v7/opdefs/smuad_A88187.d b/plugins/arm/v7/opdefs/smuad_A88187.d
index 9c994d3..bfdcd43 100644
--- a/plugins/arm/v7/opdefs/smuad_A88187.d
+++ b/plugins/arm/v7/opdefs/smuad_A88187.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 494
+
 		@assert {
 
 			M == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 495
+
 		@assert {
 
 			M == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 496
+
 		@assert {
 
 			M == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 497
+
 		@assert {
 
 			M == 1
diff --git a/plugins/arm/v7/opdefs/smull_A88189.d b/plugins/arm/v7/opdefs/smull_A88189.d
index 9604e95..0ecc51b 100644
--- a/plugins/arm/v7/opdefs/smull_A88189.d
+++ b/plugins/arm/v7/opdefs/smull_A88189.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 498
+
 		@conv {
 
 			reg_DLO = Register(RdLo)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 499
+
 		@assert {
 
 			S == 0
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 500
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/smusd_A88191.d b/plugins/arm/v7/opdefs/smusd_A88191.d
index e1bd61e..768d616 100644
--- a/plugins/arm/v7/opdefs/smusd_A88191.d
+++ b/plugins/arm/v7/opdefs/smusd_A88191.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 501
+
 		@assert {
 
 			M == 0
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 502
+
 		@assert {
 
 			M == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 503
+
 		@assert {
 
 			M == 0
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 504
+
 		@assert {
 
 			M == 1
diff --git a/plugins/arm/v7/opdefs/ssat16_A88194.d b/plugins/arm/v7/opdefs/ssat16_A88194.d
index 5236af7..30515d0 100644
--- a/plugins/arm/v7/opdefs/ssat16_A88194.d
+++ b/plugins/arm/v7/opdefs/ssat16_A88194.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 507
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 508
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/ssat_A88193.d b/plugins/arm/v7/opdefs/ssat_A88193.d
index 93d58cd..7f323b7 100644
--- a/plugins/arm/v7/opdefs/ssat_A88193.d
+++ b/plugins/arm/v7/opdefs/ssat_A88193.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 505
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 506
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/ssax_A88195.d b/plugins/arm/v7/opdefs/ssax_A88195.d
index 68c70f7..f7ac18a 100644
--- a/plugins/arm/v7/opdefs/ssax_A88195.d
+++ b/plugins/arm/v7/opdefs/ssax_A88195.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 509
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 510
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/ssub16_A88196.d b/plugins/arm/v7/opdefs/ssub16_A88196.d
index 3abdb0e..78a9a4a 100644
--- a/plugins/arm/v7/opdefs/ssub16_A88196.d
+++ b/plugins/arm/v7/opdefs/ssub16_A88196.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 511
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 512
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/ssub8_A88197.d b/plugins/arm/v7/opdefs/ssub8_A88197.d
index 39e8eec..38045ce 100644
--- a/plugins/arm/v7/opdefs/ssub8_A88197.d
+++ b/plugins/arm/v7/opdefs/ssub8_A88197.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 513
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 514
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/str_A88203.d b/plugins/arm/v7/opdefs/str_A88203.d
index 98c97a2..d5c5744 100644
--- a/plugins/arm/v7/opdefs/str_A88203.d
+++ b/plugins/arm/v7/opdefs/str_A88203.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 515
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 516
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -79,6 +83,8 @@
 
 	@syntax {
 
+		@subid 517
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -100,6 +106,8 @@
 
 	@syntax {
 
+		@subid 518
+
 		@assert {
 
 			P == 1
@@ -122,6 +130,8 @@
 
 	@syntax {
 
+		@subid 519
+
 		@assert {
 
 			P == 1
@@ -144,6 +154,8 @@
 
 	@syntax {
 
+		@subid 520
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/str_A88204.d b/plugins/arm/v7/opdefs/str_A88204.d
index d0646bd..cee5ff5 100644
--- a/plugins/arm/v7/opdefs/str_A88204.d
+++ b/plugins/arm/v7/opdefs/str_A88204.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 521
+
 		@assert {
 
 			P == 1
@@ -65,6 +67,8 @@
 
 	@syntax {
 
+		@subid 522
+
 		@assert {
 
 			P == 1
@@ -93,6 +97,8 @@
 
 	@syntax {
 
+		@subid 523
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/str_A88205.d b/plugins/arm/v7/opdefs/str_A88205.d
index 3f2c87e..59c43a7 100644
--- a/plugins/arm/v7/opdefs/str_A88205.d
+++ b/plugins/arm/v7/opdefs/str_A88205.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 524
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 525
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 526
+
 		@assert {
 
 			P == 1
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 527
+
 		@assert {
 
 			P == 1
@@ -138,6 +146,8 @@
 
 	@syntax {
 
+		@subid 528
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strb_A88206.d b/plugins/arm/v7/opdefs/strb_A88206.d
index 632187b..7cbf681 100644
--- a/plugins/arm/v7/opdefs/strb_A88206.d
+++ b/plugins/arm/v7/opdefs/strb_A88206.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 529
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 530
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -79,6 +83,8 @@
 
 	@syntax {
 
+		@subid 531
+
 		@assert {
 
 			P == 1
@@ -101,6 +107,8 @@
 
 	@syntax {
 
+		@subid 532
+
 		@assert {
 
 			P == 1
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 533
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strb_A88207.d b/plugins/arm/v7/opdefs/strb_A88207.d
index 2495682..2c6a13f 100644
--- a/plugins/arm/v7/opdefs/strb_A88207.d
+++ b/plugins/arm/v7/opdefs/strb_A88207.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 534
+
 		@assert {
 
 			P == 1
@@ -65,6 +67,8 @@
 
 	@syntax {
 
+		@subid 535
+
 		@assert {
 
 			P == 1
@@ -93,6 +97,8 @@
 
 	@syntax {
 
+		@subid 536
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strb_A88208.d b/plugins/arm/v7/opdefs/strb_A88208.d
index 45076f4..64ce4d0 100644
--- a/plugins/arm/v7/opdefs/strb_A88208.d
+++ b/plugins/arm/v7/opdefs/strb_A88208.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 537
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 538
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 539
+
 		@assert {
 
 			P == 1
@@ -109,6 +115,8 @@
 
 	@syntax {
 
+		@subid 540
+
 		@assert {
 
 			P == 1
@@ -138,6 +146,8 @@
 
 	@syntax {
 
+		@subid 541
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strbt_A88209.d b/plugins/arm/v7/opdefs/strbt_A88209.d
index 96845d7..8608763 100644
--- a/plugins/arm/v7/opdefs/strbt_A88209.d
+++ b/plugins/arm/v7/opdefs/strbt_A88209.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 542
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 543
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 544
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/strd_A88210.d b/plugins/arm/v7/opdefs/strd_A88210.d
index ec69c7c..feb36a7 100644
--- a/plugins/arm/v7/opdefs/strd_A88210.d
+++ b/plugins/arm/v7/opdefs/strd_A88210.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 545
+
 		@assert {
 
 			P == 1
@@ -60,6 +62,8 @@
 
 	@syntax {
 
+		@subid 546
+
 		@assert {
 
 			P == 1
@@ -83,6 +87,8 @@
 
 	@syntax {
 
+		@subid 547
+
 		@assert {
 
 			P == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 548
+
 		@assert {
 
 			P == 1
@@ -141,6 +149,8 @@
 
 	@syntax {
 
+		@subid 549
+
 		@assert {
 
 			P == 1
@@ -170,6 +180,8 @@
 
 	@syntax {
 
+		@subid 550
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strd_A88211.d b/plugins/arm/v7/opdefs/strd_A88211.d
index 644270b..9ca5cce 100644
--- a/plugins/arm/v7/opdefs/strd_A88211.d
+++ b/plugins/arm/v7/opdefs/strd_A88211.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 551
+
 		@assert {
 
 			P == 1
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 552
+
 		@assert {
 
 			P == 1
@@ -95,6 +99,8 @@
 
 	@syntax {
 
+		@subid 553
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strex_A88212.d b/plugins/arm/v7/opdefs/strex_A88212.d
index 9558c42..1984524 100644
--- a/plugins/arm/v7/opdefs/strex_A88212.d
+++ b/plugins/arm/v7/opdefs/strex_A88212.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 554
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -59,6 +61,8 @@
 
 	@syntax {
 
+		@subid 555
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/strexb_A88213.d b/plugins/arm/v7/opdefs/strexb_A88213.d
index 507fd54..309fdf2 100644
--- a/plugins/arm/v7/opdefs/strexb_A88213.d
+++ b/plugins/arm/v7/opdefs/strexb_A88213.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 556
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 557
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/strexd_A88214.d b/plugins/arm/v7/opdefs/strexd_A88214.d
index 9c21475..7223d8c 100644
--- a/plugins/arm/v7/opdefs/strexd_A88214.d
+++ b/plugins/arm/v7/opdefs/strexd_A88214.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 558
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -59,6 +61,8 @@
 
 	@syntax {
 
+		@subid 559
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/strexh_A88215.d b/plugins/arm/v7/opdefs/strexh_A88215.d
index 68f3d85..d999c68 100644
--- a/plugins/arm/v7/opdefs/strexh_A88215.d
+++ b/plugins/arm/v7/opdefs/strexh_A88215.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 560
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 561
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/strh_A88216.d b/plugins/arm/v7/opdefs/strh_A88216.d
index 49b505e..8e54122 100644
--- a/plugins/arm/v7/opdefs/strh_A88216.d
+++ b/plugins/arm/v7/opdefs/strh_A88216.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 562
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 563
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -79,6 +83,8 @@
 
 	@syntax {
 
+		@subid 564
+
 		@assert {
 
 			P == 1
@@ -101,6 +107,8 @@
 
 	@syntax {
 
+		@subid 565
+
 		@assert {
 
 			P == 1
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 566
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strh_A88217.d b/plugins/arm/v7/opdefs/strh_A88217.d
index 8a74c59..ed44ec0 100644
--- a/plugins/arm/v7/opdefs/strh_A88217.d
+++ b/plugins/arm/v7/opdefs/strh_A88217.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 567
+
 		@assert {
 
 			P == 1
@@ -65,6 +67,8 @@
 
 	@syntax {
 
+		@subid 568
+
 		@assert {
 
 			P == 1
@@ -93,6 +97,8 @@
 
 	@syntax {
 
+		@subid 569
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strh_A88218.d b/plugins/arm/v7/opdefs/strh_A88218.d
index 2656024..ae46b75 100644
--- a/plugins/arm/v7/opdefs/strh_A88218.d
+++ b/plugins/arm/v7/opdefs/strh_A88218.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 570
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 571
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -80,6 +84,8 @@
 
 	@syntax {
 
+		@subid 572
+
 		@assert {
 
 			P == 1
@@ -108,6 +114,8 @@
 
 	@syntax {
 
+		@subid 573
+
 		@assert {
 
 			P == 1
@@ -136,6 +144,8 @@
 
 	@syntax {
 
+		@subid 574
+
 		@assert {
 
 			P == 0
diff --git a/plugins/arm/v7/opdefs/strht_A88219.d b/plugins/arm/v7/opdefs/strht_A88219.d
index 1b8af03..a750b63 100644
--- a/plugins/arm/v7/opdefs/strht_A88219.d
+++ b/plugins/arm/v7/opdefs/strht_A88219.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 575
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 576
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 577
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/strt_A88220.d b/plugins/arm/v7/opdefs/strt_A88220.d
index 749dad4..cc113b3 100644
--- a/plugins/arm/v7/opdefs/strt_A88220.d
+++ b/plugins/arm/v7/opdefs/strt_A88220.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 578
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 579
+
 		@conv {
 
 			reg_T = Register(Rt)
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 580
+
 		@conv {
 
 			reg_T = Register(Rt)
diff --git a/plugins/arm/v7/opdefs/sub_A88221.d b/plugins/arm/v7/opdefs/sub_A88221.d
index 2bfb767..71eb2fe 100644
--- a/plugins/arm/v7/opdefs/sub_A88221.d
+++ b/plugins/arm/v7/opdefs/sub_A88221.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 581
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 582
+
 		@conv {
 
 			reg_D = Register(Rdn)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 583
+
 		@assert {
 
 			S == 0
@@ -97,6 +103,8 @@
 
 	@syntax {
 
+		@subid 584
+
 		@assert {
 
 			S == 1
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 585
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sub_A88222.d b/plugins/arm/v7/opdefs/sub_A88222.d
index af4a29f..9dcc50b 100644
--- a/plugins/arm/v7/opdefs/sub_A88222.d
+++ b/plugins/arm/v7/opdefs/sub_A88222.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 586
+
 		@assert {
 
 			S == 0
@@ -63,6 +65,8 @@
 
 	@syntax {
 
+		@subid 587
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sub_A88223.d b/plugins/arm/v7/opdefs/sub_A88223.d
index a3b263a..b993951 100644
--- a/plugins/arm/v7/opdefs/sub_A88223.d
+++ b/plugins/arm/v7/opdefs/sub_A88223.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 588
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 589
+
 		@assert {
 
 			S == 0
@@ -78,6 +82,8 @@
 
 	@syntax {
 
+		@subid 590
+
 		@assert {
 
 			S == 1
@@ -105,6 +111,8 @@
 
 	@syntax {
 
+		@subid 591
+
 		@assert {
 
 			S == 0
@@ -132,6 +140,8 @@
 
 	@syntax {
 
+		@subid 592
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sub_A88224.d b/plugins/arm/v7/opdefs/sub_A88224.d
index 3e8c5be..817d1a4 100644
--- a/plugins/arm/v7/opdefs/sub_A88224.d
+++ b/plugins/arm/v7/opdefs/sub_A88224.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 593
+
 		@assert {
 
 			S == 0
@@ -66,6 +68,8 @@
 
 	@syntax {
 
+		@subid 594
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sub_A88225.d b/plugins/arm/v7/opdefs/sub_A88225.d
index fcce934..bb44a8e 100644
--- a/plugins/arm/v7/opdefs/sub_A88225.d
+++ b/plugins/arm/v7/opdefs/sub_A88225.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 595
+
 		@conv {
 
 			reg_D = Register(13)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 596
+
 		@assert {
 
 			S == 0
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 597
+
 		@assert {
 
 			S == 1
@@ -103,6 +109,8 @@
 
 	@syntax {
 
+		@subid 598
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -123,6 +131,8 @@
 
 	@syntax {
 
+		@subid 599
+
 		@assert {
 
 			S == 0
@@ -149,6 +159,8 @@
 
 	@syntax {
 
+		@subid 600
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/sub_A88226.d b/plugins/arm/v7/opdefs/sub_A88226.d
index 0ab17c4..d4e4eff 100644
--- a/plugins/arm/v7/opdefs/sub_A88226.d
+++ b/plugins/arm/v7/opdefs/sub_A88226.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 601
+
 		@assert {
 
 			S == 0
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 602
+
 		@assert {
 
 			S == 1
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 603
+
 		@assert {
 
 			S == 0
@@ -112,6 +118,8 @@
 
 	@syntax {
 
+		@subid 604
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/svc_A88228.d b/plugins/arm/v7/opdefs/svc_A88228.d
index 5130b7f..4df804f 100644
--- a/plugins/arm/v7/opdefs/svc_A88228.d
+++ b/plugins/arm/v7/opdefs/svc_A88228.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 605
+
 		@conv {
 
 			imm32 = ZeroExtend(imm8, 32)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 606
+
 		@conv {
 
 			imm32 = ZeroExtend(imm24, 32)
diff --git a/plugins/arm/v7/opdefs/swp_A88229.d b/plugins/arm/v7/opdefs/swp_A88229.d
index 187bb3d..cae58ca 100644
--- a/plugins/arm/v7/opdefs/swp_A88229.d
+++ b/plugins/arm/v7/opdefs/swp_A88229.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 607
+
 		@assert {
 
 			B == 0
@@ -64,6 +66,8 @@
 
 	@syntax {
 
+		@subid 608
+
 		@assert {
 
 			B == 1
diff --git a/plugins/arm/v7/opdefs/sxtab16_A88231.d b/plugins/arm/v7/opdefs/sxtab16_A88231.d
index a608cf8..a690a1e 100644
--- a/plugins/arm/v7/opdefs/sxtab16_A88231.d
+++ b/plugins/arm/v7/opdefs/sxtab16_A88231.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 611
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 612
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sxtab_A88230.d b/plugins/arm/v7/opdefs/sxtab_A88230.d
index 945b224..b897af5 100644
--- a/plugins/arm/v7/opdefs/sxtab_A88230.d
+++ b/plugins/arm/v7/opdefs/sxtab_A88230.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 609
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 610
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sxtah_A88232.d b/plugins/arm/v7/opdefs/sxtah_A88232.d
index b832844..b3b77d0 100644
--- a/plugins/arm/v7/opdefs/sxtah_A88232.d
+++ b/plugins/arm/v7/opdefs/sxtah_A88232.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 613
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 614
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sxtb16_A88234.d b/plugins/arm/v7/opdefs/sxtb16_A88234.d
index 2946915..a1aa0dd 100644
--- a/plugins/arm/v7/opdefs/sxtb16_A88234.d
+++ b/plugins/arm/v7/opdefs/sxtb16_A88234.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 618
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 619
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sxtb_A88233.d b/plugins/arm/v7/opdefs/sxtb_A88233.d
index ccfcfd1..fb07b8a 100644
--- a/plugins/arm/v7/opdefs/sxtb_A88233.d
+++ b/plugins/arm/v7/opdefs/sxtb_A88233.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 615
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 616
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 617
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/sxth_A88235.d b/plugins/arm/v7/opdefs/sxth_A88235.d
index 9063a9e..a5e4b59 100644
--- a/plugins/arm/v7/opdefs/sxth_A88235.d
+++ b/plugins/arm/v7/opdefs/sxth_A88235.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 620
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 621
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 622
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/teq_A88237.d b/plugins/arm/v7/opdefs/teq_A88237.d
index ea7f122..f729083 100644
--- a/plugins/arm/v7/opdefs/teq_A88237.d
+++ b/plugins/arm/v7/opdefs/teq_A88237.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 623
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 624
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/teq_A88238.d b/plugins/arm/v7/opdefs/teq_A88238.d
index 6133506..4710ad7 100644
--- a/plugins/arm/v7/opdefs/teq_A88238.d
+++ b/plugins/arm/v7/opdefs/teq_A88238.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 625
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 626
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/teq_A88239.d b/plugins/arm/v7/opdefs/teq_A88239.d
index 33d54c6..ea2cd68 100644
--- a/plugins/arm/v7/opdefs/teq_A88239.d
+++ b/plugins/arm/v7/opdefs/teq_A88239.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 627
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/tst_A88240.d b/plugins/arm/v7/opdefs/tst_A88240.d
index 119d53a..c390262 100644
--- a/plugins/arm/v7/opdefs/tst_A88240.d
+++ b/plugins/arm/v7/opdefs/tst_A88240.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 628
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 629
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/tst_A88241.d b/plugins/arm/v7/opdefs/tst_A88241.d
index b6c1e71..e65fea9 100644
--- a/plugins/arm/v7/opdefs/tst_A88241.d
+++ b/plugins/arm/v7/opdefs/tst_A88241.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 630
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -56,6 +58,8 @@
 
 	@syntax {
 
+		@subid 631
+
 		@conv {
 
 			reg_N = Register(Rn)
@@ -76,6 +80,8 @@
 
 	@syntax {
 
+		@subid 632
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/tst_A88242.d b/plugins/arm/v7/opdefs/tst_A88242.d
index 3ebf379..279c92e 100644
--- a/plugins/arm/v7/opdefs/tst_A88242.d
+++ b/plugins/arm/v7/opdefs/tst_A88242.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 633
+
 		@conv {
 
 			reg_N = Register(Rn)
diff --git a/plugins/arm/v7/opdefs/uadd16_A88243.d b/plugins/arm/v7/opdefs/uadd16_A88243.d
index 9697c9a..d99ee90 100644
--- a/plugins/arm/v7/opdefs/uadd16_A88243.d
+++ b/plugins/arm/v7/opdefs/uadd16_A88243.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 634
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 635
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uadd8_A88244.d b/plugins/arm/v7/opdefs/uadd8_A88244.d
index f9080dc..799c831 100644
--- a/plugins/arm/v7/opdefs/uadd8_A88244.d
+++ b/plugins/arm/v7/opdefs/uadd8_A88244.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 636
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 637
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uasx_A88245.d b/plugins/arm/v7/opdefs/uasx_A88245.d
index 5c2b682..14ca465 100644
--- a/plugins/arm/v7/opdefs/uasx_A88245.d
+++ b/plugins/arm/v7/opdefs/uasx_A88245.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 638
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 639
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/ubfx_A88246.d b/plugins/arm/v7/opdefs/ubfx_A88246.d
index 2107f5c..732f594 100644
--- a/plugins/arm/v7/opdefs/ubfx_A88246.d
+++ b/plugins/arm/v7/opdefs/ubfx_A88246.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 640
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -59,6 +61,8 @@
 
 	@syntax {
 
+		@subid 641
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/udf_A88247.d b/plugins/arm/v7/opdefs/udf_A88247.d
index 82e04f8..db26083 100644
--- a/plugins/arm/v7/opdefs/udf_A88247.d
+++ b/plugins/arm/v7/opdefs/udf_A88247.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 642
+
 		@conv {
 
 			imm32 = ZeroExtend(imm8, 32)
@@ -55,6 +57,8 @@
 
 	@syntax {
 
+		@subid 643
+
 		@conv {
 
 			imm32 = ZeroExtend(imm4:imm12, 32)
@@ -73,6 +77,8 @@
 
 	@syntax {
 
+		@subid 644
+
 		@conv {
 
 			imm32 = ZeroExtend(imm12:imm4, 32)
diff --git a/plugins/arm/v7/opdefs/udiv_A88248.d b/plugins/arm/v7/opdefs/udiv_A88248.d
index c5684ae..4504985 100644
--- a/plugins/arm/v7/opdefs/udiv_A88248.d
+++ b/plugins/arm/v7/opdefs/udiv_A88248.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 645
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 646
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uhadd16_A88249.d b/plugins/arm/v7/opdefs/uhadd16_A88249.d
index b67ac38..65f7bd8 100644
--- a/plugins/arm/v7/opdefs/uhadd16_A88249.d
+++ b/plugins/arm/v7/opdefs/uhadd16_A88249.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 647
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 648
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uhadd8_A88250.d b/plugins/arm/v7/opdefs/uhadd8_A88250.d
index 63e34a4..0964304 100644
--- a/plugins/arm/v7/opdefs/uhadd8_A88250.d
+++ b/plugins/arm/v7/opdefs/uhadd8_A88250.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 649
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 650
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uhasx_A88251.d b/plugins/arm/v7/opdefs/uhasx_A88251.d
index 2d209f9..2a624bc 100644
--- a/plugins/arm/v7/opdefs/uhasx_A88251.d
+++ b/plugins/arm/v7/opdefs/uhasx_A88251.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 651
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 652
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uhsax_A88252.d b/plugins/arm/v7/opdefs/uhsax_A88252.d
index 36bb86b..a90963e 100644
--- a/plugins/arm/v7/opdefs/uhsax_A88252.d
+++ b/plugins/arm/v7/opdefs/uhsax_A88252.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 653
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 654
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uhsub16_A88253.d b/plugins/arm/v7/opdefs/uhsub16_A88253.d
index 5a071e2..3dd4316 100644
--- a/plugins/arm/v7/opdefs/uhsub16_A88253.d
+++ b/plugins/arm/v7/opdefs/uhsub16_A88253.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 655
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 656
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uhsub8_A88254.d b/plugins/arm/v7/opdefs/uhsub8_A88254.d
index d323ae5..a47622b 100644
--- a/plugins/arm/v7/opdefs/uhsub8_A88254.d
+++ b/plugins/arm/v7/opdefs/uhsub8_A88254.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 657
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 658
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/umaal_A88255.d b/plugins/arm/v7/opdefs/umaal_A88255.d
index 4cbc624..21cd572 100644
--- a/plugins/arm/v7/opdefs/umaal_A88255.d
+++ b/plugins/arm/v7/opdefs/umaal_A88255.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 659
+
 		@conv {
 
 			reg_DLO = Register(RdLo)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 660
+
 		@conv {
 
 			reg_DLO = Register(RdLo)
diff --git a/plugins/arm/v7/opdefs/umlal_A88256.d b/plugins/arm/v7/opdefs/umlal_A88256.d
index 345c321..5b3c98d 100644
--- a/plugins/arm/v7/opdefs/umlal_A88256.d
+++ b/plugins/arm/v7/opdefs/umlal_A88256.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 661
+
 		@conv {
 
 			reg_DLO = Register(RdLo)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 662
+
 		@assert {
 
 			S == 0
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 663
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/umull_A88257.d b/plugins/arm/v7/opdefs/umull_A88257.d
index d3c7736..30bc0d2 100644
--- a/plugins/arm/v7/opdefs/umull_A88257.d
+++ b/plugins/arm/v7/opdefs/umull_A88257.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 664
+
 		@conv {
 
 			reg_DLO = Register(RdLo)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 665
+
 		@assert {
 
 			S == 0
@@ -85,6 +89,8 @@
 
 	@syntax {
 
+		@subid 666
+
 		@assert {
 
 			S == 1
diff --git a/plugins/arm/v7/opdefs/uqadd16_A88258.d b/plugins/arm/v7/opdefs/uqadd16_A88258.d
index f7ce5ed..0badd71 100644
--- a/plugins/arm/v7/opdefs/uqadd16_A88258.d
+++ b/plugins/arm/v7/opdefs/uqadd16_A88258.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 667
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 668
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uqadd8_A88259.d b/plugins/arm/v7/opdefs/uqadd8_A88259.d
index 57c910e..a91ed2a 100644
--- a/plugins/arm/v7/opdefs/uqadd8_A88259.d
+++ b/plugins/arm/v7/opdefs/uqadd8_A88259.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 669
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 670
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uqasx_A88260.d b/plugins/arm/v7/opdefs/uqasx_A88260.d
index 3b1c84f..6876ea3 100644
--- a/plugins/arm/v7/opdefs/uqasx_A88260.d
+++ b/plugins/arm/v7/opdefs/uqasx_A88260.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 671
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 672
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uqsax_A88261.d b/plugins/arm/v7/opdefs/uqsax_A88261.d
index 7ff9199..a0e6f56 100644
--- a/plugins/arm/v7/opdefs/uqsax_A88261.d
+++ b/plugins/arm/v7/opdefs/uqsax_A88261.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 673
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 674
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uqsub16_A88262.d b/plugins/arm/v7/opdefs/uqsub16_A88262.d
index 91baf9a..abbf88d 100644
--- a/plugins/arm/v7/opdefs/uqsub16_A88262.d
+++ b/plugins/arm/v7/opdefs/uqsub16_A88262.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 675
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 676
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uqsub8_A88263.d b/plugins/arm/v7/opdefs/uqsub8_A88263.d
index 5e53068..7339ed6 100644
--- a/plugins/arm/v7/opdefs/uqsub8_A88263.d
+++ b/plugins/arm/v7/opdefs/uqsub8_A88263.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 677
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 678
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/usad8_A88264.d b/plugins/arm/v7/opdefs/usad8_A88264.d
index 07cedd3..8a52d62 100644
--- a/plugins/arm/v7/opdefs/usad8_A88264.d
+++ b/plugins/arm/v7/opdefs/usad8_A88264.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 679
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 680
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/usada8_A88265.d b/plugins/arm/v7/opdefs/usada8_A88265.d
index 0a937eb..115f353 100644
--- a/plugins/arm/v7/opdefs/usada8_A88265.d
+++ b/plugins/arm/v7/opdefs/usada8_A88265.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 681
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 682
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/usat16_A88267.d b/plugins/arm/v7/opdefs/usat16_A88267.d
index 578090a..e67b940 100644
--- a/plugins/arm/v7/opdefs/usat16_A88267.d
+++ b/plugins/arm/v7/opdefs/usat16_A88267.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 685
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 686
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/usat_A88266.d b/plugins/arm/v7/opdefs/usat_A88266.d
index 88e5be3..d7bbd9f 100644
--- a/plugins/arm/v7/opdefs/usat_A88266.d
+++ b/plugins/arm/v7/opdefs/usat_A88266.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 683
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 684
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/usax_A88268.d b/plugins/arm/v7/opdefs/usax_A88268.d
index 4ff0cc2..009122e 100644
--- a/plugins/arm/v7/opdefs/usax_A88268.d
+++ b/plugins/arm/v7/opdefs/usax_A88268.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 687
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 688
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/usub16_A88269.d b/plugins/arm/v7/opdefs/usub16_A88269.d
index 2189fa3..0bdc84c 100644
--- a/plugins/arm/v7/opdefs/usub16_A88269.d
+++ b/plugins/arm/v7/opdefs/usub16_A88269.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 689
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 690
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/usub8_A88270.d b/plugins/arm/v7/opdefs/usub8_A88270.d
index 6fc555d..d102cf1 100644
--- a/plugins/arm/v7/opdefs/usub8_A88270.d
+++ b/plugins/arm/v7/opdefs/usub8_A88270.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 691
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 692
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uxtab16_A88272.d b/plugins/arm/v7/opdefs/uxtab16_A88272.d
index b9b430d..1a996c4 100644
--- a/plugins/arm/v7/opdefs/uxtab16_A88272.d
+++ b/plugins/arm/v7/opdefs/uxtab16_A88272.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 695
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 696
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uxtab_A88271.d b/plugins/arm/v7/opdefs/uxtab_A88271.d
index 0490b28..33001b0 100644
--- a/plugins/arm/v7/opdefs/uxtab_A88271.d
+++ b/plugins/arm/v7/opdefs/uxtab_A88271.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 693
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 694
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uxtah_A88273.d b/plugins/arm/v7/opdefs/uxtah_A88273.d
index 5855519..8411da9 100644
--- a/plugins/arm/v7/opdefs/uxtah_A88273.d
+++ b/plugins/arm/v7/opdefs/uxtah_A88273.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 697
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -58,6 +60,8 @@
 
 	@syntax {
 
+		@subid 698
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uxtb16_A88275.d b/plugins/arm/v7/opdefs/uxtb16_A88275.d
index 7f696ac..5efa180 100644
--- a/plugins/arm/v7/opdefs/uxtb16_A88275.d
+++ b/plugins/arm/v7/opdefs/uxtb16_A88275.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 702
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 703
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uxtb_A88274.d b/plugins/arm/v7/opdefs/uxtb_A88274.d
index 18994f7..36bba8a 100644
--- a/plugins/arm/v7/opdefs/uxtb_A88274.d
+++ b/plugins/arm/v7/opdefs/uxtb_A88274.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 699
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 700
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 701
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/uxth_A88276.d b/plugins/arm/v7/opdefs/uxth_A88276.d
index 4017a26..82b9fa0 100644
--- a/plugins/arm/v7/opdefs/uxth_A88276.d
+++ b/plugins/arm/v7/opdefs/uxth_A88276.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 704
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -57,6 +59,8 @@
 
 	@syntax {
 
+		@subid 705
+
 		@conv {
 
 			reg_D = Register(Rd)
@@ -77,6 +81,8 @@
 
 	@syntax {
 
+		@subid 706
+
 		@conv {
 
 			reg_D = Register(Rd)
diff --git a/plugins/arm/v7/opdefs/wfe_A88424.d b/plugins/arm/v7/opdefs/wfe_A88424.d
index 27c9386..0ef7b43 100644
--- a/plugins/arm/v7/opdefs/wfe_A88424.d
+++ b/plugins/arm/v7/opdefs/wfe_A88424.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 707
+
 		@asm wfe
 
 	}
@@ -49,6 +51,8 @@
 
 	@syntax {
 
+		@subid 708
+
 		@asm wfe.w
 
 	}
@@ -61,6 +65,8 @@
 
 	@syntax {
 
+		@subid 709
+
 		@asm wfe
 
 		@rules {
diff --git a/plugins/arm/v7/opdefs/wfi_A88425.d b/plugins/arm/v7/opdefs/wfi_A88425.d
index 0f73c23..21553e1 100644
--- a/plugins/arm/v7/opdefs/wfi_A88425.d
+++ b/plugins/arm/v7/opdefs/wfi_A88425.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 710
+
 		@asm wfi
 
 	}
@@ -49,6 +51,8 @@
 
 	@syntax {
 
+		@subid 711
+
 		@asm wfi.w
 
 	}
@@ -61,6 +65,8 @@
 
 	@syntax {
 
+		@subid 712
+
 		@asm wfi
 
 		@rules {
diff --git a/plugins/arm/v7/opdefs/yield_A88426.d b/plugins/arm/v7/opdefs/yield_A88426.d
index 5d594c2..7e67636 100644
--- a/plugins/arm/v7/opdefs/yield_A88426.d
+++ b/plugins/arm/v7/opdefs/yield_A88426.d
@@ -37,6 +37,8 @@
 
 	@syntax {
 
+		@subid 713
+
 		@asm yield
 
 	}
@@ -49,6 +51,8 @@
 
 	@syntax {
 
+		@subid 714
+
 		@asm yield.w
 
 	}
@@ -61,6 +65,8 @@
 
 	@syntax {
 
+		@subid 715
+
 		@asm yield
 
 		@rules {