diff options
author | Cyrille Bagard <nocbos@gmail.com> | 2014-12-09 23:07:29 (GMT) |
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committer | Cyrille Bagard <nocbos@gmail.com> | 2014-12-09 23:07:29 (GMT) |
commit | 224a2ef04e37cd180a58ede3469fddc59e39bc13 (patch) | |
tree | 9b61b706f525304e919e9fa8b1fcb78392746acd /src/arch/arm/v7/opdefs/strb_A88206.d | |
parent | 096f123b87437cf25cd008a6dea710286fbefcf0 (diff) |
Supported new ARMv7 instructions.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@438 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/arm/v7/opdefs/strb_A88206.d')
-rw-r--r-- | src/arch/arm/v7/opdefs/strb_A88206.d | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/src/arch/arm/v7/opdefs/strb_A88206.d b/src/arch/arm/v7/opdefs/strb_A88206.d new file mode 100644 index 0000000..4799f61 --- /dev/null +++ b/src/arch/arm/v7/opdefs/strb_A88206.d @@ -0,0 +1,116 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * ##FILE## - traduction d'instructions ARMv7 + * + * Copyright (C) 2014 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * Chrysalide is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * Chrysalide is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +@title STRB (immediate, Thumb) + +@encoding(t1) { + + @half 0 1 1 1 0 imm5(5) Rn(3) Rt(3) + + @syntax <Rgt>, <access> + + @conv { + + Rgt = Register(Rt) + Rgn = Register(Rn) + imm32 = ZeroExtend(imm5, 5, 32) + access = MakeMemoryAccess(Rgn, imm32, 1, 0) + + } + +} + +@encoding(T2) { + + @word 1 1 1 1 1 0 0 0 1 0 0 0 Rn(4) Rt(4) imm12(12) + + @syntax "strb.W" <Rgt>, <access> + + @conv { + + Rgt = Register(Rt) + Rgn = Register(Rn) + imm32 = ZeroExtend(imm12, 12, 32) + access = MakeMemoryAccess(Rgn, imm32, 1, 0) + + } + + @rules { + + //if Rn == '1111' then UNDEFINED; + //if t IN {13,15} then UNPREDICTABLE; + + } + +} + +@encoding(T31) { + + @word 1 1 1 1 1 0 0 0 0 0 0 0 Rn(4) Rt(4) 1 1 U(1) W(1) imm8(8) + + @syntax <Rgt> <access> + + @conv { + + Rgt = Register(Rt) + Rgn = Register(Rn) + imm32 = ZeroExtend(imm8, 8, 32); + access = MakeMemoryAccess(Rgn, imm32, U, W) + + } + + @rules { + + //if P == '1' && U == '1' && W == '0' then SEE STRBT; + //if Rn == '1111' || (P == '0' && W == '0') then UNDEFINED; + //if t IN {13,15} || (wback && n == t) then UNPREDICTABLE; + + } + +} + +@encoding(T32) { + + @word 1 1 1 1 1 0 0 0 0 0 0 0 Rn(4) Rt(4) 1 0 U(1) W(1) imm8(8) + + @syntax <Rgt> <base> <offset> + + @conv { + + Rgt = Register(Rt) + Rgn = Register(Rn) + imm32 = ZeroExtend(imm8, 8, 32); + base = MakeMemoryNotIndexed(Rgn, W) + offset = MakeAccessOffset(U, imm32) + + } + + @rules { + + //if P == '1' && U == '1' && W == '0' then SEE STRBT; + //if Rn == '1111' || (P == '0' && W == '0') then UNDEFINED; + //if t IN {13,15} || (wback && n == t) then UNPREDICTABLE; + + } + +} |