Implemented a new category of instructions from Thumb32.

git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@522 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a

3 files changed, 258 insertions, 0 deletions

diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index b897f1d..6678f0e 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -54,6 +54,7 @@ ARMV7_DEFS = 							\
 	ldr_A8864.d							\
 	ldr_A8865.d							\
 	ldrb_A8867.d						\
+	ldrb_A8870.d						\
 	lsl_A8894.d							\
 	mla_A88100.d						\
 	mls_A88101.d						\
@@ -81,6 +82,7 @@ ARMV7_DEFS = 							\
 	str_A88203.d						\
 	str_A88204.d						\
 	strb_A88206.d						\
+	strb_A88208.d						\
 	sub_A88221.d						\
 	sub_A88222.d						\
 	sub_A88223.d						\
diff --git a/src/arch/arm/v7/opdefs/ldrb_A8870.d b/src/arch/arm/v7/opdefs/ldrb_A8870.d
new file mode 100644
index 0000000..0de0af2
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/ldrb_A8870.d
@@ -0,0 +1,129 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title LDRB (register)
+
+@encoding(t1) {
+
+    @half 0 1 0 1 0 1 0 Rm(3) Rn(3) Rt(3)
+
+    @syntax <Rgt> <access>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        access = _MakeMemoryAccess(Rgn, Rgm, 0)
+
+    }
+
+    @rules {
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 1 1 0 0 0 0 0 0 1 Rn(4) Rt(4) 0 0 0 0 0 0 imm2(2) Rm(4)
+
+    @syntax "ldrb.W" <Rgt>, <access>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        shift = DecodeImmShift(0, imm2)
+        access = MakeShiftedMemoryAccess(Rgn, Rgm, shift, 0)
+
+    }
+
+    @rules {
+
+        //if Rn == '1111' then UNDEFINED;
+        //if t IN {13,15} || m IN {13,15} then UNPREDICTABLE;
+
+        if (Rt == '1111'); chk_call DefineAsReturn(1)
+
+    }
+
+}
+
+@encoding(A11) {
+
+    @word cond(4) 0 1 1 1 U(1) 1 W(1) 1 Rn(4) Rt(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax <Rgt> <access>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+        access = MakeShiftedMemoryAccess(Rgn, Rgm, shift, W)
+
+    }
+
+    @rules {
+
+        //if P == '0' && W == '1' then SEE LDRBT;
+        //if t == 15 || m == 15 then UNPREDICTABLE;
+        //if wback && (n == 15 || n == t) then UNPREDICTABLE;
+        //if ArchVersion() < 6 && wback && m == n then UNPREDICTABLE;
+        if (Rt == '1111'); chk_call DefineAsReturn(1)
+
+    }
+
+}
+
+@encoding(A12) {
+
+    @word cond(4) 0 1 1 0 U(1) 1 W(1) 1 Rn(4) Rt(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax <Rgt> <base> <offset> <?shift>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        base = MakeMemoryNotIndexed(Rgn, 1)
+        offset = MakeAccessOffset(U, Rgm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if P == '0' && W == '1' then SEE LDRBT;
+        //if t == 15 || m == 15 then UNPREDICTABLE;
+        //if wback && (n == 15 || n == t) then UNPREDICTABLE;
+        //if ArchVersion() < 6 && wback && m == n then UNPREDICTABLE;
+        if (Rt == '1111'); chk_call DefineAsReturn(1)
+
+    }
+
+}
diff --git a/src/arch/arm/v7/opdefs/strb_A88208.d b/src/arch/arm/v7/opdefs/strb_A88208.d
new file mode 100644
index 0000000..ab6c198
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/strb_A88208.d
@@ -0,0 +1,127 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title STRB (register)
+
+@encoding(t1) {
+
+    @half 0 1 0 1 0 1 0 Rm(3) Rn(3) Rt(3)
+
+    @syntax <Rgt> <access>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        access = _MakeMemoryAccess(Rgn, Rgm, 0)
+
+    }
+
+    @rules {
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 1 1 0 0 0 0 0 0 0 Rn(4) Rt(4) 0 0 0 0 0 0 imm2(2) Rm(4)
+
+    @syntax "strb.W" <Rgt>, <access>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        shift = DecodeImmShift(0, imm2)
+        access = MakeShiftedMemoryAccess(Rgn, Rgm, shift, 0)
+
+    }
+
+    @rules {
+
+        //if Rn == '1111' then UNDEFINED;
+        //if t IN {13,15} || m IN {13,15} then UNPREDICTABLE;
+
+        if (Rt == '1111'); chk_call DefineAsReturn(1)
+
+    }
+
+}
+
+@encoding(A11) {
+
+    @word cond(4) 0 1 1 1 U(1) 1 W(1) 0 Rn(4) Rt(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax <Rgt> <access>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        shift = DecodeImmShift(type, imm5)
+        access = MakeShiftedMemoryAccess(Rgn, Rgm, shift, W)
+
+    }
+
+    @rules {
+
+        //if P == '0' && W == '1' then SEE STRT;
+        //if Rn == '1101' && P == '1' && U == '0' && W == '1' && imm12 == '000000000100' then SEE PUSH;
+        //if wback && (n == 15 || n == t) then UNPREDICTABLE;
+        if (Rt == '1111'); chk_call DefineAsReturn(1)
+
+    }
+
+}
+
+@encoding(A12) {
+
+    @word cond(4) 0 1 1 0 U(1) 1 W(1) 0 Rn(4) Rt(4) imm5(5) type(2) 0 Rm(4)
+
+    @syntax <Rgt> <base> <offset> <?shift>
+
+    @conv {
+
+        Rgt = Register(Rt)
+        Rgn = Register(Rn)
+        Rgm = Register(Rm)
+        base = MakeMemoryNotIndexed(Rgn, 1)
+        offset = MakeAccessOffset(U, Rgm)
+        shift = DecodeImmShift(type, imm5)
+
+    }
+
+    @rules {
+
+        //if P == '0' && W == '1' then SEE STRT;
+        //if Rn == '1101' && P == '1' && U == '0' && W == '1' && imm12 == '000000000100' then SEE PUSH;
+        //if wback && (n == 15 || n == t) then UNPREDICTABLE;
+        if (Rt == '1111'); chk_call DefineAsReturn(1)
+
+    }
+
+}