Shared immediate operands in order to avoid useless allocations.

2 files changed, 20 insertions, 19 deletions

diff --git a/src/arch/arm/v7/fetch.c b/src/arch/arm/v7/fetch.c
index 84319cc..11864f6 100644
--- a/src/arch/arm/v7/fetch.c
+++ b/src/arch/arm/v7/fetch.c
@@ -34,6 +34,7 @@
 #include "operands/offset.h"
 #include "../register.h"
 #include "../../raw.h"
+#include "../../sharing/container.h"
 #include "../../../format/format.h"
 
 
@@ -58,7 +59,7 @@ void help_fetching_with_instruction_b_with_orig(GArchInstruction *instr, GArchPr
 {
     const mrange_t *range;                  /* Emplacementt d'instruction  */
     virt_t pc;                              /* Position dans l'exécution   */
-    GArchOperand *op;                       /* Opérande numérique en place */
+    GImmOperand *op;                        /* Opérande numérique en place */
     int32_t offset;                         /* Décallage encodé en dur     */
     virt_t target;                          /* Adresse virtuelle visée     */
 
@@ -86,10 +87,10 @@ void help_fetching_with_instruction_b_with_orig(GArchInstruction *instr, GArchPr
 
     //pc += get_mrange_length(range);
 
-    op = g_arch_instruction_get_operand(instr, 0);
+    op = G_IMM_OPERAND(g_arch_instruction_get_operand(instr, 0));
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_SIGNED, &offset))
-        g_imm_operand_set_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, pc + offset);
+    if (g_imm_operand_get_value(op, MDS_32_BITS_SIGNED, &offset))
+        g_imm_operand_set_value(&op, MDS_32_BITS_UNSIGNED, pc + offset, G_SHARE_CONTAINER(instr));
 
     else assert(0);
 
@@ -121,7 +122,7 @@ void help_fetching_with_instruction_bl_with_orig(GArchInstruction *instr, GArchP
 {
     const mrange_t *range;                  /* Emplacementt d'instruction  */
     virt_t pc;                              /* Position dans l'exécution   */
-    GArchOperand *op;                       /* Opérande numérique en place */
+    GImmOperand *op;                        /* Opérande numérique en place */
     int32_t offset;                         /* Décallage encodé en dur     */
     virt_t target;                          /* Adresse virtuelle visée     */
 
@@ -149,10 +150,10 @@ void help_fetching_with_instruction_bl_with_orig(GArchInstruction *instr, GArchP
             break;
     }
 
-    op = g_arch_instruction_get_operand(instr, 0);
+    op = G_IMM_OPERAND(g_arch_instruction_get_operand(instr, 0));
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_SIGNED, &offset))
-        g_imm_operand_set_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, pc + offset);
+    if (g_imm_operand_get_value(op, MDS_32_BITS_SIGNED, &offset))
+        g_imm_operand_set_value(&op, MDS_32_BITS_UNSIGNED, pc + offset, G_SHARE_CONTAINER(instr));
 
     else assert(0);
 
@@ -184,7 +185,7 @@ void help_fetching_with_instruction_blx_with_dest(GArchInstruction *instr, GArch
 {
     const mrange_t *range;                  /* Emplacementt d'instruction  */
     virt_t pc;                              /* Position dans l'exécution   */
-    GArchOperand *op;                       /* Opérande numérique en place */
+    GImmOperand *op;                        /* Opérande numérique en place */
     int32_t offset;                         /* Décallage encodé en dur     */
     virt_t target;                          /* Adresse virtuelle visée     */
 
@@ -202,10 +203,10 @@ void help_fetching_with_instruction_blx_with_dest(GArchInstruction *instr, GArch
     pc += 4;
     pc -= pc % 4;
 
-    op = g_arch_instruction_get_operand(instr, 0);
+    op = G_IMM_OPERAND(g_arch_instruction_get_operand(instr, 0));
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_SIGNED, &offset))
-        g_imm_operand_set_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, pc + offset);
+    if (g_imm_operand_get_value(op, MDS_32_BITS_SIGNED, &offset))
+        g_imm_operand_set_value(&op, MDS_32_BITS_UNSIGNED, pc + offset, G_SHARE_CONTAINER(instr));
 
     else assert(0);
 
@@ -307,7 +308,7 @@ void help_fetching_with_instruction_cb_n_z(GArchInstruction *instr, GArchProcess
 {
     const mrange_t *range;                  /* Emplacementt d'instruction  */
     virt_t pc;                              /* Position dans l'exécution   */
-    GArchOperand *op;                       /* Opérande numérique en place */
+    GImmOperand *op;                        /* Opérande numérique en place */
     uint32_t offset;                        /* Décallage encodé en dur     */
     virt_t target;                          /* Adresse virtuelle visée     */
 
@@ -321,10 +322,10 @@ void help_fetching_with_instruction_cb_n_z(GArchInstruction *instr, GArchProcess
 
     pc += 4;
 
-    op = g_arch_instruction_get_operand(instr, 1);
+    op = G_IMM_OPERAND(g_arch_instruction_get_operand(instr, 1));
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &offset))
-        g_imm_operand_set_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, pc + offset);
+    if (g_imm_operand_get_value(op, MDS_32_BITS_UNSIGNED, &offset))
+        g_imm_operand_set_value(&op, MDS_32_BITS_UNSIGNED, pc + offset, G_SHARE_CONTAINER(instr));
 
     else assert(0);
 
@@ -486,7 +487,7 @@ void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *inst
 
 
 
-    //g_imm_operand_set_value(G_IMM_OPERAND(sub_op), MDS_32_BITS_UNSIGNED, target);
+    //g_imm_operand_set_value(G_IMM_OPERAND(sub_op), MDS_32_BITS_UNSIGNED, target, G_SHARE_CONTAINER(instr));
 
 
     /// FIXME ?!
@@ -496,7 +497,7 @@ void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *inst
 
 
     new = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, target);
-    _g_arch_instruction_replace_operand(instr, new, op);
+    _g_arch_instruction_replace_operand(instr, op, new);
 
     g_arch_instruction_unlock_operands(instr);
 
diff --git a/src/arch/arm/v7/post.c b/src/arch/arm/v7/post.c
index 6c63832..cfdc3be 100644
--- a/src/arch/arm/v7/post.c
+++ b/src/arch/arm/v7/post.c
@@ -93,7 +93,7 @@ void post_process_ldr_instructions(GArchInstruction *instr, GArchProcessor *proc
 
         }
 
-        _g_arch_instruction_replace_operand(instr, new, op);
+        _g_arch_instruction_replace_operand(instr, op, new);
 
     }