diff options
| author | Cyrille Bagard <nocbos@gmail.com> | 2014-12-01 22:57:10 (GMT) |
|---|---|---|
| committer | Cyrille Bagard <nocbos@gmail.com> | 2014-12-01 22:57:10 (GMT) |
| commit | 5b5b36dc862a3c7bcfa3e0db74efcf2806988706 (patch) | |
| tree | 0c631ee484f2325ad182a5e527f1a6508ddf2d9a /src/arch/arm/v7 | |
| parent | 97d1cc10210cf4ec237e1d9a8b23b120ddef47c5 (diff) | |
Recognized Thumb 16 instructions and most of the Thumb 32 ones.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@430 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/arm/v7')
| -rw-r--r-- | src/arch/arm/v7/Makefile.am | 4 | ||||
| -rw-r--r-- | src/arch/arm/v7/arm.h | 2 | ||||
| -rwxr-xr-x | src/arch/arm/v7/build_tmp_decl.sh | 35 | ||||
| -rw-r--r-- | src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h | 73 | ||||
| -rw-r--r-- | src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h | 179 | ||||
| -rw-r--r-- | src/arch/arm/v7/thumb_16.c | 670 | ||||
| -rw-r--r-- | src/arch/arm/v7/thumb_16.h | 37 | ||||
| -rw-r--r-- | src/arch/arm/v7/thumb_32.c | 1670 | ||||
| -rw-r--r-- | src/arch/arm/v7/thumb_32.h | 37 |
9 files changed, 2704 insertions, 3 deletions
diff --git a/src/arch/arm/v7/Makefile.am b/src/arch/arm/v7/Makefile.am index f9e804a..0bb88aa 100644 --- a/src/arch/arm/v7/Makefile.am +++ b/src/arch/arm/v7/Makefile.am @@ -7,7 +7,9 @@ libarcharmv7_la_SOURCES = \ instruction.h instruction.c \ processor.h processor.c \ pseudo.h pseudo.c \ - register.h register.c + register.h register.c \ + thumb_16.h thumb_16.c \ + thumb_32.h thumb_32.c libarcharmv7_la_LIBADD = \ opcodes/libarcharmv7opcodes.la \ diff --git a/src/arch/arm/v7/arm.h b/src/arch/arm/v7/arm.h index b9c2fe4..3b6aa3d 100644 --- a/src/arch/arm/v7/arm.h +++ b/src/arch/arm/v7/arm.h @@ -25,8 +25,6 @@ #define _ARCH_ARM_V7_ARM_H -#include "processor.h" -#include "../context.h" #include "../../instruction.h" diff --git a/src/arch/arm/v7/build_tmp_decl.sh b/src/arch/arm/v7/build_tmp_decl.sh new file mode 100755 index 0000000..1236e81 --- /dev/null +++ b/src/arch/arm/v7/build_tmp_decl.sh @@ -0,0 +1,35 @@ +#!/bin/sh + + +arch=$1 +header="opcodes/opcodes_$arch.h" +headertmp="opcodes/opcodes_tmp_$arch.h" + +echo "#ifndef ${arch}_def_tmp_h" > $headertmp +echo "#define ${arch}_def_tmp_h" >> $headertmp + +target=armv7_read_${arch}_instr + +needed=`grep $target $arch.c | sed "s/.*\(${target}_[^(]*\).*/\1/" | sort | uniq` + +for n in $needed; do + + echo " $n..." + + grep -q $n $header + if [ $? -ne 0 ]; then + + echo "#define $n(r) NULL" >> $headertmp + + else + + echo "$n foudn in $header" + + fi + +done + +echo "#endif" >> $headertmp + + + diff --git a/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h new file mode 100644 index 0000000..402e083 --- /dev/null +++ b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_16.h @@ -0,0 +1,73 @@ +#ifndef thumb_16_def_tmp_h +#define thumb_16_def_tmp_h +#define armv7_read_thumb_16_instr_adc_register(r) NULL +#define armv7_read_thumb_16_instr_add_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_add_register_thumb(r) NULL +#define armv7_read_thumb_16_instr_add_sp_plus_immediate(r) NULL +#define armv7_read_thumb_16_instr_adr(r) NULL +#define armv7_read_thumb_16_instr_and_register(r) NULL +#define armv7_read_thumb_16_instr_asr_immediate(r) NULL +#define armv7_read_thumb_16_instr_asr_register(r) NULL +#define armv7_read_thumb_16_instr_b(r) NULL +#define armv7_read_thumb_16_instr_bic_register(r) NULL +#define armv7_read_thumb_16_instr_bkpt(r) NULL +#define armv7_read_thumb_16_instr_blx_register(r) NULL +#define armv7_read_thumb_16_instr_bx(r) NULL +#define armv7_read_thumb_16_instr_cbnz_cbz(r) NULL +#define armv7_read_thumb_16_instr_cmn_register(r) NULL +#define armv7_read_thumb_16_instr_cmp_immediate(r) NULL +#define armv7_read_thumb_16_instr_cmp_register(r) NULL +#define armv7_read_thumb_16_instr_cps_thumb(r) NULL +#define armv7_read_thumb_16_instr_eor_register(r) NULL +#define armv7_read_thumb_16_instr_it(r) NULL +#define armv7_read_thumb_16_instr_ldm_ldmia_ldmfd_thumb(r) NULL +#define armv7_read_thumb_16_instr_ldrb_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_ldrb_register(r) NULL +#define armv7_read_thumb_16_instr_ldrh_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_ldrh_register(r) NULL +#define armv7_read_thumb_16_instr_ldr_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_ldr_literal(r) NULL +#define armv7_read_thumb_16_instr_ldr_register_thumb(r) NULL +#define armv7_read_thumb_16_instr_ldrsb_register(r) NULL +#define armv7_read_thumb_16_instr_ldrsh_register(r) NULL +#define armv7_read_thumb_16_instr_lsl_immediate(r) NULL +#define armv7_read_thumb_16_instr_lsl_register(r) NULL +#define armv7_read_thumb_16_instr_lsr_immediate(r) NULL +#define armv7_read_thumb_16_instr_lsr_register(r) NULL +#define armv7_read_thumb_16_instr_mov_immediate(r) NULL +#define armv7_read_thumb_16_instr_mov_register_thumb(r) NULL +#define armv7_read_thumb_16_instr_mul(r) NULL +#define armv7_read_thumb_16_instr_mvn_register(r) NULL +#define armv7_read_thumb_16_instr_nop(r) NULL +#define armv7_read_thumb_16_instr_orr_register(r) NULL +#define armv7_read_thumb_16_instr_pop_thumb(r) NULL +#define armv7_read_thumb_16_instr_push(r) NULL +#define armv7_read_thumb_16_instr_rev(r) NULL +#define armv7_read_thumb_16_instr_rev16(r) NULL +#define armv7_read_thumb_16_instr_revsh(r) NULL +#define armv7_read_thumb_16_instr_ror_register(r) NULL +#define armv7_read_thumb_16_instr_rsb_immediate(r) NULL +#define armv7_read_thumb_16_instr_sbc_register(r) NULL +#define armv7_read_thumb_16_instr_setend(r) NULL +#define armv7_read_thumb_16_instr_sev(r) NULL +#define armv7_read_thumb_16_instr_stm_stmia_stmea(r) NULL +#define armv7_read_thumb_16_instr_strb_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_strb_register(r) NULL +#define armv7_read_thumb_16_instr_strh_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_strh_register(r) NULL +#define armv7_read_thumb_16_instr_str_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_str_register(r) NULL +#define armv7_read_thumb_16_instr_sub_immediate_thumb(r) NULL +#define armv7_read_thumb_16_instr_sub_register(r) NULL +#define armv7_read_thumb_16_instr_sub_sp_minus_immediate(r) NULL +#define armv7_read_thumb_16_instr_svc_previously_swi(r) NULL +#define armv7_read_thumb_16_instr_sxtb(r) NULL +#define armv7_read_thumb_16_instr_sxth(r) NULL +#define armv7_read_thumb_16_instr_tst_register(r) NULL +#define armv7_read_thumb_16_instr_udf(r) NULL +#define armv7_read_thumb_16_instr_uxtb(r) NULL +#define armv7_read_thumb_16_instr_uxth(r) NULL +#define armv7_read_thumb_16_instr_wfe(r) NULL +#define armv7_read_thumb_16_instr_wfi(r) NULL +#define armv7_read_thumb_16_instr_yield(r) NULL +#endif diff --git a/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h new file mode 100644 index 0000000..016b7d3 --- /dev/null +++ b/src/arch/arm/v7/opcodes/opcodes_tmp_thumb_32.h @@ -0,0 +1,179 @@ +#ifndef thumb_32_def_tmp_h +#define thumb_32_def_tmp_h +#define armv7_read_thumb_32_instr_(r) NULL +#define armv7_read_thumb_32_instr_adc_immediate(r) NULL +#define armv7_read_thumb_32_instr_adc_register(r) NULL +#define armv7_read_thumb_32_instr_add_immediate_thumb(r) NULL +#define armv7_read_thumb_32_instr_add_register_thumb(r) NULL +#define armv7_read_thumb_32_instr_adr(r) NULL +#define armv7_read_thumb_32_instr_and_immediate(r) NULL +#define armv7_read_thumb_32_instr_and_register(r) NULL +#define armv7_read_thumb_32_instr_asr_register(r) NULL +#define armv7_read_thumb_32_instr_b(r) NULL +#define armv7_read_thumb_32_instr_bfc(r) NULL +#define armv7_read_thumb_32_instr_bfi(r) NULL +#define armv7_read_thumb_32_instr_bic_immediate(r) NULL +#define armv7_read_thumb_32_instr_bic_register(r) NULL +#define armv7_read_thumb_32_instr_b_mrs(r) NULL +#define armv7_read_thumb_32_instr_b_msr_register(r) NULL +#define armv7_read_thumb_32_instr_bxj(r) NULL +#define armv7_read_thumb_32_instr_clrex(r) NULL +#define armv7_read_thumb_32_instr_clz(r) NULL +#define armv7_read_thumb_32_instr_cmn_immediate(r) NULL +#define armv7_read_thumb_32_instr_cmn_register(r) NULL +#define armv7_read_thumb_32_instr_cmp_immediate(r) NULL +#define armv7_read_thumb_32_instr_cmp_register(r) NULL +#define armv7_read_thumb_32_instr_cps_thumb(r) NULL +#define armv7_read_thumb_32_instr_dbg(r) NULL +#define armv7_read_thumb_32_instr_dmb(r) NULL +#define armv7_read_thumb_32_instr_dsb(r) NULL +#define armv7_read_thumb_32_instr_enterx_leavex(r) NULL +#define armv7_read_thumb_32_instr_eor_immediate(r) NULL +#define armv7_read_thumb_32_instr_eor_register(r) NULL +#define armv7_read_thumb_32_instr_eret(r) NULL +#define armv7_read_thumb_32_instr_hvc(r) NULL +#define armv7_read_thumb_32_instr_isb(r) NULL +#define armv7_read_thumb_32_instr_ldmdb_ldmea(r) NULL +#define armv7_read_thumb_32_instr_ldm_ldmia_ldmfd_thumb(r) NULL +#define armv7_read_thumb_32_instr_ldr_immediate_thumb(r) NULL +#define armv7_read_thumb_32_instr_ldr_literal(r) NULL +#define armv7_read_thumb_32_instr_ldr_register_thumb(r) NULL +#define armv7_read_thumb_32_instr_ldrt(r) NULL +#define armv7_read_thumb_32_instr_lsl_register(r) NULL +#define armv7_read_thumb_32_instr_lsr_register(r) NULL +#define armv7_read_thumb_32_instr_mla(r) NULL +#define armv7_read_thumb_32_instr_mls(r) NULL +#define armv7_read_thumb_32_instr_mov_immediate(r) NULL +#define armv7_read_thumb_32_instr_movt(r) NULL +#define armv7_read_thumb_32_instr_mrs(r) NULL +#define armv7_read_thumb_32_instr_mrs_banked_register(r) NULL +#define armv7_read_thumb_32_instr_msr_banked_register(r) NULL +#define armv7_read_thumb_32_instr_msr_register(r) NULL +#define armv7_read_thumb_32_instr_mul(r) NULL +#define armv7_read_thumb_32_instr_mvn_immediate(r) NULL +#define armv7_read_thumb_32_instr_mvn_register(r) NULL +#define armv7_read_thumb_32_instr_nop(r) NULL +#define armv7_read_thumb_32_instr_orn_immediate(r) NULL +#define armv7_read_thumb_32_instr_orn_register(r) NULL +#define armv7_read_thumb_32_instr_orr_immediate(r) NULL +#define armv7_read_thumb_32_instr_orr_register(r) NULL +#define armv7_read_thumb_32_instr_pkh(r) NULL +#define armv7_read_thumb_32_instr_pop_thumb(r) NULL +#define armv7_read_thumb_32_instr_push(r) NULL +#define armv7_read_thumb_32_instr_qadd(r) NULL +#define armv7_read_thumb_32_instr_qdadd(r) NULL +#define armv7_read_thumb_32_instr_qdsub(r) NULL +#define armv7_read_thumb_32_instr_qsub(r) NULL +#define armv7_read_thumb_32_instr_rbit(r) NULL +#define armv7_read_thumb_32_instr_rev(r) NULL +#define armv7_read_thumb_32_instr_rev16(r) NULL +#define armv7_read_thumb_32_instr_revsh(r) NULL +#define armv7_read_thumb_32_instr_rfe(r) NULL +#define armv7_read_thumb_32_instr_ror_register(r) NULL +#define armv7_read_thumb_32_instr_rsb_immediate(r) NULL +#define armv7_read_thumb_32_instr_rsb_register(r) NULL +#define armv7_read_thumb_32_instr_sadd16(r) NULL +#define armv7_read_thumb_32_instr_sadd8(r) NULL +#define armv7_read_thumb_32_instr_sasx(r) NULL +#define armv7_read_thumb_32_instr_sbc_immediate(r) NULL +#define armv7_read_thumb_32_instr_sbc_register(r) NULL +#define armv7_read_thumb_32_instr_sbfx(r) NULL +#define armv7_read_thumb_32_instr_sdiv(r) NULL +#define armv7_read_thumb_32_instr_sel(r) NULL +#define armv7_read_thumb_32_instr_sev(r) NULL +#define armv7_read_thumb_32_instr_shadd16(r) NULL +#define armv7_read_thumb_32_instr_shadd8(r) NULL +#define armv7_read_thumb_32_instr_shasx(r) NULL +#define armv7_read_thumb_32_instr_shsax(r) NULL +#define armv7_read_thumb_32_instr_shsub16(r) NULL +#define armv7_read_thumb_32_instr_shsub8(r) NULL +#define armv7_read_thumb_32_instr_smc_previously_smi(r) NULL +#define armv7_read_thumb_32_instr_smlabb_smlabt_smlatb_smlatt(r) NULL +#define armv7_read_thumb_32_instr_smlad(r) NULL +#define armv7_read_thumb_32_instr_smlal(r) NULL +#define armv7_read_thumb_32_instr_smlalbb_smlalbt_smlaltb_smlaltt(r) NULL +#define armv7_read_thumb_32_instr_smlald(r) NULL +#define armv7_read_thumb_32_instr_smlawb_smlawt(r) NULL +#define armv7_read_thumb_32_instr_smlsd(r) NULL +#define armv7_read_thumb_32_instr_smmla(r) NULL +#define armv7_read_thumb_32_instr_smmls(r) NULL +#define armv7_read_thumb_32_instr_smmul(r) NULL +#define armv7_read_thumb_32_instr_smuad(r) NULL +#define armv7_read_thumb_32_instr_smulbb_smulbt_smultb_smultt(r) NULL +#define armv7_read_thumb_32_instr_smull(r) NULL +#define armv7_read_thumb_32_instr_smulwb_smulwt(r) NULL +#define armv7_read_thumb_32_instr_smusd(r) NULL +#define armv7_read_thumb_32_instr_sqadd16(r) NULL +#define armv7_read_thumb_32_instr_sqadd8(r) NULL +#define armv7_read_thumb_32_instr_sqasx(r) NULL +#define armv7_read_thumb_32_instr_sqsax(r) NULL +#define armv7_read_thumb_32_instr_sqsub16(r) NULL +#define armv7_read_thumb_32_instr_sqsub8(r) NULL +#define armv7_read_thumb_32_instr_srs_thumb(r) NULL +#define armv7_read_thumb_32_instr_ssat(r) NULL +#define armv7_read_thumb_32_instr_ssat16(r) NULL +#define armv7_read_thumb_32_instr_ssax(r) NULL +#define armv7_read_thumb_32_instr_ssub16(r) NULL +#define armv7_read_thumb_32_instr_ssub8(r) NULL +#define armv7_read_thumb_32_instr_stmdb_stmfd(r) NULL +#define armv7_read_thumb_32_instr_stm_stmia_stmea(r) NULL +#define armv7_read_thumb_32_instr_strb_immediate_thumb(r) NULL +#define armv7_read_thumb_32_instr_strb_register(r) NULL +#define armv7_read_thumb_32_instr_strbt(r) NULL +#define armv7_read_thumb_32_instr_strh_immediate_thumb(r) NULL +#define armv7_read_thumb_32_instr_strh_register(r) NULL +#define armv7_read_thumb_32_instr_strht(r) NULL +#define armv7_read_thumb_32_instr_str_immediate_thumb(r) NULL +#define armv7_read_thumb_32_instr_str_register(r) NULL +#define armv7_read_thumb_32_instr_strt(r) NULL +#define armv7_read_thumb_32_instr_sub_immediate_thumb(r) NULL +#define armv7_read_thumb_32_instr_sub_register_thumb(r) NULL +#define armv7_read_thumb_32_instr_subs_pc_lr_thumb(r) NULL +#define armv7_read_thumb_32_instr_sxtab(r) NULL +#define armv7_read_thumb_32_instr_sxtab16(r) NULL +#define armv7_read_thumb_32_instr_sxtah(r) NULL +#define armv7_read_thumb_32_instr_sxtb(r) NULL +#define armv7_read_thumb_32_instr_sxtb16(r) NULL +#define armv7_read_thumb_32_instr_sxth(r) NULL +#define armv7_read_thumb_32_instr_teq_immediate(r) NULL +#define armv7_read_thumb_32_instr_teq_register(r) NULL +#define armv7_read_thumb_32_instr_tst_immediate(r) NULL +#define armv7_read_thumb_32_instr_tst_register(r) NULL +#define armv7_read_thumb_32_instr_uadd16(r) NULL +#define armv7_read_thumb_32_instr_uadd8(r) NULL +#define armv7_read_thumb_32_instr_uasx(r) NULL +#define armv7_read_thumb_32_instr_ubfx(r) NULL +#define armv7_read_thumb_32_instr_udf(r) NULL +#define armv7_read_thumb_32_instr_udiv(r) NULL +#define armv7_read_thumb_32_instr_uhadd16(r) NULL +#define armv7_read_thumb_32_instr_uhadd8(r) NULL +#define armv7_read_thumb_32_instr_uhasx(r) NULL +#define armv7_read_thumb_32_instr_uhsax(r) NULL +#define armv7_read_thumb_32_instr_uhsub16(r) NULL +#define armv7_read_thumb_32_instr_uhsub8(r) NULL +#define armv7_read_thumb_32_instr_umaal(r) NULL +#define armv7_read_thumb_32_instr_umlal(r) NULL +#define armv7_read_thumb_32_instr_umull(r) NULL +#define armv7_read_thumb_32_instr_uqadd16(r) NULL +#define armv7_read_thumb_32_instr_uqadd8(r) NULL +#define armv7_read_thumb_32_instr_uqasx(r) NULL +#define armv7_read_thumb_32_instr_uqsax(r) NULL +#define armv7_read_thumb_32_instr_uqsub16(r) NULL +#define armv7_read_thumb_32_instr_uqsub8(r) NULL +#define armv7_read_thumb_32_instr_usad8(r) NULL +#define armv7_read_thumb_32_instr_usada8(r) NULL +#define armv7_read_thumb_32_instr_usat(r) NULL +#define armv7_read_thumb_32_instr_usat16(r) NULL +#define armv7_read_thumb_32_instr_usax(r) NULL +#define armv7_read_thumb_32_instr_usub16(r) NULL +#define armv7_read_thumb_32_instr_usub8(r) NULL +#define armv7_read_thumb_32_instr_uxtab(r) NULL +#define armv7_read_thumb_32_instr_uxtab16(r) NULL +#define armv7_read_thumb_32_instr_uxtah(r) NULL +#define armv7_read_thumb_32_instr_uxtb(r) NULL +#define armv7_read_thumb_32_instr_uxtb16(r) NULL +#define armv7_read_thumb_32_instr_uxth(r) NULL +#define armv7_read_thumb_32_instr_wfe(r) NULL +#define armv7_read_thumb_32_instr_wfi(r) NULL +#define armv7_read_thumb_32_instr_yield(r) NULL +#endif diff --git a/src/arch/arm/v7/thumb_16.c b/src/arch/arm/v7/thumb_16.c new file mode 100644 index 0000000..a27183d --- /dev/null +++ b/src/arch/arm/v7/thumb_16.c @@ -0,0 +1,670 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * thumb_16.c - désassemblage des instructions ARMv7 Thumb 16 bits + * + * Copyright (C) 2014 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * OpenIDA is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * OpenIDA is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +#include "thumb_16.h" + + +#include <stdint.h> + + +#include "opcodes/opcodes_thumb_16.h" +#include "opcodes/opcodes_tmp_thumb_16.h" +#include "../../../common/bconst.h" + + + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +static GArchInstruction *process_armv7_thumb_16_shift_immediate_add_subtract_move_and_compare(uint16_t); + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +static GArchInstruction *process_armv7_thumb_16_data_processing(uint16_t); + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +static GArchInstruction *process_armv7_thumb_16_special_data_instructions_and_branch_and_exchange(uint16_t); + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +static GArchInstruction *process_armv7_thumb_16_load_store_single_data_item(uint16_t); + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +static GArchInstruction *process_armv7_thumb_16_miscellaneous_16_bit_instructions(uint16_t); + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +static GArchInstruction *process_armv7_thumb_16_miscellaneous_16_bit_instructions_if_then_and_hints(uint16_t); + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +static GArchInstruction *process_armv7_thumb_16_conditional_branch_and_supervisor_call(uint16_t); + + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *process_armv7_thumb_16_instruction_set_encoding(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opcode; /* Champ 'opcode' à retrouver */ + + /** + * Suit les directives de : + * § A6.2 16-bit Thumb instruction encoding + */ + + result = NULL; + + opcode = (raw >> 10) & b111111; + + if ((opcode & b110000) == b000000) + result = process_armv7_thumb_16_shift_immediate_add_subtract_move_and_compare(raw); + + else if (opcode == b010000) + result = process_armv7_thumb_16_data_processing(raw); + + else if (opcode == b010001) + result = process_armv7_thumb_16_special_data_instructions_and_branch_and_exchange(raw); + + else if ((opcode & b111110) == b010010) + result = armv7_read_thumb_16_instr_ldr_literal(raw); + + else if ((opcode & b111100) == b010100) + result = armv7_read_thumb_16_instr_ldr_literal(raw); + + else if ((opcode & b111000) == b011000) + result = armv7_read_thumb_16_instr_ldr_literal(raw); + + else if ((opcode & b111000) == b100000) + result = process_armv7_thumb_16_load_store_single_data_item(raw); + + else if ((opcode & b111110) == b101000) + result = armv7_read_thumb_16_instr_adr(raw); + + else if ((opcode & b111110) == b101010) + result = armv7_read_thumb_16_instr_add_sp_plus_immediate(raw); + + else if ((opcode & b111100) == b101100) + result = process_armv7_thumb_16_miscellaneous_16_bit_instructions(raw); + + else if ((opcode & b111110) == b110000) + result = armv7_read_thumb_16_instr_stm_stmia_stmea(raw); + + else if ((opcode & b111110) == b110010) + result = armv7_read_thumb_16_instr_ldm_ldmia_ldmfd_thumb(raw); + + else if ((opcode & b111100) == b110100) + result = process_armv7_thumb_16_conditional_branch_and_supervisor_call(raw); + + else if ((opcode & b111110) == b111000) + result = armv7_read_thumb_16_instr_b(raw); + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_16_shift_immediate_add_subtract_move_and_compare(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opcode; /* Champ 'opcode' à retrouver */ + + /** + * Suit les directives de : + * § A6.2.1 Shift (immediate), add, subtract, move, and compare + */ + + if ((raw & 0xc000) != 0x0000) return NULL; + + result = NULL; + + opcode = (raw >> 9) & b11111; + + if ((opcode & b11100) == b00000) + result = armv7_read_thumb_16_instr_lsl_immediate(raw); + + else if ((opcode & b11100) == b00100) + result = armv7_read_thumb_16_instr_lsr_immediate(raw); + + else if ((opcode & b11100) == b01000) + result = armv7_read_thumb_16_instr_asr_immediate(raw); + + else if (opcode == b01100) + result = armv7_read_thumb_16_instr_add_register_thumb(raw); + + else if (opcode == b01101) + result = armv7_read_thumb_16_instr_sub_register(raw); + + else if (opcode == b01110) + result = armv7_read_thumb_16_instr_add_immediate_thumb(raw); + + else if (opcode == b01111) + result = armv7_read_thumb_16_instr_sub_immediate_thumb(raw); + + else if ((opcode & b11100) == b10000) + result = armv7_read_thumb_16_instr_mov_immediate(raw); + + else if ((opcode & b11100) == b10100) + result = armv7_read_thumb_16_instr_cmp_immediate(raw); + + else if ((opcode & b11100) == b11000) + result = armv7_read_thumb_16_instr_add_immediate_thumb(raw); + + else if ((opcode & b11100) == b11100) + result = armv7_read_thumb_16_instr_sub_immediate_thumb(raw); + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_16_data_processing(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opcode; /* Champ 'opcode' à retrouver */ + + /** + * Suit les directives de : + * § A6.2.2 Data-processing + */ + + if ((raw & 0xfc00) != 0x4000) return NULL; + + result = NULL; + + opcode = (raw >> 6) & b1111; + + switch (opcode) + { + case b0000: + result = armv7_read_thumb_16_instr_and_register(raw); + break; + + case b0001: + result = armv7_read_thumb_16_instr_eor_register(raw); + break; + + case b0010: + result = armv7_read_thumb_16_instr_lsl_register(raw); + break; + + case b0011: + result = armv7_read_thumb_16_instr_lsr_register(raw); + break; + + case b0100: + result = armv7_read_thumb_16_instr_asr_register(raw); + break; + + case b0101: + result = armv7_read_thumb_16_instr_adc_register(raw); + break; + + case b0110: + result = armv7_read_thumb_16_instr_sbc_register(raw); + break; + + case b0111: + result = armv7_read_thumb_16_instr_ror_register(raw); + break; + + case b1000: + result = armv7_read_thumb_16_instr_tst_register(raw); + break; + + case b1001: + result = armv7_read_thumb_16_instr_rsb_immediate(raw); + break; + + case b1010: + result = armv7_read_thumb_16_instr_cmp_register(raw); + break; + + case b1011: + result = armv7_read_thumb_16_instr_cmn_register(raw); + break; + + case b1100: + result = armv7_read_thumb_16_instr_orr_register(raw); + break; + + case b1101: + result = armv7_read_thumb_16_instr_mul(raw); + break; + + case b1110: + result = armv7_read_thumb_16_instr_bic_register(raw); + break; + + case b1111: + result = armv7_read_thumb_16_instr_mvn_register(raw); + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_16_special_data_instructions_and_branch_and_exchange(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opcode; /* Champ 'opcode' à retrouver */ + + /** + * Suit les directives de : + * § A6.2.3 Special data instructions and branch and exchange + */ + + if ((raw & 0xfc00) != 0x4400) return NULL; + + result = NULL; + + opcode = (raw >> 6) & b1111; + + if (opcode == b0000) + result = armv7_read_thumb_16_instr_add_register_thumb(raw); + + else if (opcode == b0001) + result = armv7_read_thumb_16_instr_add_register_thumb(raw); + + else if ((opcode & b1110) == b0010) + result = armv7_read_thumb_16_instr_add_register_thumb(raw); + + else if ((opcode & b1100) == b0100) + result = armv7_read_thumb_16_instr_cmp_register(raw); + + else if (opcode == b1000) + result = armv7_read_thumb_16_instr_mov_register_thumb(raw); + + else if (opcode == b1001) + result = armv7_read_thumb_16_instr_mov_register_thumb(raw); + + else if ((opcode & b1110) == b1010) + result = armv7_read_thumb_16_instr_mov_register_thumb(raw); + + else if ((opcode & b1110) == b1100) + result = armv7_read_thumb_16_instr_bx(raw); + + else if ((opcode & b1110) == b1110) + result = armv7_read_thumb_16_instr_blx_register(raw); + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_16_load_store_single_data_item(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opa; /* Champ 'opa' à retrouver */ + uint16_t opb; /* Champ 'opb' à retrouver */ + + /** + * Suit les directives de : + * § A6.2.4 Load/store single data item + */ + + result = NULL; + + opa = (raw >> 12) & b1111; + opb = (raw >> 9) & b111; + + switch (opa) + { + case b0101: + switch (opb) + { + case b000: + result = armv7_read_thumb_16_instr_str_register(raw); + break; + + case b001: + result = armv7_read_thumb_16_instr_strh_register(raw); + break; + + case b010: + result = armv7_read_thumb_16_instr_strb_register(raw); + break; + + case b011: + result = armv7_read_thumb_16_instr_ldrsb_register(raw); + break; + + case b100: + result = armv7_read_thumb_16_instr_ldr_register_thumb(raw); + break; + + case b101: + result = armv7_read_thumb_16_instr_ldrh_register(raw); + break; + + case b110: + result = armv7_read_thumb_16_instr_ldrb_register(raw); + break; + + case b111: + result = armv7_read_thumb_16_instr_ldrsh_register(raw); + break; + + } + break; + + case b0110: + + if ((opb & b100) == b000) + result = armv7_read_thumb_16_instr_str_immediate_thumb(raw); + else /*if ((opb & b100) == b100)*/ + result = armv7_read_thumb_16_instr_ldr_immediate_thumb(raw); + + break; + + case b0111: + + if ((opb & b100) == b000) + result = armv7_read_thumb_16_instr_strb_immediate_thumb(raw); + else /*if ((opb & b100) == b100)*/ + result = armv7_read_thumb_16_instr_ldrb_immediate_thumb(raw); + + break; + + case b1000: + + if ((opb & b100) == b000) + result = armv7_read_thumb_16_instr_strh_immediate_thumb(raw); + else /*if ((opb & b100) == b100)*/ + result = armv7_read_thumb_16_instr_ldrh_immediate_thumb(raw); + + break; + + case b1001: + + if ((opb & b100) == b000) + result = armv7_read_thumb_16_instr_str_immediate_thumb(raw); + else /*if ((opb & b100) == b100)*/ + result = armv7_read_thumb_16_instr_ldr_immediate_thumb(raw); + + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_16_miscellaneous_16_bit_instructions(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opcode; /* Champ 'opcode' à retrouver */ + + /** + * Suit les directives de : + * § A6.2.5 Miscellaneous 16-bit instructions + */ + + if ((raw & 0xf000) != 0xb000) return NULL; + + result = NULL; + + opcode = (raw >> 5) & b1111111; + + if ((opcode & b1111100) == b0000000) + result = armv7_read_thumb_16_instr_add_sp_plus_immediate(raw); + + else if ((opcode & b1111100) == b0000100) + result = armv7_read_thumb_16_instr_sub_sp_minus_immediate(raw); + + else if ((opcode & b1111000) == b0001000) + result = armv7_read_thumb_16_instr_cbnz_cbz(raw); + + else if ((opcode & b1111110) == b0010000) + result = armv7_read_thumb_16_instr_sxth(raw); + + else if ((opcode & b1111110) == b0010010) + result = armv7_read_thumb_16_instr_sxtb(raw); + + else if ((opcode & b1111110) == b0010100) + result = armv7_read_thumb_16_instr_uxth(raw); + + else if ((opcode & b1111110) == b0010110) + result = armv7_read_thumb_16_instr_uxtb(raw); + + else if ((opcode & b1111000) == b0011000) + result = armv7_read_thumb_16_instr_cbnz_cbz(raw); + + else if ((opcode & b1110000) == b0100000) + result = armv7_read_thumb_16_instr_push(raw); + + else if (opcode == b0110010) + result = armv7_read_thumb_16_instr_setend(raw); + + else if (opcode == b0110011) + result = armv7_read_thumb_16_instr_cps_thumb(raw); + + else if ((opcode & b1111000) == b1001000) + result = armv7_read_thumb_16_instr_cbnz_cbz(raw); + + else if ((opcode & b1111110) == b1010000) + result = armv7_read_thumb_16_instr_rev(raw); + + else if ((opcode & b1111110) == b1010010) + result = armv7_read_thumb_16_instr_rev16(raw); + + else if ((opcode & b1111110) == b1010110) + result = armv7_read_thumb_16_instr_revsh(raw); + + else if ((opcode & b1111000) == b1011000) + result = armv7_read_thumb_16_instr_cbnz_cbz(raw); + + else if ((opcode & b1110000) == b1100000) + result = armv7_read_thumb_16_instr_pop_thumb(raw); + + else if ((opcode & b1111000) == b1110000) + result = armv7_read_thumb_16_instr_bkpt(raw); + + else if ((opcode & b1111000) == b1111000) + result = process_armv7_thumb_16_miscellaneous_16_bit_instructions_if_then_and_hints(raw); + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_16_miscellaneous_16_bit_instructions_if_then_and_hints(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opa; /* Champ 'opa' à retrouver */ + uint16_t opb; /* Champ 'opb' à retrouver */ + + /** + * Suit les directives de : + * § A6.2.5 Miscellaneous 16-bit instructions + * |-> If-Then, and hints + */ + + if ((raw & 0xff00) != 0xbf00) return NULL; + + result = NULL; + + opa = (raw >> 4) & b1111; + opb = (raw >> 0) & b1111; + + if (opb == b0000) + switch (opa) + { + case b0000: + result = armv7_read_thumb_16_instr_nop(raw); + break; + + case b0001: + result = armv7_read_thumb_16_instr_yield(raw); + break; + + case b0010: + result = armv7_read_thumb_16_instr_wfe(raw); + break; + + case b0011: + result = armv7_read_thumb_16_instr_wfi(raw); + break; + + case b0100: + result = armv7_read_thumb_16_instr_sev(raw); + break; + + } + + else + result = armv7_read_thumb_16_instr_it(raw); + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 16 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 16 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_16_conditional_branch_and_supervisor_call(uint16_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint16_t opcode; /* Champ 'opcode' à retrouver */ + + /** + * Suit les directives de : + * § A6.2.6 Conditional branch, and Supervisor Call + */ + + if ((raw & 0xf000) != 0xd000) return NULL; + + result = NULL; + + opcode = (raw >> 8) & b1111; + + switch (opcode) + { + case b1110: + result = armv7_read_thumb_16_instr_udf(raw); + break; + + case b1111: + result = armv7_read_thumb_16_instr_svc_previously_swi(raw); + break; + + default: + result = armv7_read_thumb_16_instr_b(raw); + break; + + } + + return result; + +} diff --git a/src/arch/arm/v7/thumb_16.h b/src/arch/arm/v7/thumb_16.h new file mode 100644 index 0000000..bc50fd8 --- /dev/null +++ b/src/arch/arm/v7/thumb_16.h @@ -0,0 +1,37 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * thumb_16.h - prototypes pour le désassemblage des instructions ARMv7 Thumb 16 bits + * + * Copyright (C) 2014 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * OpenIDA is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * OpenIDA is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +#ifndef _ARCH_ARM_V7_THUMB_16_H +#define _ARCH_ARM_V7_THUMB_16_H + + +#include "../../instruction.h" + + + +/* Désassemble une instruction ARMv7 en mode Thumb 16 bits. */ +GArchInstruction *process_armv7_thumb_16_instruction_set_encoding(uint16_t); + + + +#endif /* _ARCH_ARM_V7_THUMB_16_H */ diff --git a/src/arch/arm/v7/thumb_32.c b/src/arch/arm/v7/thumb_32.c new file mode 100644 index 0000000..b58c206 --- /dev/null +++ b/src/arch/arm/v7/thumb_32.c @@ -0,0 +1,1670 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * thumb_32.c - désassemblage des instructions ARMv7 Thumb 32 bits + * + * Copyright (C) 2014 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * OpenIDA is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * OpenIDA is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +#include "thumb_32.h" + + +#include <stdint.h> + + +#include "opcodes/opcodes_thumb_32.h" +#include "opcodes/opcodes_tmp_thumb_32.h" +#include "../../../common/bconst.h" + + + + + + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_data_processing_modified_immediate(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_data_processing_plain_binary_immediate(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control_change_processor_state_and_hints(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control_miscellaneous_control_instructions(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_load_store_multiple(uint32_t); + + + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_load_word(uint32_t); + + + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_store_single_data_item(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_data_processing_shifted_register(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_data_processing_register(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_signed(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(uint32_t); + + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_miscellaneous_operations(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_multiply_multiply_accumulate_and_absolute_difference(uint32_t); + +/* Désassemble une instruction ARMv7 classique. */ +static GArchInstruction *process_armv7_thumb_32_long_multiply_long_multiply_accumulate_and_divide(uint32_t); + + + + + + +#define process_armv7_thumb_32_load_store_dual_load_store_exclusive_table_branch(r) NULL +#define process_armv7_thumb_32_coprocessor_advanced_simd_and_floating_point_instructions(r) NULL +#define process_armv7_thumb_32_load_byte_memory_hints(r) NULL +#define process_armv7_thumb_32_load_halfword_memory_hints(r) NULL +#define process_armv7_thumb_32_advanced_simd_element_or_structure_load_store_instructions(r) NULL +#define process_armv7_thumb_32_move_register_and_immediate_shifts(r) NULL + + + + + + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 en mode Thumb 32 bits. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + uint32_t op; /* Champ 'op' à retrouver */ + + /** + * Suit les directives de : + * § A6.3 32-bit Thumb instruction encoding + */ + + if (((raw >> 29) & b111) != b111) return NULL; + + result = NULL; + + op1 = (raw >> 27) & b11; + op2 = (raw >> 20) & b1111111; + op = (raw >> 15) & b1; + + switch (op1) + { + case b01: + + if ((op2 & b1100100) == b0000000) + result = process_armv7_thumb_32_load_store_multiple(raw); + + else if ((op2 & b1100100) == b0000100) + result = process_armv7_thumb_32_load_store_dual_load_store_exclusive_table_branch(raw); + + else if ((op2 & b1100000) == b0100000) + result = process_armv7_thumb_32_data_processing_shifted_register(raw); + + else if ((op2 & b1000000) == b1000000) + result = process_armv7_thumb_32_coprocessor_advanced_simd_and_floating_point_instructions(raw); + + break; + + case b10: + + if (op == 1) + result = process_armv7_thumb_32_branches_and_miscellaneous_control(raw); + + else + { + if ((op2 & b0100000) == b0000000) + result = process_armv7_thumb_32_data_processing_modified_immediate(raw); + + else if ((op2 & b0100000) == b0100000) + result = process_armv7_thumb_32_data_processing_plain_binary_immediate(raw); + + } + + break; + + case b11: + + if ((op2 & b1110001) == b0000000) + result = process_armv7_thumb_32_store_single_data_item(raw); + + else if ((op2 & b1100111) == b0000001) + result = process_armv7_thumb_32_load_byte_memory_hints(raw); + + else if ((op2 & b1100111) == b0000011) + result = process_armv7_thumb_32_load_halfword_memory_hints(raw); + + else if ((op2 & b1100111) == b1100111) + result = process_armv7_thumb_32_load_word(raw); + + /* + else if ((op2 & b00xx111) == b00xx111) + undefined; + */ + + else if ((op2 & b1110001) == b0010000) + result = process_armv7_thumb_32_advanced_simd_element_or_structure_load_store_instructions(raw); + + else if ((op2 & b1110000) == b0100000) + result = process_armv7_thumb_32_data_processing_register(raw); + + else if ((op2 & b1111000) == b0110000) + result = process_armv7_thumb_32_multiply_multiply_accumulate_and_absolute_difference(raw); + + else if ((op2 & b1111000) == b0111000) + result = process_armv7_thumb_32_long_multiply_long_multiply_accumulate_and_divide(raw); + + else if ((op2 & b1000000) == b1000000) + result = process_armv7_thumb_32_coprocessor_advanced_simd_and_floating_point_instructions(raw); + + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_data_processing_modified_immediate(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op; /* Champ 'op' à retrouver */ + uint32_t rn; /* Champ 'rn' à retrouver */ + uint32_t rds; /* Champ 'rds' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.1 Data-processing (modified immediate) + */ + + if ((raw & 0xfa0080000) != 0xf0000000) return NULL; + + result = NULL; + + op = (raw >> 21) & b1111; + rn = (raw >> 16) & b1111; + rds = (((raw >> 8) & b1111) << 1) | ((raw >> 20) & b1); + + switch (op) + { + case b0000: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_tst_immediate(raw); + else + result = armv7_read_thumb_32_instr_and_immediate(raw); + + break; + + case b0001: + result = armv7_read_thumb_32_instr_bic_immediate(raw); + break; + + case b0010: + + if (rn == b11111) + result = armv7_read_thumb_32_instr_mov_immediate(raw); + else + result = armv7_read_thumb_32_instr_orr_immediate(raw); + + break; + + case b0011: + + if (rn == b11111) + result = armv7_read_thumb_32_instr_mvn_immediate(raw); + else + result = armv7_read_thumb_32_instr_orn_immediate(raw); + + break; + + case b0100: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_teq_immediate(raw); + else + result = armv7_read_thumb_32_instr_eor_immediate(raw); + + break; + + case b1000: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_cmn_immediate(raw); + else + result = armv7_read_thumb_32_instr_add_immediate_thumb(raw); + + break; + + case b1010: + result = armv7_read_thumb_32_instr_adc_immediate(raw); + break; + + case b1011: + result = armv7_read_thumb_32_instr_sbc_immediate(raw); + break; + + case b1101: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_cmp_immediate(raw); + else + result = armv7_read_thumb_32_instr_sub_immediate_thumb(raw); + + break; + + case b1110: + result = armv7_read_thumb_32_instr_rsb_immediate(raw); + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_data_processing_plain_binary_immediate(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op; /* Champ 'op' à retrouver */ + uint32_t rn; /* Champ 'rn' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.3 Data-processing (plain binary immediate) + */ + + if ((raw & 0xfa000000) != 0xf2000000) return NULL; + + result = NULL; + + op = (raw >> 20) & b11111; + rn = (raw >> 16) & b1111; + + switch (op) + { + case b00000: + + if (rn == b1111) + result = armv7_read_thumb_32_instr_adr(raw); + else + result = armv7_read_thumb_32_instr_add_immediate_thumb(raw); + + break; + + case b00100: + result = armv7_read_thumb_32_instr_mov_immediate(raw); + break; + + case b01010: + + if (rn == b11111) + result = armv7_read_thumb_32_instr_adr(raw); + else + result = armv7_read_thumb_32_instr_sub_immediate_thumb(raw); + + break; + + case b01100: + result = armv7_read_thumb_32_instr_movt(raw); + break; + + case b10000: + result = armv7_read_thumb_32_instr_ssat(raw); + break; + + case b10010: + if ((raw & 0x000070c0) != 0) + result = armv7_read_thumb_32_instr_ssat(raw); + else + result = armv7_read_thumb_32_instr_ssat16(raw); + break; + + case b10100: + result = armv7_read_thumb_32_instr_sbfx(raw); + break; + + case b10110: + + if (rn == b11111) + result = armv7_read_thumb_32_instr_bfc(raw); + else + result = armv7_read_thumb_32_instr_bfi(raw); + + break; + + case b11000: + result = armv7_read_thumb_32_instr_usat(raw); + break; + + case b11010: + if ((raw & 0x000070c0) != 0) + result = armv7_read_thumb_32_instr_usat(raw); + else + result = armv7_read_thumb_32_instr_usat16(raw); + break; + + case b11100: + result = armv7_read_thumb_32_instr_ubfx(raw); + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op; /* Champ 'op' à retrouver */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + uint32_t imm8; /* Champ 'imm8' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.4 Branches and miscellaneous control + */ + + if ((raw & 0xf8000000) != 0xf0000000) return NULL; + + result = NULL; + + op = (raw >> 20) & b1111111; + op1 = (raw >> 12) & b111; + op2 = (raw >> 8) & b1111; + imm8 = (raw >> 0) & b11111111; + + if (op1 == b000 && op == b1111110) + result = armv7_read_thumb_32_instr_hvc(raw); + + else if (op1 == b000 && op == b1111111) + result = armv7_read_thumb_32_instr_smc_previously_smi(raw); + + else if ((op1 & b101) == b000) + { + if ((op & b0111000) != b0111000) + result = armv7_read_thumb_32_instr_b(raw); + + else if ((imm8 & b00100000) == b00100000 && (op & b1111110) == b0111000) + result = armv7_read_thumb_32_instr_msr_banked_register(raw); + + else if ((imm8 & b00100000) == b00000000 && op == b0111000 && (op2 & b0011) == b0000) + result = armv7_read_thumb_32_instr_msr_register(raw); + + else if ((imm8 & b00100000) == b00000000 && op == b0111000 && (op2 & b0011) == b0001) + result = armv7_read_thumb_32_instr_b_msr_register(raw); + + else if ((imm8 & b00100000) == b00000000 && op == b0111000 && (op2 & b0010) == b0010) + result = armv7_read_thumb_32_instr_b_msr_register(raw); + + else if ((imm8 & b00100000) == b00000000 && op == b0111001) + result = armv7_read_thumb_32_instr_b_msr_register(raw); + + else if (op == b0111010) + result = process_armv7_thumb_32_branches_and_miscellaneous_control_change_processor_state_and_hints(raw); + + else if (op == b0111011) + result = process_armv7_thumb_32_branches_and_miscellaneous_control_miscellaneous_control_instructions(raw); + + else if (op == b0111100) + result = armv7_read_thumb_32_instr_bxj(raw); + + else if (imm8 == b00000000 && op == b0111101) + result = armv7_read_thumb_32_instr_eret(raw); + + else if (imm8 != b00000000 && op == b0111101) + result = armv7_read_thumb_32_instr_subs_pc_lr_thumb(raw); + + else if ((imm8 & b00100000) == b00100000 && (op & b1111110) == b0111110) + result = armv7_read_thumb_32_instr_mrs_banked_register(raw); + + else if ((imm8 & b00100000) == b00000000 && op == b0111110) + result = armv7_read_thumb_32_instr_mrs(raw); + + else if ((imm8 & b00100000) == b00000000 && op == b0111111) + result = armv7_read_thumb_32_instr_b_mrs(raw); + + } + + else if ((op1 & b101) == b001) + result = armv7_read_thumb_32_instr_b(raw); + + else if (op1 == b010 && op == b1111111) + result = armv7_read_thumb_32_instr_udf(raw); + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control_change_processor_state_and_hints(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.4 Branches and miscellaneous control + * |-> Change Processor State, and hints + */ + + if ((raw & 0xfff0d000) != 0xf3a08000) return NULL; + + result = NULL; + + op1 = (raw >> 8) & b111; + op2 = (raw >> 0) & b11111111; + + if (op1 != b000) + result = armv7_read_thumb_32_instr_cps_thumb(raw); + + else + { + if (op2 == b00000000) + result = armv7_read_thumb_32_instr_nop(raw); + + else if (op2 == b00000001) + result = armv7_read_thumb_32_instr_yield(raw); + + else if (op2 == b00000010) + result = armv7_read_thumb_32_instr_wfe(raw); + + else if (op2 == b00000011) + result = armv7_read_thumb_32_instr_wfi(raw); + + else if (op2 == b00000100) + result = armv7_read_thumb_32_instr_sev(raw); + + else if ((op2 & b11110000) == b11110000) + result = armv7_read_thumb_32_instr_dbg(raw); + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_branches_and_miscellaneous_control_miscellaneous_control_instructions(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op; /* Champ 'op' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.4 Branches and miscellaneous control + * |-> Miscellaneous control instructions + */ + + if ((raw & 0xfff0d000) != 0xf3b08000) return NULL; + + result = NULL; + + op = (raw >> 4) & b1111; + + switch (op) + { + case b0000: + result = armv7_read_thumb_32_instr_enterx_leavex(raw); + break; + + case b0001: + result = armv7_read_thumb_32_instr_enterx_leavex(raw); + break; + + case b0010: + result = armv7_read_thumb_32_instr_clrex(raw); + break; + + case b0100: + result = armv7_read_thumb_32_instr_dsb(raw); + break; + + case b0101: + result = armv7_read_thumb_32_instr_dmb(raw); + break; + + case b0110: + result = armv7_read_thumb_32_instr_isb(raw); + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_load_store_multiple(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op; /* Champ 'op' à retrouver */ + uint32_t l; /* Champ 'l' à retrouver */ + uint32_t wrn; /* Champ 'wrn' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.5 Load/store multiple + */ + + if ((raw & 0xfe400000) != 0xe0000000) return NULL; + + result = NULL; + + op = (raw >> 23) & b11; + l = (raw >> 20) & b1; + wrn = (((raw >> 21) & b1) << 4) | ((raw >> 16) & b1111); + + switch (op) + { + case b00: + + if (l == b0) + result = armv7_read_thumb_32_instr_srs_thumb(raw); + else + result = armv7_read_thumb_32_instr_rfe(raw); + + break; + + case b01: + + if (l == b0) + result = armv7_read_thumb_32_instr_stm_stmia_stmea(raw); + + else + { + if (wrn == b11101) + result = armv7_read_thumb_32_instr_pop_thumb(raw); + else + result = armv7_read_thumb_32_instr_ldm_ldmia_ldmfd_thumb(raw); + } + + break; + + case b10: + + if (l == b0) + { + if (wrn == b11101) + result = armv7_read_thumb_32_instr_push(raw); + else + result = armv7_read_thumb_32_instr_stmdb_stmfd(raw); + } + + else + result = armv7_read_thumb_32_instr_ldmdb_ldmea(raw); + + break; + + case b11: + + if (l == b0) + result = armv7_read_thumb_32_instr_srs_thumb(raw); + else + result = armv7_read_thumb_32_instr_rfe(raw); + + break; + + } + + return result; + +} + + + + + + + + + + + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_load_word(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t rn; /* Champ 'rn' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.7 Load word + */ + + if (((raw >> 22) & 0xfe700000) != 0xf8500000) return NULL; + + result = NULL; + + op1 = (raw >> 23) & b11; + rn = (raw >> 16) & b1111; + op2 = (raw >> 6) & b111111; + + switch (op1) + { + case b00: + + if (op2 == b000000 && rn != b1111) + result = armv7_read_thumb_32_instr_ldr_register_thumb(raw); + + else if ((op2 & b100100) == b100100 && rn != b1111) + result = armv7_read_thumb_32_instr_ldr_immediate_thumb(raw); + + else if ((op2 & b111100) == b110000 && rn != b1111) + result = armv7_read_thumb_32_instr_ldr_immediate_thumb(raw); + + else if ((op2 & b111100) == b111000 && rn != b1111) + result = armv7_read_thumb_32_instr_ldrt(raw); + + break; + + case b01: + if (rn != b1111) + result = armv7_read_thumb_32_instr_ldr_immediate_thumb(raw); + break; + + } + + if (result == NULL && (op1 & b10) == b00 && rn == b1111) + result = armv7_read_thumb_32_instr_ldr_literal(raw); + + return result; + +} + + + + + + + + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_store_single_data_item(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.10 Store single data item + */ + + if ((raw & 0xff100000) != 0xf8000000) return NULL; + + result = NULL; + + op1 = (raw >> 21) & b111; + op2 = (raw >> 6) & b111111; + + switch (op1) + { + case b000: + + if (op2 == b000000) + result = armv7_read_thumb_32_instr_strb_register(raw); + + else if ((op2 & b100100) == b100100) + result = armv7_read_thumb_32_instr_strb_immediate_thumb(raw); + + else if ((op2 & b111100) == b110000) + result = armv7_read_thumb_32_instr_strb_immediate_thumb(raw); + + else if ((op2 & b111100) == b111000) + result = armv7_read_thumb_32_instr_strbt(raw); + + break; + + case b001: + + if (op2 == b000000) + result = armv7_read_thumb_32_instr_strh_register(raw); + + else if ((op2 & b100100) == b100100) + result = armv7_read_thumb_32_instr_strh_immediate_thumb(raw); + + else if ((op2 & b111100) == b110000) + result = armv7_read_thumb_32_instr_strh_immediate_thumb(raw); + + else if ((op2 & b111100) == b111000) + result = armv7_read_thumb_32_instr_strht(raw); + + break; + + case b010: + + if (op2 == b000000) + result = armv7_read_thumb_32_instr_str_register(raw); + + else if ((op2 & b100100) == b100100) + result = armv7_read_thumb_32_instr_str_immediate_thumb(raw); + + else if ((op2 & b111100) == b110000) + result = armv7_read_thumb_32_instr_str_immediate_thumb(raw); + + else if ((op2 & b111100) == b111000) + result = armv7_read_thumb_32_instr_strt(raw); + + break; + + case b100: + result = armv7_read_thumb_32_instr_strb_immediate_thumb(raw); + break; + + case b101: + result = armv7_read_thumb_32_instr_strh_immediate_thumb(raw); + break; + + case b110: + result = armv7_read_thumb_32_instr_str_immediate_thumb(raw); + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_data_processing_shifted_register(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op; /* Champ 'op' à retrouver */ + uint32_t rn; /* Champ 'rn' à retrouver */ + uint32_t rds; /* Champ 'rds' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.11 Data-processing (shifted register) + */ + + if ((raw & 0xfe000000) != 0xea000000) return NULL; + + result = NULL; + + rn = (raw >> 16) & b1111; + rds = (((raw >> 8) & b1111) << 1) | ((raw >> 20) & b1); + + switch (op) + { + case b0000: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_tst_register(raw); + else + result = armv7_read_thumb_32_instr_and_register(raw); + + break; + + case b0001: + result = armv7_read_thumb_32_instr_bic_register(raw); + break; + + case b0010: + + if (rn == b11111) + result = process_armv7_thumb_32_move_register_and_immediate_shifts(raw); + else + result = armv7_read_thumb_32_instr_orr_register(raw); + + break; + + case b0011: + + if (rn == b11111) + result = armv7_read_thumb_32_instr_mvn_register(raw); + else + result = armv7_read_thumb_32_instr_orn_register(raw); + + break; + + case b0100: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_teq_register(raw); + else + result = armv7_read_thumb_32_instr_eor_register(raw); + + break; + + case b0110: + result = armv7_read_thumb_32_instr_pkh(raw); + break; + + case b1000: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_cmn_register(raw); + else + result = armv7_read_thumb_32_instr_add_register_thumb(raw); + + break; + + case b1010: + result = armv7_read_thumb_32_instr_adc_register(raw); + break; + + case b1011: + result = armv7_read_thumb_32_instr_sbc_register(raw); + break; + + case b1101: + + if (rds == b11111) + result = armv7_read_thumb_32_instr_cmp_register(raw); + else + result = armv7_read_thumb_32_instr_sub_register_thumb(raw); + + break; + + case b1110: + result = armv7_read_thumb_32_instr_rsb_register(raw); + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_data_processing_register(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t rn; /* Champ 'rn' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.12 Data-processing (register) + */ + + if ((raw & 0xff00f000) != 0xfa00f000) return NULL; + + result = NULL; + + op1 = (raw >> 20) & b1111; + rn = (raw >> 16) & b1111; + op2 = (raw >> 4) & b1111; + + if ((op1 & b1110) == b0000 && op2 == b0000) + result = armv7_read_thumb_32_instr_lsl_register(raw); + + else if ((op1 & b1110) == b0010 && op2 == b0000) + result = armv7_read_thumb_32_instr_lsr_register(raw); + + else if ((op1 & b1110) == b0100 && op2 == b0000) + result = armv7_read_thumb_32_instr_asr_register(raw); + + else if ((op1 & b1110) == b0110 && op2 == b0000) + result = armv7_read_thumb_32_instr_ror_register(raw); + + else if (op1 == b0000 && (op2 & b1000) == b1000) + { + if (rn == b1111) + result = armv7_read_thumb_32_instr_sxth(raw); + else + result = armv7_read_thumb_32_instr_sxtah(raw); + } + + else if (op1 == b0001 && (op2 & b1000) == b1000) + { + if (rn == b1111) + result = armv7_read_thumb_32_instr_uxth(raw); + else + result = armv7_read_thumb_32_instr_uxtah(raw); + } + + else if (op1 == b0010 && (op2 & b1000) == b1000) + { + if (rn == b1111) + result = armv7_read_thumb_32_instr_sxtb16(raw); + else + result = armv7_read_thumb_32_instr_sxtab16(raw); + } + + else if (op1 == b0011 && (op2 & b1000) == b1000) + { + if (rn == b1111) + result = armv7_read_thumb_32_instr_uxtb16(raw); + else + result = armv7_read_thumb_32_instr_uxtab16(raw); + } + + else if (op1 == b0100 && (op2 & b1000) == b1000) + { + if (rn == b1111) + result = armv7_read_thumb_32_instr_sxtb(raw); + else + result = armv7_read_thumb_32_instr_sxtab(raw); + } + + else if (op1 == b0101 && (op2 & b1000) == b1000) + { + if (rn == b1111) + result = armv7_read_thumb_32_instr_uxtb(raw); + else + result = armv7_read_thumb_32_instr_uxtab(raw); + } + + else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0000) + result = process_armv7_thumb_32_parallel_addition_and_subtraction_signed(raw); + + else if ((op1 & b1000) == b1000 && (op2 & b1100) == b0100) + result = process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(raw); + + else if ((op1 & b1100) == b1000 && (op2 & b1100) == b1000) + result = process_armv7_thumb_32_miscellaneous_operations(raw); + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_signed(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.13 Parallel addition and subtraction, signed + */ + + if ((raw & 0xff80f000) != 0xfa80f000) return NULL; + + result = NULL; + + op1 = (raw >> 20) & b111; + op2 = (raw >> 4) & b11; + + switch (op2) + { + case b00: + switch (op1) + { + case b001: + result = armv7_read_thumb_32_instr_sadd16(raw); + break; + case b010: + result = armv7_read_thumb_32_instr_sasx(raw); + break; + case b110: + result = armv7_read_thumb_32_instr_ssax(raw); + break; + case b101: + result = armv7_read_thumb_32_instr_ssub16(raw); + break; + case b000: + result = armv7_read_thumb_32_instr_sadd8(raw); + break; + case b100: + result = armv7_read_thumb_32_instr_ssub8(raw); + break; + } + break; + + case b01: + switch (op1) + { + case b001: + result = armv7_read_thumb_32_instr_sqadd16(raw); + break; + case b010: + result = armv7_read_thumb_32_instr_sqasx(raw); + break; + case b110: + result = armv7_read_thumb_32_instr_sqsax(raw); + break; + case b101: + result = armv7_read_thumb_32_instr_sqsub16(raw); + break; + case b000: + result = armv7_read_thumb_32_instr_sqadd8(raw); + break; + case b100: + result = armv7_read_thumb_32_instr_sqsub8(raw); + break; + } + break; + + case b10: + switch (op1) + { + case b001: + result = armv7_read_thumb_32_instr_shadd16(raw); + break; + case b010: + result = armv7_read_thumb_32_instr_shasx(raw); + break; + case b110: + result = armv7_read_thumb_32_instr_shsax(raw); + break; + case b101: + result = armv7_read_thumb_32_instr_shsub16(raw); + break; + case b000: + result = armv7_read_thumb_32_instr_shadd8(raw); + break; + case b100: + result = armv7_read_thumb_32_instr_shsub8(raw); + break; + } + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_parallel_addition_and_subtraction_unsigned(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.14 Parallel addition and subtraction, unsigned + */ + + if ((raw & 0xff80f0c0) != 0xfa80f040) return NULL; + + result = NULL; + + op1 = (raw >> 20) & b111; + op2 = (raw >> 4) & b11; + + switch (op2) + { + case b00: + switch (op1) + { + case b001: + result = armv7_read_thumb_32_instr_uadd16(raw); + break; + case b010: + result = armv7_read_thumb_32_instr_uasx(raw); + break; + case b110: + result = armv7_read_thumb_32_instr_usax(raw); + break; + case b101: + result = armv7_read_thumb_32_instr_usub16(raw); + break; + case b000: + result = armv7_read_thumb_32_instr_uadd8(raw); + break; + case b100: + result = armv7_read_thumb_32_instr_usub8(raw); + break; + } + break; + + case b01: + switch (op1) + { + case b001: + result = armv7_read_thumb_32_instr_uqadd16(raw); + break; + case b010: + result = armv7_read_thumb_32_instr_uqasx(raw); + break; + case b110: + result = armv7_read_thumb_32_instr_uqsax(raw); + break; + case b101: + result = armv7_read_thumb_32_instr_uqsub16(raw); + break; + case b000: + result = armv7_read_thumb_32_instr_uqadd8(raw); + break; + case b100: + result = armv7_read_thumb_32_instr_uqsub8(raw); + break; + } + break; + + case b10: + switch (op1) + { + case b001: + result = armv7_read_thumb_32_instr_uhadd16(raw); + break; + case b010: + result = armv7_read_thumb_32_instr_uhasx(raw); + break; + case b110: + result = armv7_read_thumb_32_instr_uhsax(raw); + break; + case b101: + result = armv7_read_thumb_32_instr_uhsub16(raw); + break; + case b000: + result = armv7_read_thumb_32_instr_uhadd8(raw); + break; + case b100: + result = armv7_read_thumb_32_instr_uhsub8(raw); + break; + } + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_miscellaneous_operations(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.15 Miscellaneous operations + */ + + if ((raw & 0xffc0f0c0) != 0xfa80f080) return NULL; + + result = NULL; + + op1 = (raw >> 20) & b11; + op2 = (raw >> 4) & b11; + + switch (op1) + { + case b00: + switch (op2) + { + case b00: + result = armv7_read_thumb_32_instr_qadd(raw); + break; + case b01: + result = armv7_read_thumb_32_instr_qdadd(raw); + break; + case b10: + result = armv7_read_thumb_32_instr_qsub(raw); + break; + case b11: + result = armv7_read_thumb_32_instr_qdsub(raw); + break; + } + break; + + case b01: + switch (op2) + { + case b00: + result = armv7_read_thumb_32_instr_rev(raw); + break; + case b01: + result = armv7_read_thumb_32_instr_rev16(raw); + break; + case b10: + result = armv7_read_thumb_32_instr_rbit(raw); + break; + case b11: + result = armv7_read_thumb_32_instr_revsh(raw); + break; + } + break; + + case b10: + if (op2 == b00) + result = armv7_read_thumb_32_instr_sel(raw); + break; + + case b11: + if (op2 == b00) + result = armv7_read_thumb_32_instr_clz(raw); + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_multiply_multiply_accumulate_and_absolute_difference(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t ra; /* Champ 'ra' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.16 Multiply, multiply accumulate, and absolute difference + */ + + if ((raw & 0xff8000c0) != 0xfb000000) return NULL; + + result = NULL; + + op1 = (raw >> 20) & b111; + ra = (raw >> 12) & b1111; + op2 = (raw >> 4) & b11; + + switch (op1) + { + case b000: + + if (op2 == b00) + { + if (ra == b1111) + result = armv7_read_thumb_32_instr_mul(raw); + else + result = armv7_read_thumb_32_instr_mla(raw); + } + + else if (op2 == b01) + result = armv7_read_thumb_32_instr_mls(raw); + + break; + + case b001: + + if (ra == b1111) + result = armv7_read_thumb_32_instr_smulbb_smulbt_smultb_smultt(raw); + else + result = armv7_read_thumb_32_instr_smlabb_smlabt_smlatb_smlatt(raw); + + break; + + case b010: + if ((op2 & b10) == b00) + { + if (ra == b1111) + result = armv7_read_thumb_32_instr_smuad(raw); + else + result = armv7_read_thumb_32_instr_smlad(raw); + } + break; + + case b011: + if ((op2 & b10) == b00) + { + if (ra == b1111) + result = armv7_read_thumb_32_instr_smulwb_smulwt(raw); + else + result = armv7_read_thumb_32_instr_smlawb_smlawt(raw); + } + break; + + case b100: + if ((op2 & b10) == b00) + { + if (ra == b1111) + result = armv7_read_thumb_32_instr_smusd(raw); + else + result = armv7_read_thumb_32_instr_smlsd(raw); + } + break; + + case b101: + if ((op2 & b10) == b00) + { + if (ra == b1111) + result = armv7_read_thumb_32_instr_smmul(raw); + else + result = armv7_read_thumb_32_instr_smmla(raw); + } + break; + + case b110: + if ((op2 & b10) == b00) + result = armv7_read_thumb_32_instr_smmls(raw); + break; + + case b111: + if (op2 == b00) + { + if (ra == b1111) + result = armv7_read_thumb_32_instr_usad8(raw); + else + result = armv7_read_thumb_32_instr_usada8(raw); + } + break; + + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : raw = donnée brute de 32 bits à désassembler. * +* * +* Description : Désassemble une instruction ARMv7 classique. * +* * +* Retour : Instruction mise en place ou NULL en cas d'échec. * +* * +* Remarques : - * +* * +******************************************************************************/ + +static GArchInstruction *process_armv7_thumb_32_long_multiply_long_multiply_accumulate_and_divide(uint32_t raw) +{ + GArchInstruction *result; /* Instruction à renvoyer */ + uint32_t op1; /* Champ 'op1' à retrouver */ + uint32_t op2; /* Champ 'op2' à retrouver */ + + /** + * Suit les directives de : + * § A6.3.17 Long multiply, long multiply accumulate, and divide + */ + + if ((raw & 0xff800000) != 0xfb800000) return NULL; + + result = NULL; + + op1 = (raw >> 20) & b111; + op2 = (raw >> 4) & b1111; + + switch (op1) + { + case b000: + if (op2 == b0000) + result = armv7_read_thumb_32_instr_smull(raw); + break; + + case b001: + if (op2 == b1111) + result = armv7_read_thumb_32_instr_sdiv(raw); + break; + + case b010: + if (op2 == b0000) + result = armv7_read_thumb_32_instr_umull(raw); + break; + + case b011: + if (op2 == b1111) + result = armv7_read_thumb_32_instr_udiv(raw); + break; + + case b100: + + if (op2 == b0000) + result = armv7_read_thumb_32_instr_smlal(raw); + + else if ((op2 & b1100) == b1000) + result = armv7_read_thumb_32_instr_smlalbb_smlalbt_smlaltb_smlaltt(raw); + + else if ((op2 & b1110) == b1100) + result = armv7_read_thumb_32_instr_smlald(raw); + + break; + + case b101: + if ((op2 & b1110) == b1100) + result = armv7_read_thumb_32_instr_(raw); + break; + + case b110: + + if (op2 == b0000) + result = armv7_read_thumb_32_instr_umlal(raw); + + else if (op2 == b0110) + result = armv7_read_thumb_32_instr_umaal(raw); + + break; + + } + + return result; + +} + + + + + + + + + + + + + + + + + diff --git a/src/arch/arm/v7/thumb_32.h b/src/arch/arm/v7/thumb_32.h new file mode 100644 index 0000000..57061f8 --- /dev/null +++ b/src/arch/arm/v7/thumb_32.h @@ -0,0 +1,37 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * thumb_32.h - prototypes pour le désassemblage des instructions ARMv7 Thumb 32 bits + * + * Copyright (C) 2014 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * OpenIDA is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * OpenIDA is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +#ifndef _ARCH_ARM_V7_THUMB_32_H +#define _ARCH_ARM_V7_THUMB_32_H + + +#include "../../instruction.h" + + + +/* Désassemble une instruction ARMv7 en mode Thumb 32 bits. */ +GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t); + + + +#endif /* _ARCH_ARM_V7_THUMB_32_H */ |