Extended the compiler by allowing more than one type of Thumb.

git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@431 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a

2 files changed, 130 insertions, 1 deletions

diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index a8ae089..ad52bd2 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -11,7 +11,8 @@ D2C_HEADER = _ARCH_ARM_V7
 
 D2C_ENCODINGS =							\
 	-e a=								\
-	-e t=thumb_
+	-e t=thumb16_						\
+	-e T=thumb32_
 
 D2C_MACROS =											\
     -M SetFlags=g_armv7_instruction_define_setflags		\
@@ -39,6 +40,7 @@ ARMV7_DEFS = 							\
 	eor_A8847.d							\
 	mla_A88100.d						\
 	mls_A88101.d						\
+	mov_A88102.d						\
 	mov_A88104.d						\
 	mul_A88114.d						\
 	mvn_A88115.d						\
diff --git a/src/arch/arm/v7/opdefs/mov_A88102.d b/src/arch/arm/v7/opdefs/mov_A88102.d
new file mode 100644
index 0000000..2401df2
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/mov_A88102.d
@@ -0,0 +1,127 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title MOV (immediate)
+
+@encoding(t1) {
+
+    @half 0 0 1 0 0 Rd(3) imm8(8)
+
+    @syntax <Rd> <const>
+
+    @conv {
+
+        Rd = Register(Rd)
+        const = ZeroExtend(imm8, 32)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 1 0 i(1) 0 0 0 1 0 S(1) 1 1 1 1 0 imm3(3) Rd(4) imm8(8)
+
+    @syntax {S} <Rd> <const>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        const = ThumbExpandImm_C(i:imm3:imm8, 0)
+
+    }
+
+    @rules {
+
+        //if d IN {13,15} then UNPREDICTABLE;
+
+    }
+
+}
+
+@encoding(T3) {
+
+    @word 1 1 1 1 0 i(1) 1 0 0 1 0 0 imm4(4) 0 imm3(3) Rd(4) imm8(8)
+
+    @syntax <Rd> <const>
+
+    @conv {
+
+        Rd = Register(Rd)
+        const = ZeroExtend(imm4:i:imm3:imm8, 32)
+
+    }
+
+    @rules {
+
+        //if d IN {13,15} then UNPREDICTABLE;
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 0 0 1 1 1 0 1 S(1) 0 0 0 0 Rd(4) imm12(12)
+
+    @syntax {S} {c} <Rd> <const>
+
+    @conv {
+
+        S = SetFlags(S)
+        c = Condition(cond)
+        Rd = Register(Rd)
+        const = ARMExpandImm_C(imm12, 0)
+
+    }
+
+    @rules {
+
+        if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions (ARM)
+
+    }
+
+}
+
+@encoding(A2) {
+
+    @word cond(4) 0 0 1 1 0 0 0 0 imm4(4) Rd(4) imm12(12)
+
+    @syntax {c} <Rd> <const>
+
+    @conv {
+
+        c = Condition(cond)
+        Rd = Register(Rd)
+        const = ZeroExtend(imm4:imm12, 32)
+
+    }
+
+    @rules {
+
+        //if d == 15 then UNPREDICTABLE;
+
+    }
+
+}