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author | Cyrille Bagard <nocbos@gmail.com> | 2009-05-31 20:58:20 (GMT) |
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committer | Cyrille Bagard <nocbos@gmail.com> | 2009-05-31 20:58:20 (GMT) |
commit | 8724afdc73e0ddad86f46de1a3fbe0254575a76e (patch) | |
tree | de666b66e154c6c6453807d3fa4272efb6877a91 /src/arch/mips/op_jump.c | |
parent | 0b7d7f26c745ff0f52e9e483a0980351368ca824 (diff) |
Supported a new architecture (MIPS).
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@67 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/mips/op_jump.c')
-rw-r--r-- | src/arch/mips/op_jump.c | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/src/arch/mips/op_jump.c b/src/arch/mips/op_jump.c new file mode 100644 index 0000000..4faa6c6 --- /dev/null +++ b/src/arch/mips/op_jump.c @@ -0,0 +1,114 @@ + +/* OpenIDA - Outil d'analyse de fichiers binaires + * op_jump.c - décodage des sauts inconditionnels + * + * Copyright (C) 2009 Cyrille Bagard + * + * This file is part of OpenIDA. + * + * OpenIDA is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * OpenIDA is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +#include "opcodes.h" + + +#include "../instruction-int.h" +#include "operand.h" + + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'jr rs'. * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *mips_read_instr_jump_register(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, const GMipsProcessor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + + result = g_mips_instruction_new(MOP_JR); + + if (!mips_read_n_operands(result, data, pos, len, 1, MIPS_OTP_RS)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'jalr[.hb] [rd, ]rs'. * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *mips_read_instr_jump_and_link_register(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, const GMipsProcessor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + off_t tmp; /* Pour ne pas toucher à 'pos' */ + uint32_t code; /* Code binaire à décoder */ + GArchOperand *operand; /* Opérande à analyser */ + const mips_register *reg; /* Registre implicite ? */ + + tmp = *pos; + + if (!read_u32(&code, data, &tmp, len, SRE_LITTLE/* FIXME */)) + return NULL; + + if (code & 0x400) result = g_mips_instruction_new(MOP_JALR_HB); + else result = g_mips_instruction_new(MOP_JALR); + + if (!mips_read_n_operands(result, data, pos, len, 2, MIPS_OTP_RD, MIPS_OTP_RS)) + { + /* TODO free(result);*/ + return NULL; + } + + operand = G_ARCH_INSTRUCTION(result)->operands[0]; + reg = g_mips_register_operand_get_register(G_MIPS_REGISTER_OPERAND(operand)); + + if (is_mips_register_return_address(reg)) + { + g_arch_instruction_detach_operand(G_ARCH_INSTRUCTION(result), operand); + /* TODO free(operand);*/ + } + + return result; + +} |