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author | Cyrille Bagard <nocbos@gmail.com> | 2008-10-27 20:00:09 (GMT) |
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committer | Cyrille Bagard <nocbos@gmail.com> | 2008-10-27 20:00:09 (GMT) |
commit | 2e5893f9261ba59e06fadcc6ddfa9a1253e286b3 (patch) | |
tree | 8197f6419812e7c36c28d6849ced3e37e8926539 /src/arch/x86/op_movzx.c | |
parent | 197933fdf469ab9b8897b33c51809c128f1e3c03 (diff) |
Extended the current opcode support (0x01, 0x72, 0x73, 0x88, 0xd3, 0xf7, 0xfc, 0xb6 and 0xbe).
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@38 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/op_movzx.c')
-rw-r--r-- | src/arch/x86/op_movzx.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/x86/op_movzx.c b/src/arch/x86/op_movzx.c index bb781cf..4df1303 100644 --- a/src/arch/x86/op_movzx.c +++ b/src/arch/x86/op_movzx.c @@ -53,6 +53,9 @@ asm_x86_instr *x86_read_instr_movzx_r1632_rm8(const uint8_t *data, off_t *pos, o result = (asm_x86_instr *)calloc(1, sizeof(asm_x86_instr)); + /* 0x0f : passage en mode 2 octets */ + (*pos)++; + oprsize = switch_x86_operand_size_if_needed(proc, data, pos); ASM_INSTRUCTION(result)->opcode = data[(*pos)++]; |