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authorCyrille Bagard <nocbos@gmail.com>2008-10-26 23:37:51 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2008-10-26 23:37:51 (GMT)
commit197933fdf469ab9b8897b33c51809c128f1e3c03 (patch)
tree104d91be1a69d80eb4b59b247e4b719531bc7492 /src/arch/x86/op_ror.c
parentac438e8ad47f267c9eb6f462eb5a7e2b5c017f26 (diff)
Completed support of the 0x81 and 0xc1 opcodes.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@37 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/op_ror.c')
-rw-r--r--src/arch/x86/op_ror.c68
1 files changed, 68 insertions, 0 deletions
diff --git a/src/arch/x86/op_ror.c b/src/arch/x86/op_ror.c
new file mode 100644
index 0000000..5dca287
--- /dev/null
+++ b/src/arch/x86/op_ror.c
@@ -0,0 +1,68 @@
+
+/* OpenIDA - Outil d'analyse de fichiers binaires
+ * op_ror.c - décodage des rotations à droite sans retenue
+ *
+ * Copyright (C) 2008 Cyrille Bagard
+ *
+ * This file is part of OpenIDA.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include <malloc.h>
+
+
+#include "../instruction-int.h"
+#include "opcodes.h"
+#include "operand.h"
+
+
+
+/******************************************************************************
+* *
+* Paramètres : data = flux de données à analyser. *
+* pos = position courante dans ce flux. [OUT] *
+* len = taille totale des données à analyser. *
+* offset = adresse virtuelle de l'instruction. *
+* proc = architecture ciblée par le désassemblage. *
+* *
+* Description : Décode une instruction de type 'ror' (8 bits). *
+* *
+* Retour : Instruction mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+asm_x86_instr *x86_read_instr_ror_rm1632_imm8(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
+{
+ asm_x86_instr *result; /* Instruction à retourner */
+ AsmOperandSize oprsize; /* Taille des opérandes */
+
+ result = (asm_x86_instr *)calloc(1, sizeof(asm_x86_instr));
+
+ oprsize = switch_x86_operand_size_if_needed(proc, data, pos);
+
+ ASM_INSTRUCTION(result)->opcode = data[(*pos)++];
+
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM1632, X86_OTP_IMM8, oprsize))
+ {
+ free(result);
+ return NULL;
+ }
+
+ return result;
+
+}