diff options
author | Cyrille Bagard <nocbos@gmail.com> | 2009-04-29 16:58:50 (GMT) |
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committer | Cyrille Bagard <nocbos@gmail.com> | 2009-04-29 16:58:50 (GMT) |
commit | 1e9b23fb37755fef5992f65cb9862fab271e13d9 (patch) | |
tree | 85d1ec34fd5184c292961277f8af67873358593f /src/arch/x86/opcodes.h | |
parent | b9977e00ff9eb6e025e86a15c858183f3f314cf5 (diff) |
Supported more x86 opcodes.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@60 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/opcodes.h')
-rw-r--r-- | src/arch/x86/opcodes.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h index 51af021..c16b9be 100644 --- a/src/arch/x86/opcodes.h +++ b/src/arch/x86/opcodes.h @@ -37,12 +37,24 @@ /* Décode une instruction de type 'adc' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_adc_imm8_to_rm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); +/* Décode une instruction de type 'adc' (8 bits). */ +asm_x86_instr *x86_read_instr_adc_rm8_r8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + /* Décode une instruction de type 'adc' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_adc_rm1632_imm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); +/* Décode une instruction de type 'add al, ...' (8 bits). */ +asm_x86_instr *x86_read_instr_add_al_imm8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + +/* Décode une instruction de type 'add [e]ax, ...' (16/32 bits). */ +asm_x86_instr *x86_read_instr_add_e_ax_imm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + /* Décode une instruction de type 'add' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_add_imm8_to_rm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); +/* Décode une instruction de type 'add' (8 bits). */ +asm_x86_instr *x86_read_instr_add_r8_rm8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + /* Décode une instruction de type 'add' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_add_r1632_rm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); @@ -55,6 +67,9 @@ asm_x86_instr *x86_read_instr_add_rm1632_imm1632(const uint8_t *, off_t *, off_t /* Décode une instruction de type 'add' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_add_rm1632_r1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); +/* Décode une instruction de type 'and' (8 bits). */ +asm_x86_instr *x86_read_instr_and_rm8_r8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + /* Décode une instruction de type 'and' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_and_rm1632_with_imm8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); @@ -169,6 +184,12 @@ asm_x86_instr *x86_read_instr_nop(const uint8_t *, off_t *, off_t, uint64_t, con /* Décode une instruction de type 'not' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_not_rm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); +/* Décode une instruction de type 'or al, ...' (8 bits). */ +asm_x86_instr *x86_read_instr_or_al_imm8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + +/* Décode une instruction de type 'or' (8 bits). */ +asm_x86_instr *x86_read_instr_or_r8_rm8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + /* Décode une instruction de type 'or' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_or_rm1632_with_imm8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); @@ -235,6 +256,9 @@ asm_x86_instr *x86_read_instr_sub_imm8_from_rm1632(const uint8_t *, off_t *, off /* Décode une instruction de type 'sub' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_sub_r1632_from_rm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); +/* Décode une instruction de type 'sub' (8 bits). */ +asm_x86_instr *x86_read_instr_sub_r8_rm8(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); + /* Décode une instruction de type 'sub' (16 ou 32 bits). */ asm_x86_instr *x86_read_instr_sub_rm1632_imm1632(const uint8_t *, off_t *, off_t, uint64_t, const asm_x86_processor *); |