summaryrefslogtreecommitdiff
path: root/src/arch/x86/opcodes.h
diff options
context:
space:
mode:
authorCyrille Bagard <nocbos@gmail.com>2009-10-11 13:40:13 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2009-10-11 13:40:13 (GMT)
commit4145d0d7051f12b1a59d5728d6d2609e598e01f6 (patch)
tree2b31b17f9567cf5de1a50f9bf73a1cb6106c7709 /src/arch/x86/opcodes.h
parentba83d7ea7338945c817bc28aa94a41947f2472a1 (diff)
Supported new opcodes and new kind of operands (m(8|16|32)).
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@130 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/opcodes.h')
-rw-r--r--src/arch/x86/opcodes.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h
index e45b107..16ace49 100644
--- a/src/arch/x86/opcodes.h
+++ b/src/arch/x86/opcodes.h
@@ -267,9 +267,15 @@ GArchInstruction *x86_read_instr_mov_rm1632_r1632(const bin_t *, off_t *, off_t,
/* Décode une instruction de type 'mov' (8 bits). */
GArchInstruction *x86_read_instr_mov_rm8_r8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'movs' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_movs_m1632_m1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'movsx' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_movsx_r1632_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'movsx' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_movsx_r1632_rm1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'movzx' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_movzx_r1632_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
@@ -366,6 +372,9 @@ GArchInstruction *x86_read_instr_shl_rm1632_imm8(const bin_t *, off_t *, off_t,
/* Décode une instruction de type 'shr' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_shr_rm1632_imm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'stos' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_stos_m1632_e_ax(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'sub al, ...' (8 bits). */
GArchInstruction *x86_read_instr_sub_al_imm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);