diff options
-rw-r--r-- | ChangeLog | 28 | ||||
-rw-r--r-- | src/arch/x86/Makefile.am | 2 | ||||
-rw-r--r-- | src/arch/x86/instruction.c | 10 | ||||
-rw-r--r-- | src/arch/x86/instruction.h | 6 | ||||
-rw-r--r-- | src/arch/x86/op_movs.c | 66 | ||||
-rw-r--r-- | src/arch/x86/op_movsx.c | 36 | ||||
-rw-r--r-- | src/arch/x86/op_stos.c | 66 | ||||
-rw-r--r-- | src/arch/x86/opcodes.h | 9 | ||||
-rw-r--r-- | src/arch/x86/operand.c | 165 | ||||
-rw-r--r-- | src/arch/x86/operand.h | 37 | ||||
-rw-r--r-- | src/arch/x86/processor.c | 14 |
11 files changed, 435 insertions, 4 deletions
@@ -1,3 +1,31 @@ +09-10-11 Cyrille Bagard <nocbos@gmail.com> + + * src/arch/x86/instruction.c: + * src/arch/x86/instruction.h: + Support extra opcodes. + + * src/arch/x86/Makefile.am: + Add op_movs.c and op_stos.c to libarchx86_la_SOURCES. + + * src/arch/x86/opcodes.h: + Support extra opcodes. + + * src/arch/x86/operand.c: + * src/arch/x86/operand.h: + Support a new kind of operands: m(8|16|32). + + * src/arch/x86/op_movs.c: + New entry: add support for the movs opcode. + + * src/arch/x86/op_movsx.c: + Support extra opcodes. + + * src/arch/x86/op_stos.c: + New entry: add support for the stos opcode. + + * src/arch/x86/processor.c: + Support extra opcodes. + 09-10-08 Cyrille Bagard <nocbos@gmail.com> * src/format/elf/elf_def.h: diff --git a/src/arch/x86/Makefile.am b/src/arch/x86/Makefile.am index 2fd5cd7..5c684e2 100644 --- a/src/arch/x86/Makefile.am +++ b/src/arch/x86/Makefile.am @@ -17,6 +17,7 @@ libarchx86_la_SOURCES = \ op_lea.c \ op_leave.c \ op_mov.c \ + op_movs.c \ op_movsx.c \ op_movzx.c \ op_mul.c \ @@ -36,6 +37,7 @@ libarchx86_la_SOURCES = \ op_set.c \ op_shl.c \ op_shr.c \ + op_stos.c \ op_sub.c \ op_test.c \ op_xchg.c \ diff --git a/src/arch/x86/instruction.c b/src/arch/x86/instruction.c index 72143ee..3e47d13 100644 --- a/src/arch/x86/instruction.c +++ b/src/arch/x86/instruction.c @@ -112,6 +112,7 @@ static x86_instruction _instructions[XOP_COUNT] = { [XOP_MOVZX_R1632_RM8] = { false, 0xb6, IDX_TO_EXT(-1), "movzx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE }, [XOP_MOVSX_R1632_RM8] = { false, 0xbe, IDX_TO_EXT(-1), "movsx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE }, + [XOP_MOVSX_R1632_RM1632] = { false, 0xbf, IDX_TO_EXT(-1), "movsx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE }, [XOP_ADC_RM8_R8] = { false, 0x10, IDX_TO_EXT(-1), "adc", XPX_NONE }, @@ -266,9 +267,12 @@ static x86_instruction _instructions[XOP_COUNT] = { [XOP_MOV_MOFFS1632_E_AX] = { false, 0xa3, IDX_TO_EXT(-1), "mov", XPX_OPERAND_SIZE_OVERRIDE }, + [XOP_MOVS_M1632_M1632] = { false, 0xa5, IDX_TO_EXT(-1), "movs", XPX_OPERAND_SIZE_OVERRIDE }, + [XOP_TEST_AL_IMM8] = { false, 0xa8, IDX_TO_EXT(-1), "test", XPX_NONE }, [XOP_TEST_E_AX_IMM1632] = { false, 0xa9, IDX_TO_EXT(-1), "test", XPX_OPERAND_SIZE_OVERRIDE }, + [XOP_STOS_M1632_E_AX] = { false, 0xab, IDX_TO_EXT(-1), "stos", XPX_OPERAND_SIZE_OVERRIDE }, [XOP_SCAS_AL_M8] = { false, 0xae, IDX_TO_EXT(-1), "scas", XPX_NONE }, @@ -521,6 +525,7 @@ X86Opcodes x86_guess_next_instruction(const bin_t *data, off_t pos, off_t len, X *prefix |= XPX_OPERAND_SIZE_OVERRIDE; break; case 0xf2: + case 0xf3: pos++; extra |= XPX_REPEAT_STRING_OPERATION; break; @@ -583,8 +588,11 @@ static const char *x86_get_instruction_text(const GX86Instruction *instr, const result = strdup(_instructions[instr->type].keyword); + /* FIXME : + http://www.intel.com/software/products/documentation/vlin/mergedprojects/analyzer_ec/mergedprojects/reference_olh/mergedProjects/instructions/instruct32_hh/vc276.htm + */ if (instr->prefixes & XPX_REPEAT_STRING_OPERATION) - result = strprep(result, "repnz "); + result = strprep(result, "rep "/*"repnz "*/); return result; diff --git a/src/arch/x86/instruction.h b/src/arch/x86/instruction.h index de5f124..0db591f 100644 --- a/src/arch/x86/instruction.h +++ b/src/arch/x86/instruction.h @@ -62,6 +62,7 @@ typedef enum _X86Opcodes XOP_MOVZX_R1632_RM8, /* movzx ([0x66] 0x0f 0xb6) */ XOP_MOVSX_R1632_RM8, /* movsx ([0x66] 0x0f 0xbe) */ + XOP_MOVSX_R1632_RM1632, /* movsx ([0x66] 0x0f 0xbf) */ XOP_ADC_RM8_R8, /* adc (0x10) */ @@ -208,9 +209,14 @@ typedef enum _X86Opcodes XOP_MOV_MOFFS1632_E_AX, /* mov ([0x66] 0xa3) */ + + XOP_MOVS_M1632_M1632, /* movs ([0x66] 0xa5) */ + XOP_TEST_AL_IMM8, /* test (0xa8) */ XOP_TEST_E_AX_IMM1632, /* test ([0x66] 0xa9) */ + XOP_STOS_M1632_E_AX, /* stos ([0x66] 0xab) */ + XOP_SCAS_AL_M8, /* scas (0xae) */ diff --git a/src/arch/x86/op_movs.c b/src/arch/x86/op_movs.c new file mode 100644 index 0000000..64c8685 --- /dev/null +++ b/src/arch/x86/op_movs.c @@ -0,0 +1,66 @@ + +/* OpenIDA - Outil d'analyse de fichiers binaires + * op_movs.c - décodage des déplacements de données + * + * Copyright (C) 2009 Cyrille Bagard + * + * This file is part of OpenIDA. + * + * OpenIDA is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * OpenIDA is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +#include <malloc.h> + + +#include "../instruction-int.h" +#include "opcodes.h" +#include "operand.h" + + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'movs' (16 ou 32 bits). * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *x86_read_instr_movs_m1632_m1632(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + AsmOperandSize oprsize; /* Taille des opérandes */ + + result = g_x86_instruction_new(XOP_MOVS_M1632_M1632); + + oprsize = g_x86_processor_get_operand_size(proc, prefix); + + if (!x86_read_two_operands(result, data, pos, len, X86_OTP_DST_1632, X86_OTP_SRC_1632, oprsize)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} diff --git a/src/arch/x86/op_movsx.c b/src/arch/x86/op_movsx.c index 74b1b0b..7e8a09b 100644 --- a/src/arch/x86/op_movsx.c +++ b/src/arch/x86/op_movsx.c @@ -64,3 +64,39 @@ GArchInstruction *x86_read_instr_movsx_r1632_rm8(const bin_t *data, off_t *pos, return result; } + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'movsx' (16 ou 32 bits). * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *x86_read_instr_movsx_r1632_rm1632(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + AsmOperandSize oprsize; /* Taille des opérandes */ + + result = g_x86_instruction_new(XOP_MOVSX_R1632_RM1632); + + oprsize = g_x86_processor_get_operand_size(proc, prefix); + + if (!x86_read_two_operands(result, data, pos, len, X86_OTP_R1632, X86_OTP_RM1632, oprsize)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} diff --git a/src/arch/x86/op_stos.c b/src/arch/x86/op_stos.c new file mode 100644 index 0000000..bf47ee7 --- /dev/null +++ b/src/arch/x86/op_stos.c @@ -0,0 +1,66 @@ + +/* OpenIDA - Outil d'analyse de fichiers binaires + * op_stos.c - décodage des enregistrements de données + * + * Copyright (C) 2009 Cyrille Bagard + * + * This file is part of OpenIDA. + * + * OpenIDA is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * OpenIDA is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +#include <malloc.h> + + +#include "../instruction-int.h" +#include "opcodes.h" +#include "operand.h" + + + +/****************************************************************************** +* * +* Paramètres : data = flux de données à analyser. * +* pos = position courante dans ce flux. [OUT] * +* len = taille totale des données à analyser. * +* addr = adresse virtuelle de l'instruction. * +* proc = architecture ciblée par le désassemblage. * +* * +* Description : Décode une instruction de type 'stos' (16 ou 32 bits). * +* * +* Retour : Instruction mise en place ou NULL. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchInstruction *x86_read_instr_stos_m1632_e_ax(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc) +{ + GArchInstruction *result; /* Instruction à retourner */ + AsmOperandSize oprsize; /* Taille des opérandes */ + + result = g_x86_instruction_new(XOP_STOS_M1632_E_AX); + + oprsize = g_x86_processor_get_operand_size(proc, prefix); + + if (!x86_read_two_operands(result, data, pos, len, X86_OTP_DST_1632, X86_OTP_E_AX, oprsize)) + { + /* TODO free(result);*/ + return NULL; + } + + return result; + +} diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h index e45b107..16ace49 100644 --- a/src/arch/x86/opcodes.h +++ b/src/arch/x86/opcodes.h @@ -267,9 +267,15 @@ GArchInstruction *x86_read_instr_mov_rm1632_r1632(const bin_t *, off_t *, off_t, /* Décode une instruction de type 'mov' (8 bits). */ GArchInstruction *x86_read_instr_mov_rm8_r8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); +/* Décode une instruction de type 'movs' (16 ou 32 bits). */ +GArchInstruction *x86_read_instr_movs_m1632_m1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); + /* Décode une instruction de type 'movsx' (16 ou 32 bits). */ GArchInstruction *x86_read_instr_movsx_r1632_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); +/* Décode une instruction de type 'movsx' (16 ou 32 bits). */ +GArchInstruction *x86_read_instr_movsx_r1632_rm1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); + /* Décode une instruction de type 'movzx' (16 ou 32 bits). */ GArchInstruction *x86_read_instr_movzx_r1632_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); @@ -366,6 +372,9 @@ GArchInstruction *x86_read_instr_shl_rm1632_imm8(const bin_t *, off_t *, off_t, /* Décode une instruction de type 'shr' (16 ou 32 bits). */ GArchInstruction *x86_read_instr_shr_rm1632_imm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); +/* Décode une instruction de type 'stos' (16 ou 32 bits). */ +GArchInstruction *x86_read_instr_stos_m1632_e_ax(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); + /* Décode une instruction de type 'sub al, ...' (8 bits). */ GArchInstruction *x86_read_instr_sub_al_imm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *); diff --git a/src/arch/x86/operand.c b/src/arch/x86/operand.c index d0e923f..09a3489 100644 --- a/src/arch/x86/operand.c +++ b/src/arch/x86/operand.c @@ -191,6 +191,38 @@ static void g_x86_moffs_operand_add_to_gtk_buffer(const GX86MOffsOperand *, cons +/* ---------------------- OPERANDES DE MANIPULATION DE DONNEES ---------------------- */ + + +/* Définition d'un opérande x86 de manipulation de données (instance) */ +struct _GX86DataOperand +{ + GX86Operand parent; /* Instance parente */ + + GX86Register *reg; /* Registre représenté */ + bool dest; /* Déduction du type de segment*/ + +}; + +/* Définition d'un opérande x86 de manipulation de données (classe) */ +struct _GX86DataOperandClass +{ + GX86OperandClass parent; /* Classe parente */ + +}; + + +/* Initialise la classe des opérandes x86 pointant des données. */ +static void g_x86_data_operand_class_init(GX86DataOperandClass *); + +/* Initialise une instance d'opérande x86 pointant des données. */ +static void g_x86_data_operand_init(GX86DataOperand *); + +/* Ajoute à un texte GTK le contenu d'un opérande. */ +static void g_x86_data_operand_add_to_gtk_buffer(const GX86DataOperand *, const GExeFormat *, AsmSyntax, GtkTextBuffer *, GtkTextIter *); + + + /* ---------------------------------------------------------------------------------- */ /* COQUILLE VIDE POUR LES OPERANDES X86 */ /* ---------------------------------------------------------------------------------- */ @@ -987,6 +1019,121 @@ static void g_x86_moffs_operand_add_to_gtk_buffer(const GX86MOffsOperand *operan /* ---------------------------------------------------------------------------------- */ +/* OPERANDES DE MANIPULATION DE DONNEES */ +/* ---------------------------------------------------------------------------------- */ + + +/* Indique le type défini par la GLib pour un opérande x86 de manipulation de données. */ +G_DEFINE_TYPE(GX86DataOperand, g_x86_data_operand, G_TYPE_X86_OPERAND); + + +/****************************************************************************** +* * +* Paramètres : klass = classe à initialiser. * +* * +* Description : Initialise la classe des opérandes x86 pointant des données. * +* * +* Retour : - * +* * +* Remarques : - * +* * +******************************************************************************/ + +static void g_x86_data_operand_class_init(GX86DataOperandClass *klass) +{ + +} + + +/****************************************************************************** +* * +* Paramètres : operand = instance à initialiser. * +* * +* Description : Initialise une instance d'opérande pointant des données. * +* * +* Retour : - * +* * +* Remarques : - * +* * +******************************************************************************/ + +static void g_x86_data_operand_init(GX86DataOperand *operand) +{ + GContentExporter *parent; /* Instance parente */ + + parent = G_CONTENT_EXPORTER(operand); + + parent->add_arch_to_gtk_buffer = (add_arch_to_gtk_buffer_fc)g_x86_data_operand_add_to_gtk_buffer; + +} + + +/****************************************************************************** +* * +* Paramètres : size = taille de l'opérande, et donc du registre. * +* dest = indique si la cible est une destination ou une source.* +* * +* Description : Crée un opérande x86 de manipulation de données. * +* * +* Retour : Opérande mis en place. * +* * +* Remarques : - * +* * +******************************************************************************/ + +GArchOperand *g_x86_data_operand_new(MemoryDataSize size, bool dest) +{ + GX86DataOperand *result; /* Structure à retourner */ + + result = g_object_new(G_TYPE_X86_DATA_OPERAND, NULL); + + result->reg = g_x86_register_new(size, dest ? 0x07 : 0x06); + result->dest = dest; + + return G_ARCH_OPERAND(result); + +} + + +/****************************************************************************** +* * +* Paramètres : operand = opérande à transcrire. * +* format = format du binaire manipulé. * +* syntax = type de représentation demandée. * +* buffer = zone de texte à venir compléter. * +* iter = point d'insertion du nouveau texte. * +* * +* Description : Ajoute à un texte GTK le contenu d'un opérande. * +* * +* Retour : - * +* * +* Remarques : - * +* * +******************************************************************************/ + +static void g_x86_data_operand_add_to_gtk_buffer(const GX86DataOperand *operand, const GExeFormat *format, AsmSyntax syntax, GtkTextBuffer *buffer, GtkTextIter *iter) +{ + if (operand->dest) + g_content_exporter_insert_with_gtk_tag(G_CONTENT_EXPORTER(operand), buffer, iter, + "es:", 3, RTT_SEGMENT); + else + g_content_exporter_insert_with_gtk_tag(G_CONTENT_EXPORTER(operand), buffer, iter, + "ds:", 3, RTT_SEGMENT); + + g_content_exporter_insert_with_gtk_tag(G_CONTENT_EXPORTER(operand), buffer, iter, + "[", 1, RTT_HOOK); + + g_content_exporter_add_arch_to_gtk_buffer(G_CONTENT_EXPORTER(operand->reg), format, + syntax, buffer, iter); + + g_content_exporter_insert_with_gtk_tag(G_CONTENT_EXPORTER(operand), buffer, iter, + "]", 1, RTT_HOOK); + +} + + + +/* ---------------------------------------------------------------------------------- */ /* AIDE A LA CREATION D'OPERANDES */ /* ---------------------------------------------------------------------------------- */ @@ -1138,6 +1285,24 @@ bool _x86_read_operands(GArchInstruction *instr, const bin_t *data, off_t *pos, op = g_x86_mod_rm_operand_new(data, &op_pos[i], len, oprsize); break; + case X86_OTP_DST_8: + op = g_x86_data_operand_new(MDS_8_BITS, true); + break; + + case X86_OTP_DST_1632: + if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize); + op = g_x86_data_operand_new(oprsize == AOS_32_BITS ? MDS_32_BITS : MDS_16_BITS, true); + break; + + case X86_OTP_SRC_8: + op = g_x86_data_operand_new(MDS_8_BITS, false); + break; + + case X86_OTP_SRC_1632: + if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize); + op = g_x86_data_operand_new(oprsize == AOS_32_BITS ? MDS_32_BITS : MDS_16_BITS, false); + break; + case X86_OTP_CL: op = g_x86_register_operand_new_from_index(0x01, AOS_8_BITS); break; diff --git a/src/arch/x86/operand.h b/src/arch/x86/operand.h index fc40b38..2d8232d 100644 --- a/src/arch/x86/operand.h +++ b/src/arch/x86/operand.h @@ -169,6 +169,30 @@ GArchOperand *g_x86_moffs_operand_new(const bin_t *, off_t *, off_t, AsmOperandS +/* ---------------------- OPERANDES DE MANIPULATION DE DONNEES ---------------------- */ + + +#define G_TYPE_X86_DATA_OPERAND g_x86_data_operand_get_type() +#define G_X86_DATA_OPERAND(obj) (G_TYPE_CHECK_INSTANCE_CAST((obj), g_x86_data_operand_get_type(), GX86DataOperand)) +#define G_IS_X86_DATA_OPERAND(obj) (G_TYPE_CHECK_INSTANCE_TYPE((obj), g_x86_data_operand_get_type())) +#define G_X86_DATA_OPERAND_GET_IFACE(inst) (G_TYPE_INSTANCE_GET_INTERFACE((inst), g_x86_data_operand_get_type(), GX86DataOperandIface)) + + +/* Définition d'un opérande x86 de manipulation de données (instance) */ +typedef struct _GX86DataOperand GX86DataOperand; + +/* Définition d'un opérande x86 de manipulation de données (classe) */ +typedef struct _GX86DataOperandClass GX86DataOperandClass; + + +/* Indique le type défini par la GLib pour un opérande x86 de manipulation de données. */ +GType g_x86_data_operand_get_type(void); + +/* Crée un opérande x86 de manipulation de données. */ +GArchOperand *g_x86_data_operand_new(MemoryDataSize, bool); + + + /* ------------------------- AIDE A LA CREATION D'OPERANDES ------------------------- */ @@ -177,10 +201,12 @@ GArchOperand *g_x86_moffs_operand_new(const bin_t *, off_t *, off_t, AsmOperandS #define X86_OTP_IMM_TYPE 0x8000 #define X86_OTP_REG_TYPE 0x4000 #define X86_OTP_RM_TYPE 0x2000 +#define X86_OTP_DATA_TYPE 0x1000 -#define X86_OTP_IMM(b) X86_OTP_IMM_TYPE | (1 << b) -#define X86_OTP_REG(b) X86_OTP_REG_TYPE | (1 << b) -#define X86_OTP_RM(b) X86_OTP_RM_TYPE | (1 << b) +#define X86_OTP_IMM(b) X86_OTP_IMM_TYPE | (1 << b) +#define X86_OTP_REG(b) X86_OTP_REG_TYPE | (1 << b) +#define X86_OTP_RM(b) X86_OTP_RM_TYPE | (1 << b) +#define X86_OTP_DATA(b) X86_OTP_DATA_TYPE | (1 << b) /* Types d'opérandes supportés */ typedef enum _X86OperandType @@ -200,6 +226,11 @@ typedef enum _X86OperandType X86_OTP_RM8 = X86_OTP_RM(1), /* Registre 8 bits ou mémoire */ X86_OTP_RM1632 = X86_OTP_RM(2), /* Registre 16/32b ou mémoire */ + X86_OTP_DST_8 = X86_OTP_DATA(1), /* Emplacement sur 8 bits */ + X86_OTP_DST_1632 = X86_OTP_DATA(2), /* Emplacement sur 16/32 bits */ + X86_OTP_SRC_8 = X86_OTP_DATA(3), /* Emplacement sur 8 bits */ + X86_OTP_SRC_1632 = X86_OTP_DATA(4), /* Emplacement sur 16/32 bits */ + X86_OTP_CL = 0x0ffd, /* Registre cl */ X86_OTP_AL = 0x0ffe, /* Registre al */ X86_OTP_E_AX = 0x0fff /* Registre eax ou ax */ diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c index 3dc5fc2..97cdb78 100644 --- a/src/arch/x86/processor.c +++ b/src/arch/x86/processor.c @@ -299,6 +299,10 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor result = x86_read_instr_movsx_r1632_rm8(data, pos, len, addr, prefix, proc); break; + case XOP_MOVSX_R1632_RM1632: + result = x86_read_instr_movsx_r1632_rm1632(data, pos, len, addr, prefix, proc); + break; + @@ -659,6 +663,11 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor + case XOP_MOVS_M1632_M1632: + result = x86_read_instr_movs_m1632_m1632(data, pos, len, addr, prefix, proc); + break; + + case XOP_TEST_AL_IMM8: result = x86_read_instr_test_al_imm8(data, pos, len, addr, prefix, proc); break; @@ -668,6 +677,11 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor break; + case XOP_STOS_M1632_E_AX: + result = x86_read_instr_stos_m1632_e_ax(data, pos, len, addr, prefix, proc); + break; + + case XOP_SCAS_AL_M8: result = x86_read_instr_scas_al_m8(data, pos, len, addr, prefix, proc); break; |