5 files changed, 289 insertions, 0 deletions
diff --git a/plugins/arm/v7/opcodes/Makefile.am b/plugins/arm/v7/opcodes/Makefile.am
new file mode 100644
index 0000000..a169c2b
--- /dev/null
+++ b/plugins/arm/v7/opcodes/Makefile.am
@@ -0,0 +1,26 @@
+
+# Initialement, ce Makefile est conçu sans définition de am__depfiles_maybe.
+# Est-ce parce que GENERATED_FILES est vide et qu'il n'y a donc pas de code
+# source ? En tout cas, au premier écrasement de gencode.mk, tous les fichiers
+# sont regénérés, et am__depfiles_maybe apparaît enfin. Mais trop tard :
+# des fichiers .Plo sont attendus mais non créés par l'ancien Makefile.
+# On force les choses ici.
+am__depfiles_maybe = depfiles
+
+include gencode.mk
+
+noinst_LTLIBRARIES = libarmv7opcodes.la
+
+libarmv7opcodes_la_SOURCES = $(GENERATED_FILES)
+
+libarmv7opcodes_la_LIBADD =
+
+libarmv7opcodes_la_CFLAGS = $(AM_CFLAGS)
+
+
+AM_CPPFLAGS = $(LIBGTK_CFLAGS) $(LIBXML_CFLAGS)
+
+AM_CFLAGS = $(DEBUG_CFLAGS) $(WARNING_FLAGS) $(COMPLIANCE_FLAGS) -I$(top_srcdir)/src
+
+
+EXTRA_DIST = opcodes_tmp_arm.h opcodes_tmp_simd.h opcodes_tmp_thumb_16.h opcodes_tmp_thumb_32.h
diff --git a/plugins/arm/v7/opcodes/opcodes_tmp_arm.h b/plugins/arm/v7/opcodes/opcodes_tmp_arm.h
new file mode 100644
index 0000000..4106cbd
--- /dev/null
+++ b/plugins/arm/v7/opcodes/opcodes_tmp_arm.h
@@ -0,0 +1,56 @@
+#ifndef arm_def_tmp_h
+#define arm_def_tmp_h
+#define armv7_read_arm_instr_cps_arm(r) NULL
+#define armv7_read_arm_instr_eret(r) NULL
+#define armv7_read_arm_instr_hvc(r) NULL
+#define armv7_read_arm_instr_isb(r) NULL
+#define armv7_read_arm_instr_ldc_ldc2_immediate(r) NULL
+#define armv7_read_arm_instr_ldc_ldc2_literal(r) NULL
+#define armv7_read_arm_instr_ldmda_ldmfa(r) NULL
+#define armv7_read_arm_instr_ldmdb_ldmea(r) NULL
+#define armv7_read_arm_instr_ldm_exception_return(r) NULL
+#define armv7_read_arm_instr_ldmib_ldmed(r) NULL
+#define armv7_read_arm_instr_ldm_ldmia_ldmfd_arm(r) NULL
+#define armv7_read_arm_instr_ldm_user_registers(r) NULL
+#define armv7_read_arm_instr_mrs(r) NULL
+#define armv7_read_arm_instr_mrs_banked_register(r) NULL
+#define armv7_read_arm_instr_msr_banked_register(r) NULL
+#define armv7_read_arm_instr_msr_immediate_a8(r) NULL
+#define armv7_read_arm_instr_msr_immediate_b9(r) NULL
+#define armv7_read_arm_instr_msr_register_a8(r) NULL
+#define armv7_read_arm_instr_msr_register_b9(r) NULL
+#define armv7_read_arm_instr_pkh(r) NULL
+#define armv7_read_arm_instr_pld_literal(r) NULL
+#define armv7_read_arm_instr_pld_pldw_immediate(r) NULL
+#define armv7_read_arm_instr_pld_pldw_register(r) NULL
+#define armv7_read_arm_instr_pli_immediate_literal(r) NULL
+#define armv7_read_arm_instr_pli_register(r) NULL
+#define armv7_read_arm_instr_rfe(r) NULL
+#define armv7_read_arm_instr_smc_previously_smi(r) NULL
+#define armv7_read_arm_instr_smlabb_smlabt_smlatb_smlatt(r) NULL
+#define armv7_read_arm_instr_smlalbb_smlalbt_smlaltb_smlaltt(r) NULL
+#define armv7_read_arm_instr_smlawb_smlawt(r) NULL
+#define armv7_read_arm_instr_smulbb_smulbt_smultb_smultt(r) NULL
+#define armv7_read_arm_instr_smulwb_smulwt(r) NULL
+#define armv7_read_arm_instr_smusd(r) NULL
+#define armv7_read_arm_instr_srs_arm(r) NULL
+#define armv7_read_arm_instr_ssat(r) NULL
+#define armv7_read_arm_instr_ssat16(r) NULL
+#define armv7_read_arm_instr_ssax(r) NULL
+#define armv7_read_arm_instr_ssub16(r) NULL
+#define armv7_read_arm_instr_ssub8(r) NULL
+#define armv7_read_arm_instr_stc_stc2(r) NULL
+#define armv7_read_arm_instr_stmda_stmed(r) NULL
+#define armv7_read_arm_instr_stmdb_stmfd(r) NULL
+#define armv7_read_arm_instr_stmib_stmfa(r) NULL
+#define armv7_read_arm_instr_stm_stmia_stmea(r) NULL
+#define armv7_read_arm_instr_stm_user_registers(r) NULL
+#define armv7_read_arm_instr_sub_register_shifted_register(r) NULL
+#define armv7_read_arm_instr_sxtab(r) NULL
+#define armv7_read_arm_instr_sxtab16(r) NULL
+#define armv7_read_arm_instr_sxtah(r) NULL
+#define armv7_read_arm_instr_sxtb(r) NULL
+#define armv7_read_arm_instr_sxtb16(r) NULL
+#define armv7_read_arm_instr_sxth(r) NULL
+#define armv7_read_arm_instr_wfe(r) NULL
+#endif
diff --git a/plugins/arm/v7/opcodes/opcodes_tmp_simd.h b/plugins/arm/v7/opcodes/opcodes_tmp_simd.h
new file mode 100644
index 0000000..1d7023e
--- /dev/null
+++ b/plugins/arm/v7/opcodes/opcodes_tmp_simd.h
@@ -0,0 +1,138 @@
+#ifndef simd_def_tmp_h
+#define simd_def_tmp_h
+#define armv7_read_simd_instr_vaba_vabal(r, a) NULL
+#define armv7_read_simd_instr_vabd_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vabd_vabdl_integer(r, a) NULL
+#define armv7_read_simd_instr_vabs(r, a) NULL
+#define armv7_read_simd_instr_vacge_vacgt_vacle_vaclt(r, a) NULL
+#define armv7_read_simd_instr_vadd_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vaddhn(r, a) NULL
+#define armv7_read_simd_instr_vadd_integer(r, a) NULL
+#define armv7_read_simd_instr_vaddl_vaddw(r, a) NULL
+#define armv7_read_simd_instr_vand_register(r, a) NULL
+#define armv7_read_simd_instr_vbic_immediate(r, a) NULL
+#define armv7_read_simd_instr_vbic_register(r, a) NULL
+#define armv7_read_simd_instr_vbif_vbit_vbsl(r, a) NULL
+#define armv7_read_simd_instr_vceq_immediate_0(r, a) NULL
+#define armv7_read_simd_instr_vceq_register(r, a) NULL
+#define armv7_read_simd_instr_vcge_immediate_0(r, a) NULL
+#define armv7_read_simd_instr_vcge_register(r, a) NULL
+#define armv7_read_simd_instr_vcgt_immediate_0(r, a) NULL
+#define armv7_read_simd_instr_vcgt_register(r, a) NULL
+#define armv7_read_simd_instr_vcle_immediate_0(r, a) NULL
+#define armv7_read_simd_instr_vcls(r, a) NULL
+#define armv7_read_simd_instr_vclt_immediate_0(r, a) NULL
+#define armv7_read_simd_instr_vclz(r, a) NULL
+#define armv7_read_simd_instr_vcmp_vcmpe(r, a) NULL
+#define armv7_read_simd_instr_vcnt(r, a) NULL
+#define armv7_read_simd_instr_vcvt_between_double_precision_and_single_precision(r, a) NULL
+#define armv7_read_simd_instr_vcvt_between_floating_point_and_fixed_point_advanced_simd(r, a) NULL
+#define armv7_read_simd_instr_vcvt_between_floating_point_and_fixed_point_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vcvtb_vcvtt(r, a) NULL
+#define armv7_read_simd_instr_vcvt_vcvtr_between_floating_point_and_integer_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vdiv(r, a) NULL
+#define armv7_read_simd_instr_vdup_arm_core_register(r, a) NULL
+#define armv7_read_simd_instr_vdup_scalar(r, a) NULL
+#define armv7_read_simd_instr_veor(r, a) NULL
+#define armv7_read_simd_instr_vext(r, a) NULL
+#define armv7_read_simd_instr_vfma_vfms(r, a) NULL
+#define armv7_read_simd_instr_vfnma_vfnms(r, a) NULL
+#define armv7_read_simd_instr_vhadd_vhsub(r, a) NULL
+#define armv7_read_simd_instr_vld1_multiple_single_elements(r, a) NULL
+#define armv7_read_simd_instr_vld1_single_element_to_all_lanes(r, a) NULL
+#define armv7_read_simd_instr_vld1_single_element_to_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vld2_multiple_2_element_structures(r, a) NULL
+#define armv7_read_simd_instr_vld2_single_2_element_structure_to_all_lanes(r, a) NULL
+#define armv7_read_simd_instr_vld2_single_2_element_structure_to_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vld3_multiple_3_element_structures(r, a) NULL
+#define armv7_read_simd_instr_vld3_single_3_element_structure_to_all_lanes(r, a) NULL
+#define armv7_read_simd_instr_vld3_single_3_element_structure_to_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vld4_multiple_4_element_structures(r, a) NULL
+#define armv7_read_simd_instr_vld4_single_4_element_structure_to_all_lanes(r, a) NULL
+#define armv7_read_simd_instr_vld4_single_4_element_structure_to_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vldm(r, a) NULL
+#define armv7_read_simd_instr_vldr(r, a) NULL
+#define armv7_read_simd_instr_vmax_vmin_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vmax_vmin_integer(r, a) NULL
+#define armv7_read_simd_instr_vmla_vmlal_vmls_vmlsl_by_scalar(r, a) NULL
+#define armv7_read_simd_instr_vmla_vmlal_vmls_vmlsl_integer(r, a) NULL
+#define armv7_read_simd_instr_vmla_vmls_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vmov_arm_core_register_to_scalar(r, a) NULL
+#define armv7_read_simd_instr_vmov_between_arm_core_register_and_single_precision_register(r, a) NULL
+#define armv7_read_simd_instr_vmov_between_two_arm_core_registers_and_a_doubleword_extension_register(r, a) NULL
+#define armv7_read_simd_instr_vmov_between_two_arm_core_registers_and_two_single_precision_registers(r, a) NULL
+#define armv7_read_simd_instr_vmov_immediate(r, a) NULL
+#define armv7_read_simd_instr_vmovl(r, a) NULL
+#define armv7_read_simd_instr_vmov_register(r, a) NULL
+#define armv7_read_simd_instr_vmov_scalar_to_arm_core_register(r, a) NULL
+#define armv7_read_simd_instr_vmrs(r, a) NULL
+#define armv7_read_simd_instr_vmrs_b9(r, a) NULL
+#define armv7_read_simd_instr_vmsr(r, a) NULL
+#define armv7_read_simd_instr_vmsr_b9(r, a) NULL
+#define armv7_read_simd_instr_vmul_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vmul_vmull_by_scalar(r, a) NULL
+#define armv7_read_simd_instr_vmul_vmull_integer_and_polynomial(r, a) NULL
+#define armv7_read_simd_instr_vmvn_immediate(r, a) NULL
+#define armv7_read_simd_instr_vmvn_register(r, a) NULL
+#define armv7_read_simd_instr_vneg(r, a) NULL
+#define armv7_read_simd_instr_vnmla_vnmls_vnmul(r, a) NULL
+#define armv7_read_simd_instr_vorn_register(r, a) NULL
+#define armv7_read_simd_instr_vorr_immediate(r, a) NULL
+#define armv7_read_simd_instr_vorr_register(r, a) NULL
+#define armv7_read_simd_instr_vpadal(r, a) NULL
+#define armv7_read_simd_instr_vpadd_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vpadd_integer(r, a) NULL
+#define armv7_read_simd_instr_vpaddl(r, a) NULL
+#define armv7_read_simd_instr_vpmax_vpmin_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vpmax_vpmin_integer(r, a) NULL
+#define armv7_read_simd_instr_vpop(r, a) NULL
+#define armv7_read_simd_instr_vpush(r, a) NULL
+#define armv7_read_simd_instr_vqabs(r, a) NULL
+#define armv7_read_simd_instr_vqadd(r, a) NULL
+#define armv7_read_simd_instr_vqdmlal_vqdmlsl(r, a) NULL
+#define armv7_read_simd_instr_vqdmulh(r, a) NULL
+#define armv7_read_simd_instr_vqdmull(r, a) NULL
+#define armv7_read_simd_instr_vqneg(r, a) NULL
+#define armv7_read_simd_instr_vqrdmulh(r, a) NULL
+#define armv7_read_simd_instr_vqrshl(r, a) NULL
+#define armv7_read_simd_instr_vqrshrn_vqrshrun(r, a) NULL
+#define armv7_read_simd_instr_vqshl_register(r, a) NULL
+#define armv7_read_simd_instr_vqshl_vqshlu_immediate(r, a) NULL
+#define armv7_read_simd_instr_vqshrn_vqshrun(r, a) NULL
+#define armv7_read_simd_instr_vqsub(r, a) NULL
+#define armv7_read_simd_instr_vraddhn(r, a) NULL
+#define armv7_read_simd_instr_vrecps(r, a) NULL
+#define armv7_read_simd_instr_vrev16_vrev32_vrev64(r, a) NULL
+#define armv7_read_simd_instr_vrhadd(r, a) NULL
+#define armv7_read_simd_instr_vrshl(r, a) NULL
+#define armv7_read_simd_instr_vrshr(r, a) NULL
+#define armv7_read_simd_instr_vrshrn(r, a) NULL
+#define armv7_read_simd_instr_vrsqrts(r, a) NULL
+#define armv7_read_simd_instr_vrsra(r, a) NULL
+#define armv7_read_simd_instr_vrsubhn(r, a) NULL
+#define armv7_read_simd_instr_vshl_immediate(r, a) NULL
+#define armv7_read_simd_instr_vshll(r, a) NULL
+#define armv7_read_simd_instr_vshl_register(r, a) NULL
+#define armv7_read_simd_instr_vshr(r, a) NULL
+#define armv7_read_simd_instr_vshrn(r, a) NULL
+#define armv7_read_simd_instr_vsli(r, a) NULL
+#define armv7_read_simd_instr_vsqrt(r, a) NULL
+#define armv7_read_simd_instr_vsra(r, a) NULL
+#define armv7_read_simd_instr_vsri(r, a) NULL
+#define armv7_read_simd_instr_vst1_multiple_single_elements(r, a) NULL
+#define armv7_read_simd_instr_vst1_single_element_from_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vst2_multiple_2_element_structures(r, a) NULL
+#define armv7_read_simd_instr_vst2_single_2_element_structure_from_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vst3_multiple_3_element_structures(r, a) NULL
+#define armv7_read_simd_instr_vst3_single_3_element_structure_from_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vst4_multiple_4_element_structures(r, a) NULL
+#define armv7_read_simd_instr_vst4_single_4_element_structure_from_one_lane(r, a) NULL
+#define armv7_read_simd_instr_vstm(r, a) NULL
+#define armv7_read_simd_instr_vstr(r, a) NULL
+#define armv7_read_simd_instr_vsub_floating_point(r, a) NULL
+#define armv7_read_simd_instr_vsubhn(r, a) NULL
+#define armv7_read_simd_instr_vsub_integer(r, a) NULL
+#define armv7_read_simd_instr_vsubl_vsubw(r, a) NULL
+#define armv7_read_simd_instr_vtbl_vtbx(r, a) NULL
+#define armv7_read_simd_instr_vtst(r, a) NULL
+#endif
diff --git a/plugins/arm/v7/opcodes/opcodes_tmp_thumb_16.h b/plugins/arm/v7/opcodes/opcodes_tmp_thumb_16.h
new file mode 100644
index 0000000..1968037
--- /dev/null
+++ b/plugins/arm/v7/opcodes/opcodes_tmp_thumb_16.h
@@ -0,0 +1,10 @@
+#ifndef thumb_16_def_tmp_h
+#define thumb_16_def_tmp_h
+#define armv7_read_thumb_16_instr_cps_thumb(r) NULL
+#define armv7_read_thumb_16_instr_it(r) NULL
+#define armv7_read_thumb_16_instr_ldm_ldmia_ldmfd_thumb(r) NULL
+#define armv7_read_thumb_16_instr_stm_stmia_stmea(r) NULL
+#define armv7_read_thumb_16_instr_sxtb(r) NULL
+#define armv7_read_thumb_16_instr_sxth(r) NULL
+#define armv7_read_thumb_16_instr_wfe(r) NULL
+#endif
diff --git a/plugins/arm/v7/opcodes/opcodes_tmp_thumb_32.h b/plugins/arm/v7/opcodes/opcodes_tmp_thumb_32.h
new file mode 100644
index 0000000..1ed547c
--- /dev/null
+++ b/plugins/arm/v7/opcodes/opcodes_tmp_thumb_32.h
@@ -0,0 +1,59 @@
+#ifndef thumb_32_def_tmp_h
+#define thumb_32_def_tmp_h
+#define armv7_read_thumb_32_instr_b_mrs(r) NULL
+#define armv7_read_thumb_32_instr_b_msr_register(r) NULL
+#define armv7_read_thumb_32_instr_cps_thumb(r) NULL
+#define armv7_read_thumb_32_instr_enterx_leavex(r) NULL
+#define armv7_read_thumb_32_instr_eret(r) NULL
+#define armv7_read_thumb_32_instr_hvc(r) NULL
+#define armv7_read_thumb_32_instr_isb(r) NULL
+#define armv7_read_thumb_32_instr_ldc_ldc2_immediate(r) NULL
+#define armv7_read_thumb_32_instr_ldc_ldc2_literal(r) NULL
+#define armv7_read_thumb_32_instr_ldmdb_ldmea(r) NULL
+#define armv7_read_thumb_32_instr_ldm_ldmia_ldmfd_thumb(r) NULL
+#define armv7_read_thumb_32_instr_mrs(r) NULL
+#define armv7_read_thumb_32_instr_mrs_banked_register(r) NULL
+#define armv7_read_thumb_32_instr_msr_banked_register(r) NULL
+#define armv7_read_thumb_32_instr_msr_register(r) NULL
+#define armv7_read_thumb_32_instr_pkh(r) NULL
+#define armv7_read_thumb_32_instr_pld_immediate(r) NULL
+#define armv7_read_thumb_32_instr_pld_literal(r) NULL
+#define armv7_read_thumb_32_instr_pld_pldw_immediate(r) NULL
+#define armv7_read_thumb_32_instr_pld_pldw_register(r) NULL
+#define armv7_read_thumb_32_instr_pld_register(r) NULL
+#define armv7_read_thumb_32_instr_pli_immediate_literal(r) NULL
+#define armv7_read_thumb_32_instr_pli_register(r) NULL
+#define armv7_read_thumb_32_instr_rfe(r) NULL
+#define armv7_read_thumb_32_instr_smc_previously_smi(r) NULL
+#define armv7_read_thumb_32_instr_smlabb_smlabt_smlatb_smlatt(r) NULL
+#define armv7_read_thumb_32_instr_smlalbb_smlalbt_smlaltb_smlaltt(r) NULL
+#define armv7_read_thumb_32_instr_smlawb_smlawt(r) NULL
+#define armv7_read_thumb_32_instr_smulbb_smulbt_smultb_smultt(r) NULL
+#define armv7_read_thumb_32_instr_smulwb_smulwt(r) NULL
+#define armv7_read_thumb_32_instr_smusd(r) NULL
+#define armv7_read_thumb_32_instr_sqadd16(r) NULL
+#define armv7_read_thumb_32_instr_sqadd8(r) NULL
+#define armv7_read_thumb_32_instr_sqasx(r) NULL
+#define armv7_read_thumb_32_instr_sqsax(r) NULL
+#define armv7_read_thumb_32_instr_sqsub16(r) NULL
+#define armv7_read_thumb_32_instr_sqsub8(r) NULL
+#define armv7_read_thumb_32_instr_srs_thumb(r) NULL
+#define armv7_read_thumb_32_instr_ssat(r) NULL
+#define armv7_read_thumb_32_instr_ssat16(r) NULL
+#define armv7_read_thumb_32_instr_ssax(r) NULL
+#define armv7_read_thumb_32_instr_ssub16(r) NULL
+#define armv7_read_thumb_32_instr_ssub8(r) NULL
+#define armv7_read_thumb_32_instr_stc_stc2(r) NULL
+#define armv7_read_thumb_32_instr_stmdb_stmfd(r) NULL
+#define armv7_read_thumb_32_instr_stm_stmia_stmea(r) NULL
+#define armv7_read_thumb_32_instr_sub_register_thumb(r) NULL
+#define armv7_read_thumb_32_instr_subs_pc_lr_thumb(r) NULL
+#define armv7_read_thumb_32_instr_sxtab(r) NULL
+#define armv7_read_thumb_32_instr_sxtab16(r) NULL
+#define armv7_read_thumb_32_instr_sxtah(r) NULL
+#define armv7_read_thumb_32_instr_sxtb(r) NULL
+#define armv7_read_thumb_32_instr_sxtb16(r) NULL
+#define armv7_read_thumb_32_instr_sxth(r) NULL
+#define armv7_read_thumb_32_instr_tbb_tbh(r) NULL
+#define armv7_read_thumb_32_instr_wfe(r) NULL
+#endif