diff options
Diffstat (limited to 'plugins/arm/v7')
| -rw-r--r-- | plugins/arm/v7/arm.c | 26 | ||||
| -rw-r--r-- | plugins/arm/v7/thumb_32.c | 16 |
2 files changed, 21 insertions, 21 deletions
diff --git a/plugins/arm/v7/arm.c b/plugins/arm/v7/arm.c index 3081f89..6cd40bb 100644 --- a/plugins/arm/v7/arm.c +++ b/plugins/arm/v7/arm.c @@ -27,7 +27,7 @@ #include <stdint.h> -#include <arch/undefined.h> +#include <arch/instructions/undefined.h> #include <common/bconst.h> @@ -2060,7 +2060,7 @@ static GArchInstruction *process_armv7_arm_coprocessor_instructions_and_supervis op = (raw >> 4) & 0x1; if ((op1 & b111110) == b000000) - result = g_undef_instruction_new(IBS_UNDEFINED); + result = g_undef_instruction_new(IEB_UNDEFINED); else if ((op1 & b110000) == b110000) result = armv7_read_arm_instr_a8_svc_previously_swi(raw); @@ -2246,20 +2246,20 @@ static GArchInstruction *process_armv7_arm_memory_hints_advanced_simd_instructio result = process_armv7_arm_advanced_simd_element_or_structure_load_store_instructions(raw); else if ((op1 & b1110111) == b1000001) - result = g_undef_instruction_new(IBS_NOP); + result = g_undef_instruction_new(IEB_NOP); else if ((op1 & b1110111) == b1000101) result = armv7_read_arm_instr_a8_pli_immediate_literal(raw); else if ((op1 & b1110011) == b1000011) - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); else if ((op1 & b1110111) == b1010101) { if (rn != b1111) result = armv7_read_arm_instr_a8_pld_pldw_immediate(raw); else - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); } @@ -2273,18 +2273,18 @@ static GArchInstruction *process_armv7_arm_memory_hints_advanced_simd_instructio } else if (op1 == b1010011) - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); else if (op1 == b1010111) { if (op2 == b0000) - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); else if (op2 == b0001) result = armv7_read_arm_instr_a8_clrex(raw); else if ((op2 & b1110) == b0010) - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); else if (op2 == b0100) result = armv7_read_arm_instr_a8_dsb(raw); @@ -2296,18 +2296,18 @@ static GArchInstruction *process_armv7_arm_memory_hints_advanced_simd_instructio result = armv7_read_arm_instr_a8_isb(raw); else if (op2 == b0111) - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); else if ((op2 & b1000) == b1000) - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); } else if ((op1 & b1111011) == b1011011) - result = g_undef_instruction_new(IBS_UNPREDICTABLE); + result = g_undef_instruction_new(IEB_UNPREDICTABLE); else if ((op1 & b1110111) == b1100001 && (op2 & b0001) == b0000) - result = g_undef_instruction_new(IBS_NOP); + result = g_undef_instruction_new(IEB_NOP); else if ((op1 & b1110111) == b1100101 && (op2 & b0001) == b0000) result = armv7_read_arm_instr_a8_pli_register(raw); @@ -3157,7 +3157,7 @@ static GArchInstruction *process_armv7_arm_one_register_and_a_modified_immediate result = armv7_read_arm_instr_a8_vmov_immediate(raw); else if (cmode == b1111) - result = g_undef_instruction_new(IBS_UNDEFINED); + result = g_undef_instruction_new(IEB_UNDEFINED); } diff --git a/plugins/arm/v7/thumb_32.c b/plugins/arm/v7/thumb_32.c index 74c2a84..ae5f1fb 100644 --- a/plugins/arm/v7/thumb_32.c +++ b/plugins/arm/v7/thumb_32.c @@ -27,7 +27,7 @@ #include <stdint.h> -#include <arch/undefined.h> +#include <arch/instructions/undefined.h> #include <common/bconst.h> @@ -216,7 +216,7 @@ GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t raw) result = process_armv7_thumb_32_load_word(raw); else if ((op2 & b1100111) == b0000111) - result = g_undef_instruction_new(IBS_UNDEFINED); + result = g_undef_instruction_new(IEB_UNDEFINED); else if ((op2 & b1110001) == b0010000) result = process_armv7_thumb_32_advanced_simd_element_or_structure_load_store_instructions(raw); @@ -1023,7 +1023,7 @@ static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint3 result = armv7_read_thumb_32_instr_a8_ldrsh_literal(raw); else/* if (rt == b1111)*/ - result = g_undef_instruction_new(IBS_NOP); + result = g_undef_instruction_new(IEB_NOP); } @@ -1078,10 +1078,10 @@ static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint3 result = armv7_read_thumb_32_instr_a8_ldrsht(raw); else if (op2 == b000000 && rt == b1111) - result = g_undef_instruction_new(IBS_NOP); + result = g_undef_instruction_new(IEB_NOP); else if ((op2 & b111100) == b110000 && rt == b1111) - result = g_undef_instruction_new(IBS_NOP); + result = g_undef_instruction_new(IEB_NOP); } @@ -1091,7 +1091,7 @@ static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint3 result = armv7_read_thumb_32_instr_a8_ldrsh_immediate(raw); else/* if (rt == b1111)*/ - result = g_undef_instruction_new(IBS_NOP); + result = g_undef_instruction_new(IEB_NOP); } @@ -2243,7 +2243,7 @@ static GArchInstruction *process_armv7_thumb_32_coprocessor_advanced_simd_and_fl op = (raw >> 4) & 0x1; if ((op1 & b111110) == b000000) - result = g_undef_instruction_new(IBS_UNDEFINED); + result = g_undef_instruction_new(IEB_UNDEFINED); else if ((op1 & b110000) == b110000) result = process_armv7_thumb_32_advanced_simd_data_processing_instructions(raw); @@ -3142,7 +3142,7 @@ static GArchInstruction *process_armv7_thumb_32_one_register_and_a_modified_imme result = armv7_read_thumb_32_instr_a8_vmov_immediate(raw); else if (cmode == b1111) - result = g_undef_instruction_new(IBS_UNDEFINED); + result = g_undef_instruction_new(IEB_UNDEFINED); } |