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diff --git a/src/arch/arm/v7/opdefs/add_A884.d b/src/arch/arm/v7/opdefs/add_A884.d
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+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title ADD (immediate, Thumb)
+
+@encoding(t1) {
+
+    @half 0 0 0 1 1 1 0 imm3(3) Rn(3) Rd(3)
+
+    @syntax <Rd> <Rn> <const>
+
+    @conv {
+
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        const = ZeroExtend(imm3, 3, 32);
+
+    }
+
+    @rules {
+
+        //setflags = !InITBlock();
+
+    }
+
+}
+
+@encoding(t2) {
+
+    @half 0 0 1 1 0 Rdn(3) imm8(8)
+
+    @syntax <Rdn> <const>
+
+    @conv {
+
+        Rdn = Register(Rdn)
+        const = ZeroExtend(imm8, 8, 32);
+
+    }
+
+    @rules {
+
+        //setflags = !InITBlock();
+
+    }
+
+}
+
+@encoding(T3) {
+
+    @word 1 1 1 1 0 i(1) 0 1 0 0 0 S(1) Rn(4) 0 imm3(3) Rd(4) imm8(8)
+
+    @syntax {S} ".W" <Rd> <Rn> <const>
+
+    @conv {
+
+        S = SetFlags(S)
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        const = ThumbExpandImm_C(i:imm3:imm8, i)
+
+    }
+
+    @rules {
+
+        //if Rd == '1111' && S == '1' then SEE CMN (immediate);
+        //if Rn == '1101' then SEE ADD (SP plus immediate);
+        //if d == 13 || (d == 15 && S == '0') || n == 15 then UNPREDICTABLE;
+
+    }
+
+}
+
+@encoding(T4) {
+
+    @word 1 1 1 1 0 i(1) 1 0 0 0 0 0 Rn(4) 0 imm3(3) Rd(4) imm8(8)
+
+    @syntax "addw" <Rd> <Rn> <const>
+
+    @conv {
+
+        Rd = Register(Rd)
+        Rn = Register(Rn)
+        const = ZeroExtend((i:imm3:imm8, 12, 32)
+
+    }
+
+    @rules {
+
+        //if Rn == '1111' then SEE ADR;
+        //if Rn == '1101' then SEE ADD (SP plus immediate);
+        //setflags = FALSE
+        //if d IN {13,15} then UNPREDICTABLE;
+
+    }
+
+}