diff options
Diffstat (limited to 'src/arch/arm/v7/opdefs')
| -rw-r--r-- | src/arch/arm/v7/opdefs/Makefile.am | 37 | ||||
| -rw-r--r-- | src/arch/arm/v7/opdefs/mov_A88104.d | 47 | ||||
| -rw-r--r-- | src/arch/arm/v7/opdefs/subs_B9320.d | 44 |
3 files changed, 128 insertions, 0 deletions
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am new file mode 100644 index 0000000..8a799b1 --- /dev/null +++ b/src/arch/arm/v7/opdefs/Makefile.am @@ -0,0 +1,37 @@ + +include ../../../../../tools/d2c.mk + + +D2C_BIN = ../../../../../tools/d2c + +D2C_OUTDIR = $(PWD)/.. + +D2C_ARCH = armv7 +D2C_HEADER = _ARCH_ARM_V7 + +D2C_ENCODINGS = \ + -e a= \ + -e t=thumb_ + +D2C_MACROS = \ + -M SetFlags=g_armv7_instruction_define_setflags \ + -M Condition=g_arm_instruction_set_cond \ + -M Register=translate_armv7_register \ + -M "ExpandImmC32=g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, " + +ARMV7_DEFS = \ + mov_A88104.d \ + subs_B9320.d + + +all: $(ARMV7_DEFS:.d=.g) untabify_disass fix_includes_in_c finish_disass + +fix_includes_in_c: + find ../opcodes -name '*c' -exec sed -i 's/##INCLUDES##/\n#include "..\/instruction.h"\n#include "..\/..\/instruction.h"\n#include "..\/helpers.h"\n#include "..\/..\/..\/..\/common\/bconst.h"\n\n/' {} \; + +finish_disass: $(D2C_OUTDIR)/opcodes/opcodes.h + sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $< + if ! grep -q 'endif' $<; then echo -en "\n\n#endif /* _ARCH_ARM_V7_OPCODES_OPCODES_H */\n" >> $< ; fi + +clean: + rm -f $(ARMV7_DEFS:.d=.g) $(D2C_OUTDIR)/opcodes/*c $(D2C_OUTDIR)/opcodes/opcodes.h diff --git a/src/arch/arm/v7/opdefs/mov_A88104.d b/src/arch/arm/v7/opdefs/mov_A88104.d new file mode 100644 index 0000000..1efebd3 --- /dev/null +++ b/src/arch/arm/v7/opdefs/mov_A88104.d @@ -0,0 +1,47 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * ##FILE## - traduction d'instructions ARMv7 + * + * Copyright (C) 2014 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * Chrysalide is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * Chrysalide is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +@title MOV (register, ARM) + +@encoding(A1) { + + @word cond(4) 0 0 0 1 1 0 1 S(1) 0 0 0 0 Rd(4) 0 0 0 0 0 0 0 0 Rm(4) + + @syntax {S} {c} <Rd> <Rm> + + @conv { + + S = SetFlags(S) + c = Condition(cond) + Rd = Register(Rd) + Rm = Register(Rm) + + } + + @rules { + + if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions (ARM) + + } + +} diff --git a/src/arch/arm/v7/opdefs/subs_B9320.d b/src/arch/arm/v7/opdefs/subs_B9320.d new file mode 100644 index 0000000..335e614 --- /dev/null +++ b/src/arch/arm/v7/opdefs/subs_B9320.d @@ -0,0 +1,44 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * ##FILE## - traduction d'instructions ARMv7 + * + * Copyright (C) 2014 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * Chrysalide is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * Chrysalide is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Foobar. If not, see <http://www.gnu.org/licenses/>. + */ + + +@title SUBS PC, LR and related instructions (ARM) + +@encoding(A1) { + + @word cond(4) 0 0 1 opcode(4) 1 Rn(4) 1 1 1 1 imm12(12) + + @syntax {c} <Rn> <#const> + + @conv { + + c = Condition(cond) + Rn = Register(Rn) + const = ExpandImmC32(imm12) + + } + + @rules { + + } + +} |