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diff --git a/src/arch/x86/operand.c b/src/arch/x86/operand.c
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+/* OpenIDA - Outil d'analyse de fichiers binaires
+ * operand.c - gestion des operandes de l'architecture x86
+ *
+ * Copyright (C) 2008 Cyrille Bagard
+ *
+ * This file is part of OpenIDA.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include "operand.h"
+
+
+#include <malloc.h>
+#include <stdio.h>
+
+
+#include "../operand.h"
+#include "../operand-int.h"
+
+
+
+
+/* Liste des registres 8 bits */
+typedef enum _X868bRegister
+{
+ X86_REG8_AL = 0, /* Registre AL */
+ X86_REG8_CL = 1, /* Registre AL */
+ X86_REG8_DL = 2, /* Registre AL */
+ X86_REG8_BL = 3, /* Registre AL */
+ X86_REG8_AH = 4, /* Registre AH */
+ X86_REG8_CH = 5, /* Registre AH */
+ X86_REG8_DH = 6, /* Registre AH */
+ X86_REG8_BH = 7, /* Registre AH */
+
+} X868bRegister;
+
+/* Liste des registres 16 bits */
+typedef enum _X8616bRegister
+{
+ X86_REG16_AX = 0, /* Registre AX */
+ X86_REG16_CX = 1, /* Registre AX */
+ X86_REG16_DX = 2, /* Registre AX */
+ X86_REG16_BX = 3, /* Registre AX */
+ X86_REG16_SP = 4, /* Registre SP */
+ X86_REG16_BP = 5, /* Registre BP */
+ X86_REG16_SI = 6, /* Registre SI */
+ X86_REG16_DI = 7, /* Registre DI */
+
+} X8616bRegister;
+
+/* Liste des registres 32 bits */
+typedef enum _X8632bRegister
+{
+ X86_REG32_EAX = 0, /* Registre EAX */
+ X86_REG32_ECX = 1, /* Registre EAX */
+ X86_REG32_EDX = 2, /* Registre EAX */
+ X86_REG32_EBX = 3, /* Registre EAX */
+ X86_REG32_ESP = 4, /* Registre ESP */
+ X86_REG32_EBP = 5, /* Registre EBP */
+ X86_REG32_ESI = 6, /* Registre ESI */
+ X86_REG32_EDI = 7, /* Registre EDI */
+
+} X8632bRegister;
+
+
+
+
+
+/* Définition d'une opérande x86 */
+struct _asm_x86_operand
+{
+ asm_operand base; /* A laisser en premier */
+
+ union
+ {
+ X868bRegister reg8; /* Registre 8 bits */
+ X8616bRegister reg16; /* Registre 16 bits */
+ X8632bRegister reg32; /* Registre 32 bits */
+
+ } x86_value;
+
+};
+
+
+
+#define NULL ((void *)0)
+
+
+
+
+
+/******************************************************************************
+* *
+* Paramètres : - *
+* *
+* Description : Crée une opérande vierge pour x86. *
+* *
+* Retour : Opérande nouvellement créée. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+asm_x86_operand *create_new_x86_operand(void)
+{
+ return (asm_x86_operand *)calloc(1, sizeof(asm_x86_operand));
+
+}
+
+
+
+
+
+
+
+/******************************************************************************
+* *
+* Paramètres : data = donnée à analyser. *
+* is_reg32 = indique si le registre est un registre 32 bits. *
+* *
+* Description : Crée une opérande renvoyant vers un registre 16 ou 32 bits. *
+* *
+* Retour : Opérande mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+asm_x86_operand *x86_create_reg1632_operand(uint8_t data, bool is_reg32)
+{
+ asm_x86_operand *result; /* Registre à retourner */
+ X8616bRegister reg16; /* Registre 16 bits */
+ X8632bRegister reg32; /* Registre 32 bits */
+
+ if (is_reg32)
+ switch (data - 0xb8)
+ {
+ case 0 ... 7:
+ reg32 = (X8632bRegister)(data - 0xb8);
+ break;
+ default:
+ return NULL;
+ break;
+ }
+
+ else
+ switch (data - 0xb0)
+ {
+ case 0 ... 7:
+ reg16 = (X8616bRegister)(data - 0xb0);
+ break;
+ default:
+ return NULL;
+ break;
+ }
+
+ result = create_new_x86_operand();
+
+ ASM_OPERAND(result)->type = AOT_REG;
+ ASM_OPERAND(result)->size = (is_reg32 ? AOS_32_BITS : AOS_16_BITS);
+
+ if (is_reg32) result->x86_value.reg32 = reg32;
+ else result->x86_value.reg16 = reg16;
+
+ return result;
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : operand = instruction à traiter. *
+* buffer = tampon de sortie mis à disposition. [OUT] *
+* len = taille de ce tampon. *
+* syntax = type de représentation demandée. *
+* *
+* Description : Traduit une opérande de registre en texte. *
+* *
+* Retour : - *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+void x86_print_reg_operand(const asm_x86_operand *operand, char *buffer, size_t len, AsmSyntax syntax)
+{
+ switch (syntax)
+ {
+ case ASX_INTEL:
+ switch (ASM_OPERAND(operand)->size)
+ {
+ case AOS_8_BITS:
+ switch (operand->x86_value.reg8)
+ {
+ case X86_REG8_AL:
+ snprintf(buffer, len, "al");
+ break;
+ case X86_REG8_CL:
+ snprintf(buffer, len, "cl");
+ break;
+ case X86_REG8_DL:
+ snprintf(buffer, len, "dl");
+ break;
+ case X86_REG8_BL:
+ snprintf(buffer, len, "bl");
+ break;
+ case X86_REG8_AH:
+ snprintf(buffer, len, "ah");
+ break;
+ case X86_REG8_CH:
+ snprintf(buffer, len, "ch");
+ break;
+ case X86_REG8_DH:
+ snprintf(buffer, len, "dh");
+ break;
+ case X86_REG8_BH:
+ snprintf(buffer, len, "bh");
+ break;
+ }
+ break;
+
+ case AOS_16_BITS:
+ switch (operand->x86_value.reg16)
+ {
+ case X86_REG16_AX:
+ snprintf(buffer, len, "ax");
+ break;
+ case X86_REG16_CX:
+ snprintf(buffer, len, "cx");
+ break;
+ case X86_REG16_DX:
+ snprintf(buffer, len, "dx");
+ break;
+ case X86_REG16_BX:
+ snprintf(buffer, len, "bx");
+ break;
+ case X86_REG16_SP:
+ snprintf(buffer, len, "sp");
+ break;
+ case X86_REG16_BP:
+ snprintf(buffer, len, "bp");
+ break;
+ case X86_REG16_SI:
+ snprintf(buffer, len, "si");
+ break;
+ case X86_REG16_DI:
+ snprintf(buffer, len, "di");
+ break;
+ }
+ break;
+
+ case AOS_32_BITS:
+ switch (operand->x86_value.reg32)
+ {
+ case X86_REG32_EAX:
+ snprintf(buffer, len, "eax");
+ break;
+ case X86_REG32_ECX:
+ snprintf(buffer, len, "ecx");
+ break;
+ case X86_REG32_EDX:
+ snprintf(buffer, len, "edx");
+ break;
+ case X86_REG32_EBX:
+ snprintf(buffer, len, "ebx");
+ break;
+ case X86_REG32_ESP:
+ snprintf(buffer, len, "esp");
+ break;
+ case X86_REG32_EBP:
+ snprintf(buffer, len, "ebp");
+ break;
+ case X86_REG32_ESI:
+ snprintf(buffer, len, "esi");
+ break;
+ case X86_REG32_EDI:
+ snprintf(buffer, len, "edi");
+ break;
+ }
+ break;
+
+ case AOS_64_BITS:
+ break;
+
+ }
+ break;
+
+ case ASX_ATT:
+ switch (ASM_OPERAND(operand)->size)
+ {
+ case AOS_8_BITS:
+ switch (operand->x86_value.reg8)
+ {
+ case X86_REG8_AL:
+ snprintf(buffer, len, "%%al");
+ break;
+ case X86_REG8_CL:
+ snprintf(buffer, len, "%%cl");
+ break;
+ case X86_REG8_DL:
+ snprintf(buffer, len, "%%dl");
+ break;
+ case X86_REG8_BL:
+ snprintf(buffer, len, "%%bl");
+ break;
+ case X86_REG8_AH:
+ snprintf(buffer, len, "%%ah");
+ break;
+ case X86_REG8_CH:
+ snprintf(buffer, len, "%%ch");
+ break;
+ case X86_REG8_DH:
+ snprintf(buffer, len, "%%dh");
+ break;
+ case X86_REG8_BH:
+ snprintf(buffer, len, "%%bh");
+ break;
+ }
+ break;
+
+ case AOS_16_BITS:
+ switch (operand->x86_value.reg16)
+ {
+ case X86_REG16_AX:
+ snprintf(buffer, len, "%%ax");
+ break;
+ case X86_REG16_CX:
+ snprintf(buffer, len, "%%cx");
+ break;
+ case X86_REG16_DX:
+ snprintf(buffer, len, "%%dx");
+ break;
+ case X86_REG16_BX:
+ snprintf(buffer, len, "%%bx");
+ break;
+ case X86_REG16_SP:
+ snprintf(buffer, len, "%%sp");
+ break;
+ case X86_REG16_BP:
+ snprintf(buffer, len, "%%bp");
+ break;
+ case X86_REG16_SI:
+ snprintf(buffer, len, "%%si");
+ break;
+ case X86_REG16_DI:
+ snprintf(buffer, len, "%%di");
+ break;
+ }
+ break;
+
+ case AOS_32_BITS:
+ switch (operand->x86_value.reg32)
+ {
+ case X86_REG32_EAX:
+ snprintf(buffer, len, "%%eax");
+ break;
+ case X86_REG32_ECX:
+ snprintf(buffer, len, "%%ecx");
+ break;
+ case X86_REG32_EDX:
+ snprintf(buffer, len, "%%edx");
+ break;
+ case X86_REG32_EBX:
+ snprintf(buffer, len, "%%ebx");
+ break;
+ case X86_REG32_ESP:
+ snprintf(buffer, len, "%%esp");
+ break;
+ case X86_REG32_EBP:
+ snprintf(buffer, len, "%%ebp");
+ break;
+ case X86_REG32_ESI:
+ snprintf(buffer, len, "%%esi");
+ break;
+ case X86_REG32_EDI:
+ snprintf(buffer, len, "%%edi");
+ break;
+ }
+ break;
+
+ case AOS_64_BITS:
+ break;
+
+ }
+ break;
+
+ }
+
+}
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