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-rw-r--r--src/arch/Makefile.am1
-rw-r--r--src/arch/arm/v7/Makefile.am2
-rw-r--r--src/arch/arm/v7/fetch.c (renamed from src/arch/arm/v7/link.c)22
-rw-r--r--src/arch/arm/v7/fetch.h113
-rw-r--r--src/arch/arm/v7/link.h113
-rw-r--r--src/arch/arm/v7/opdefs/Makefile.am2
-rw-r--r--src/arch/arm/v7/opdefs/b_A8818.d25
-rw-r--r--src/arch/arm/v7/opdefs/bl_A8825.d8
-rw-r--r--src/arch/arm/v7/opdefs/bx_A8827.d4
-rw-r--r--src/arch/arm/v7/opdefs/cbnz_A8829.d4
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8864.d6
-rw-r--r--src/arch/arm/v7/opdefs/pop_A88131.d3
-rw-r--r--src/arch/arm/v7/opdefs/pop_A88132.d2
-rw-r--r--src/arch/arm/v7/post.c12
-rw-r--r--src/arch/arm/v7/post.h8
-rw-r--r--src/arch/instruction.c8
-rw-r--r--src/arch/instruction.h16
-rw-r--r--src/arch/link.c190
-rw-r--r--src/arch/link.h45
-rw-r--r--src/arch/processor-int.h7
-rw-r--r--src/arch/processor.c147
-rw-r--r--src/arch/processor.h16
22 files changed, 596 insertions, 158 deletions
diff --git a/src/arch/Makefile.am b/src/arch/Makefile.am
index 33747fb..aab7ec8 100644
--- a/src/arch/Makefile.am
+++ b/src/arch/Makefile.am
@@ -9,6 +9,7 @@ libarch_la_SOURCES = \
immediate.h immediate.c \
instruction-int.h \
instruction.h instruction.c \
+ link.h link.c \
operand-int.h \
operand.h operand.c \
processor-int.h \
diff --git a/src/arch/arm/v7/Makefile.am b/src/arch/arm/v7/Makefile.am
index 22e93d4..f9b35b6 100644
--- a/src/arch/arm/v7/Makefile.am
+++ b/src/arch/arm/v7/Makefile.am
@@ -4,9 +4,9 @@ noinst_LTLIBRARIES = libarcharmv7.la
libarcharmv7_la_SOURCES = \
arm.h arm.c \
context.h context.c \
+ fetch.h fetch.c \
helpers.h helpers.c \
instruction.h instruction.c \
- link.h link.c \
post.h post.c \
processor.h processor.c \
pseudo.h pseudo.c \
diff --git a/src/arch/arm/v7/link.c b/src/arch/arm/v7/fetch.c
index 308d4e5..18d61f0 100644
--- a/src/arch/arm/v7/link.c
+++ b/src/arch/arm/v7/fetch.c
@@ -1,6 +1,6 @@
/* Chrysalide - Outil d'analyse de fichiers binaires
- * post.c - traitements complémentaires à la phase de désassemblage
+ * fetch.c - traitements complémentaires à la phase de désassemblage
*
* Copyright (C) 2014 Cyrille Bagard
*
@@ -21,7 +21,7 @@
*/
-#include "link.h"
+#include "fetch.h"
#include <assert.h>
@@ -40,6 +40,7 @@
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à faire suivre. *
@@ -52,7 +53,7 @@
* *
******************************************************************************/
-void handle_links_with_instruction_b_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_b_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -106,6 +107,7 @@ void handle_links_with_instruction_b_with_orig(GArchInstruction *instr, GArmV7Co
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à faire suivre. *
@@ -118,7 +120,7 @@ void handle_links_with_instruction_b_with_orig(GArchInstruction *instr, GArmV7Co
* *
******************************************************************************/
-void handle_links_with_instruction_bl_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_bl_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -163,6 +165,7 @@ void handle_links_with_instruction_bl_with_orig(GArchInstruction *instr, GArmV7C
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à inverser. *
@@ -175,7 +178,7 @@ void handle_links_with_instruction_bl_with_orig(GArchInstruction *instr, GArmV7C
* *
******************************************************************************/
-void handle_links_with_instruction_blx_with_dest(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_blx_with_dest(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -221,6 +224,7 @@ void handle_links_with_instruction_blx_with_dest(GArchInstruction *instr, GArmV7
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à faire suivre. *
@@ -233,7 +237,7 @@ void handle_links_with_instruction_blx_with_dest(GArchInstruction *instr, GArmV7
* *
******************************************************************************/
-void handle_links_with_instruction_bx_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_bx_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
GArchOperand *op; /* Opérande numérique en place */
GArmRegister *reg; /* Registre matériel manipulé */
@@ -283,6 +287,7 @@ void handle_links_with_instruction_bx_with_orig(GArchInstruction *instr, GArmV7C
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* *
@@ -294,7 +299,7 @@ void handle_links_with_instruction_bx_with_orig(GArchInstruction *instr, GArmV7C
* *
******************************************************************************/
-void handle_links_with_instruction_cb_n_z(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format)
+void help_fetching_with_instruction_cb_n_z(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -334,6 +339,7 @@ void handle_links_with_instruction_cb_n_z(GArchInstruction *instr, GArmV7Context
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à inverser. *
@@ -346,7 +352,7 @@ void handle_links_with_instruction_cb_n_z(GArchInstruction *instr, GArmV7Context
* *
******************************************************************************/
-void handle_links_with_instruction_ldr_literal_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
phys_t phys_pc; /* Position dans l'exécution */
diff --git a/src/arch/arm/v7/fetch.h b/src/arch/arm/v7/fetch.h
new file mode 100644
index 0000000..af42f2e
--- /dev/null
+++ b/src/arch/arm/v7/fetch.h
@@ -0,0 +1,113 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * fetch.h - prototypes pour l'édition des liens durant la phase de désassemblage
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef _ARCH_ARM_V7_FETCH_H
+#define _ARCH_ARM_V7_FETCH_H
+
+
+#include "context.h"
+#include "../../instruction.h"
+#include "../../../format/format.h"
+
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_b_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_b_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_b_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_b_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_b_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_bl_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_bl_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bl_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_bl_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bl_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_blx_with_dest(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_blx_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_blx_with_dest(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+static inline void help_fetching_with_instruction_blx_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_blx_with_dest(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_bx_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_bx_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bx_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_bx_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bx_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_cb_n_z(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *);
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_ldr_literal_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_ldr_literal_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_ldr_literal_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_ldr_literal_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+
+#endif /* _ARCH_ARM_V7_FETCH_H */
diff --git a/src/arch/arm/v7/link.h b/src/arch/arm/v7/link.h
deleted file mode 100644
index 9e52fe6..0000000
--- a/src/arch/arm/v7/link.h
+++ /dev/null
@@ -1,113 +0,0 @@
-
-/* Chrysalide - Outil d'analyse de fichiers binaires
- * link.h - prototypes pour l'édition des liens durant la phase de désassemblage
- *
- * Copyright (C) 2014 Cyrille Bagard
- *
- * This file is part of Chrysalide.
- *
- * OpenIDA is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * OpenIDA is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
- */
-
-
-#ifndef _ARCH_ARM_V7_LINK_H
-#define _ARCH_ARM_V7_LINK_H
-
-
-#include "context.h"
-#include "../../instruction.h"
-#include "../../../format/format.h"
-
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_b_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_b_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_b_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_b_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_b_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_bl_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_bl_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bl_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_bl_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bl_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_blx_with_dest(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_blx_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_blx_with_dest(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-static inline void handle_links_with_instruction_blx_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_blx_with_dest(ins, ctx, fmt, AV7IS_ARM);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_bx_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_bx_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bx_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_bx_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bx_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_cb_n_z(GArchInstruction *, GArmV7Context *, GBinFormat *);
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_ldr_literal_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_ldr_literal_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_ldr_literal_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_ldr_literal_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_ldr_literal_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-
-#endif /* _ARCH_ARM_V7_LINK_H */
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index 318e20b..b95b588 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -106,7 +106,7 @@ fmk.done: $(ARMV7_DEFS)
fix_includes_in_c_templates:
@for f in `find .gen/ -name '*tmpl.c'`; do \
if grep -q '##INCLUDES##' $$f; then \
- $(fix_verbose)sed -i 's/##INCLUDES##/\n#include "..\/helpers.h"\n#include "..\/instruction.h"\n#include "..\/link.h"\n#include "..\/post.h"\n#include "..\/..\/instruction.h"\n#include "..\/..\/..\/..\/common\/bconst.h"\n\n/' $$f; \
+ $(fix_verbose)sed -i 's/##INCLUDES##/\n#include "..\/helpers.h"\n#include "..\/instruction.h"\n#include "..\/fetch.h"\n#include "..\/post.h"\n#include "..\/..\/instruction.h"\n#include "..\/..\/..\/link.h"\n#include "..\/..\/..\/..\/common\/bconst.h"\n\n/' $$f; \
fi; \
done
diff --git a/src/arch/arm/v7/opdefs/b_A8818.d b/src/arch/arm/v7/opdefs/b_A8818.d
index 50bdda9..a275177 100644
--- a/src/arch/arm/v7/opdefs/b_A8818.d
+++ b/src/arch/arm/v7/opdefs/b_A8818.d
@@ -38,7 +38,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -47,7 +48,7 @@
//if cond == '1110' then UNDEFINED;
//if cond == '1111' then SEE SVC;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -67,7 +68,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -75,7 +77,7 @@
@rules {
//if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -96,7 +98,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -105,7 +108,7 @@
//if cond<3:1> == '111' then SEE "Related encodings";
//if InITBlock() then UNPREDICTABLE;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -127,7 +130,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -135,7 +139,7 @@
@rules {
//if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -156,14 +160,15 @@
@hooks {
- link = handle_links_with_instruction_b_from_arm
+ fetch = help_fetching_with_instruction_b_from_arm
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@rules {
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d
index 63922dd..62ac8f9 100644
--- a/src/arch/arm/v7/opdefs/bl_A8825.d
+++ b/src/arch/arm/v7/opdefs/bl_A8825.d
@@ -39,7 +39,7 @@
@hooks {
- link = handle_links_with_instruction_bl_from_thumb
+ fetch = help_fetching_with_instruction_bl_from_thumb
post = post_process_branch_and_link_instructions
}
@@ -68,7 +68,7 @@
@hooks {
- link = handle_links_with_instruction_blx_from_thumb
+ fetch = help_fetching_with_instruction_blx_from_thumb
post = post_process_branch_and_link_instructions
}
@@ -95,7 +95,7 @@
@hooks {
- link = handle_links_with_instruction_bl_from_arm
+ fetch = help_fetching_with_instruction_bl_from_arm
post = post_process_branch_and_link_instructions
}
@@ -122,7 +122,7 @@
@hooks {
- link = handle_links_with_instruction_blx_from_arm
+ fetch = help_fetching_with_instruction_blx_from_arm
post = post_process_branch_and_link_instructions
}
diff --git a/src/arch/arm/v7/opdefs/bx_A8827.d b/src/arch/arm/v7/opdefs/bx_A8827.d
index 4856885..f8027a4 100644
--- a/src/arch/arm/v7/opdefs/bx_A8827.d
+++ b/src/arch/arm/v7/opdefs/bx_A8827.d
@@ -38,7 +38,7 @@
@hooks {
- link = handle_links_with_instruction_bx_from_thumb
+ fetch = help_fetching_with_instruction_bx_from_thumb
}
@@ -65,7 +65,7 @@
@hooks {
- link = handle_links_with_instruction_bx_from_thumb
+ fetch = help_fetching_with_instruction_bx_from_thumb
}
diff --git a/src/arch/arm/v7/opdefs/cbnz_A8829.d b/src/arch/arm/v7/opdefs/cbnz_A8829.d
index 93a8d1f..d9815c1 100644
--- a/src/arch/arm/v7/opdefs/cbnz_A8829.d
+++ b/src/arch/arm/v7/opdefs/cbnz_A8829.d
@@ -38,7 +38,7 @@
@hooks {
- link = handle_links_with_instruction_cb_n_z
+ fetch = help_fetching_with_instruction_cb_n_z
post = post_process_comp_and_branch_instructions
}
@@ -60,7 +60,7 @@
@hooks {
- link = handle_links_with_instruction_cb_n_z
+ fetch = help_fetching_with_instruction_cb_n_z
post = post_process_comp_and_branch_instructions
}
diff --git a/src/arch/arm/v7/opdefs/ldr_A8864.d b/src/arch/arm/v7/opdefs/ldr_A8864.d
index c5b0dd0..4cf0048 100644
--- a/src/arch/arm/v7/opdefs/ldr_A8864.d
+++ b/src/arch/arm/v7/opdefs/ldr_A8864.d
@@ -39,7 +39,7 @@
@hooks {
- link = handle_links_with_instruction_ldr_literal_from_thumb
+ fetch = help_fetching_with_instruction_ldr_literal_from_thumb
post = post_process_ldr_instructions
}
@@ -62,7 +62,7 @@
@hooks {
- link = handle_links_with_instruction_ldr_literal_from_thumb
+ fetch = help_fetching_with_instruction_ldr_literal_from_thumb
post = post_process_ldr_instructions
}
@@ -93,7 +93,7 @@
@hooks {
- link = handle_links_with_instruction_ldr_literal_from_arm
+ fetch = help_fetching_with_instruction_ldr_literal_from_arm
post = post_process_ldr_instructions
}
diff --git a/src/arch/arm/v7/opdefs/pop_A88131.d b/src/arch/arm/v7/opdefs/pop_A88131.d
index 2663e1b..ef5ab25 100644
--- a/src/arch/arm/v7/opdefs/pop_A88131.d
+++ b/src/arch/arm/v7/opdefs/pop_A88131.d
@@ -39,6 +39,7 @@
//if BitCount(registers) < 1 then UNPREDICTABLE;
//if registers<15> == '1' && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
@@ -60,6 +61,7 @@
//if BitCount(registers) < 2 || (P == '1' && M == '1') then UNPREDICTABLE;
//if registers<15> == '1' && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
@@ -81,6 +83,7 @@
@rules {
//if t == 13 || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/pop_A88132.d b/src/arch/arm/v7/opdefs/pop_A88132.d
index 0c6c1b0..89c51c9 100644
--- a/src/arch/arm/v7/opdefs/pop_A88132.d
+++ b/src/arch/arm/v7/opdefs/pop_A88132.d
@@ -40,6 +40,7 @@
//if BitCount(register_list) < 2 then SEE LDM / LDMIA / LDMFD;
//if registers<13> == '1' && ArchVersion() >= 7 then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
@@ -62,6 +63,7 @@
@rules {
//if t == 13 then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/post.c b/src/arch/arm/v7/post.c
index e6a6c2e..23d0198 100644
--- a/src/arch/arm/v7/post.c
+++ b/src/arch/arm/v7/post.c
@@ -34,6 +34,7 @@
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -45,7 +46,7 @@
* *
******************************************************************************/
-void post_process_branch_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_branch_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
@@ -97,6 +98,7 @@ void post_process_branch_instructions(GArchInstruction *instr, GProcContext *con
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -108,7 +110,7 @@ void post_process_branch_instructions(GArchInstruction *instr, GProcContext *con
* *
******************************************************************************/
-void post_process_branch_and_link_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_branch_and_link_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
@@ -160,6 +162,7 @@ void post_process_branch_and_link_instructions(GArchInstruction *instr, GProcCon
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -171,7 +174,7 @@ void post_process_branch_and_link_instructions(GArchInstruction *instr, GProcCon
* *
******************************************************************************/
-void post_process_comp_and_branch_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_comp_and_branch_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
@@ -223,6 +226,7 @@ void post_process_comp_and_branch_instructions(GArchInstruction *instr, GProcCon
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -234,7 +238,7 @@ void post_process_comp_and_branch_instructions(GArchInstruction *instr, GProcCon
* *
******************************************************************************/
-void post_process_ldr_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_ldr_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
diff --git a/src/arch/arm/v7/post.h b/src/arch/arm/v7/post.h
index 79dcaa8..6165597 100644
--- a/src/arch/arm/v7/post.h
+++ b/src/arch/arm/v7/post.h
@@ -31,16 +31,16 @@
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_branch_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_branch_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_branch_and_link_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_branch_and_link_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_comp_and_branch_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_comp_and_branch_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_ldr_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_ldr_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
diff --git a/src/arch/instruction.c b/src/arch/instruction.c
index 0bcc739..08256d1 100644
--- a/src/arch/instruction.c
+++ b/src/arch/instruction.c
@@ -234,6 +234,7 @@ void g_arch_instruction_set_hook(GArchInstruction *instr, InstrProcessHook type,
* *
* Paramètres : instr = instruction quelconque à traiter. *
* type = type de procédure à utiliser. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -245,12 +246,15 @@ void g_arch_instruction_set_hook(GArchInstruction *instr, InstrProcessHook type,
* *
******************************************************************************/
-void g_arch_instruction_call_hook(GArchInstruction *instr, InstrProcessHook type, GProcContext *context, GBinFormat *format)
+void g_arch_instruction_call_hook(GArchInstruction *instr, InstrProcessHook type, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
+ if (instr->range.addr.virtual == 0x83c2)
+ printf(" [%u] HAS BRANCH ? %p\n", (unsigned int)type, instr->hooks[type]);
+
assert(type < IPH_COUNT);
if (instr->hooks[type] != NULL)
- instr->hooks[type](instr, context, format);
+ instr->hooks[type](instr, proc, context, format);
}
diff --git a/src/arch/instruction.h b/src/arch/instruction.h
index 9251a34..0198bb5 100644
--- a/src/arch/instruction.h
+++ b/src/arch/instruction.h
@@ -76,22 +76,29 @@ void g_arch_instruction_set_flag(GArchInstruction *, ArchInstrFlag);
/* Fournit les informations complémentaires d'une instruction. */
ArchInstrFlag g_arch_instruction_get_flags(const GArchInstruction *);
+
/**
* La définition de "GBinFormat", utile aux traitements complémentaires, ne peut
* se faire en incluant le fichier d'en-tête "../format/format.h", pour cause
* de références circulaires.
*
* On procède donc à une seconde déclaration, en attendant éventuellement mieux.
+ *
+ * Pareil pour "GArchProcessor", définie dans le fichier "processor.h", lequel
+ * inclut directement ce fichier.
*/
-
/* Format binaire générique (instance) */
typedef struct _GBinFormat GBinFormat;
+/* Ligne de représentation générique (instance) */
+typedef struct _GArchProcessor GArchProcessor;
+
/* Types de crochet de traitement */
typedef enum _InstrProcessHook
{
+ IPH_FETCH, /* Itinéraire de désassemblage */
IPH_LINK, /* Edition des liens */
IPH_POST, /* Résolution des symboles */
@@ -100,13 +107,13 @@ typedef enum _InstrProcessHook
} InstrProcessHook;
/* Complète un désassemblage accompli pour une instruction. */
-typedef void (* instr_hook_fc) (GArchInstruction *, GProcContext *, GBinFormat *);
+typedef void (* instr_hook_fc) (GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
/* Définit un traitement complémentare au désassemblage. */
void g_arch_instruction_set_hook(GArchInstruction *, InstrProcessHook, instr_hook_fc);
/* Complète un désassemblage accompli pour une instruction. */
-void g_arch_instruction_call_hook(GArchInstruction *, InstrProcessHook, GProcContext *, GBinFormat *);
+void g_arch_instruction_call_hook(GArchInstruction *, InstrProcessHook, GArchProcessor *, GProcContext *, GBinFormat *);
/* Définit la localisation d'une instruction. */
void g_arch_instruction_set_range(GArchInstruction *, const mrange_t *);
@@ -155,7 +162,8 @@ typedef enum _InstructionLinkType
ILT_JUMP_IF_FALSE, /* Saut conditionnel (si faux) */
ILT_LOOP, /* Retour en arrière (boucle) */
ILT_CALL, /* Appel d'une fonction */
- ILT_CATCH_EXCEPTION /* Gestion d'une exception */
+ ILT_CATCH_EXCEPTION, /* Gestion d'une exception */
+ ILT_REF /* Simple référence croisée */
} InstructionLinkType;
diff --git a/src/arch/link.c b/src/arch/link.c
new file mode 100644
index 0000000..bc80e39
--- /dev/null
+++ b/src/arch/link.c
@@ -0,0 +1,190 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * link.c - édition des liens après la phase de désassemblage
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include "link.h"
+
+
+#include <assert.h>
+
+
+#include "target.h"
+
+
+
+/******************************************************************************
+* *
+* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
+* context = contexte associé à la phase de désassemblage. *
+* format = acès aux données du binaire d'origine. *
+* *
+* Description : Etablit un lien de saut selon une instruction donnée. *
+* *
+* Retour : - *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+void handle_jump_as_link(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
+{
+ GArchOperand *op; /* Opérande numérique en place */
+ virt_t virt; /* Adresse virtuelle */
+ vmpa2t addr; /* Adresse de destination */
+ GArchInstruction *target; /* Ligne visée par la référence*/
+
+ assert(g_arch_instruction_count_operands(instr) > 0);
+
+ op = g_arch_instruction_get_operand(instr, 0);
+
+ if (!G_IS_IMM_OPERAND(op)) return;
+
+ if (g_imm_operand_to_virt_t(G_IMM_OPERAND(op), &virt))
+ {
+ init_vmpa(&addr, VMPA_NO_PHYSICAL, virt);
+
+ target = g_arch_processor_find_instr_by_address(proc, &addr);
+
+ if (target != NULL)
+ g_arch_instruction_link_with(instr, target, ILT_JUMP);
+
+ }
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
+* context = contexte associé à la phase de désassemblage. *
+* format = acès aux données du binaire d'origine. *
+* *
+* Description : Etablit un lien d'appel selon une instruction donnée. *
+* *
+* Retour : - *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+#include "instruction-int.h"
+void handle_branch_if_true_as_link(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
+{
+ GArchOperand *op; /* Opérande numérique en place */
+ virt_t virt; /* Adresse virtuelle */
+ vmpa2t addr; /* Adresse de destination */
+ GArchInstruction *target; /* Ligne visée par la référence*/
+ GArchInstruction *list; /* Ensemble des instructions */
+
+ assert(g_arch_instruction_count_operands(instr) > 0);
+
+ op = g_arch_instruction_get_operand(instr, 0);
+
+ virt = VMPA_NO_VIRTUAL;
+
+ if (G_IS_TARGET_OPERAND(op))
+ virt = g_target_operand_get_addr(G_TARGET_OPERAND(op));
+
+ else if (G_IS_IMM_OPERAND(op))
+ {
+ if (!g_imm_operand_to_virt_t(G_IMM_OPERAND(op), &virt))
+ virt = VMPA_NO_VIRTUAL;
+ }
+
+ if (virt != VMPA_NO_VIRTUAL)
+ {
+ /* TODO : utiliser format pour contruire une adresse avec une position physique,
+ * ce qui accélèrerait les recherches.
+ */
+ init_vmpa(&addr, VMPA_NO_PHYSICAL, virt);
+
+ target = g_arch_processor_find_instr_by_address(proc, &addr);
+
+ printf(" @ 0x%08x BRANCH to 0x%08x -->> %p\n",
+ (unsigned int)instr->range.addr.virtual, (unsigned int)virt, target);
+
+ if (target != NULL)
+ {
+ g_arch_instruction_link_with(instr, target, ILT_JUMP_IF_TRUE);
+
+ list = g_arch_processor_get_disassembled_instructions(proc);
+
+ target = g_arch_instruction_get_next_iter(list, instr, ~0);
+
+ if (target != NULL)
+ g_arch_instruction_link_with(instr, target, ILT_JUMP_IF_FALSE);
+
+ }
+
+ }
+
+
+ else printf(" @ 0x%08x FAILED TO BRANCH\n",
+ (unsigned int)instr->range.addr.virtual);
+
+
+
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
+* context = contexte associé à la phase de désassemblage. *
+* format = acès aux données du binaire d'origine. *
+* *
+* Description : Etablit un lien d'appel selon une instruction donnée. *
+* *
+* Retour : - *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+void handle_call_as_link(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
+{
+ GArchOperand *op; /* Opérande numérique en place */
+ virt_t virt; /* Adresse virtuelle */
+ vmpa2t addr; /* Adresse de destination */
+ GArchInstruction *target; /* Ligne visée par la référence*/
+
+ assert(g_arch_instruction_count_operands(instr) > 0);
+
+ op = g_arch_instruction_get_operand(instr, 0);
+
+ if (!G_IS_IMM_OPERAND(op)) return;
+
+ if (g_imm_operand_to_virt_t(G_IMM_OPERAND(op), &virt))
+ {
+ init_vmpa(&addr, VMPA_NO_PHYSICAL, virt);
+
+ target = g_arch_processor_find_instr_by_address(proc, &addr);
+
+ if (target != NULL)
+ g_arch_instruction_link_with(instr, target, ILT_CALL);
+
+ }
+
+}
diff --git a/src/arch/link.h b/src/arch/link.h
new file mode 100644
index 0000000..1923e0b
--- /dev/null
+++ b/src/arch/link.h
@@ -0,0 +1,45 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * link.h - prototypes pour l'édition des liens après la phase de désassemblage
+ *
+ * Copyright (C) 2015 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef _ARCH_LINK_H
+#define _ARCH_LINK_H
+
+
+#include "instruction.h"
+#include "processor.h"
+#include "../format/format.h"
+
+
+
+/* Etablit un lien de saut selon une instruction donnée. */
+void handle_jump_as_link(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
+
+/* Etablit un lien d'appel selon une instruction donnée. */
+void handle_branch_if_true_as_link(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
+
+/* Etablit un lien d'appel selon une instruction donnée. */
+void handle_call_as_link(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
+
+
+
+#endif /* _ARCH_LINK_H */
diff --git a/src/arch/processor-int.h b/src/arch/processor-int.h
index 2b91b36..d387bde 100644
--- a/src/arch/processor-int.h
+++ b/src/arch/processor-int.h
@@ -43,6 +43,9 @@
+/* Taille des pré-allocations pour les instructions */
+#define INSTR_ALLOC_BLOCK 100
+
/* Fournit un contexte propre au processeur d'une architecture. */
@@ -70,6 +73,10 @@ struct _GArchProcessor
get_processor_context_fc get_ctx; /* Obtention d'un contexte #1 */
get_decomp_context_fc get_dec_ctx; /* Obtention d'un contexte #2 */
+ GArchInstruction **instructions; /* Instructions désassemblées */
+ size_t instr_allocated; /* Taille de la liste allouée */
+ size_t instr_count; /* Taille de la liste aplatie */
+
};
diff --git a/src/arch/processor.c b/src/arch/processor.c
index 0b33552..c2d190b 100644
--- a/src/arch/processor.c
+++ b/src/arch/processor.c
@@ -24,12 +24,16 @@
#include "processor.h"
+#include <malloc.h>
+#include <stdlib.h>
+
#include "instruction-int.h"
#include "processor-int.h"
+#include "raw.h"
@@ -294,3 +298,146 @@ GArchInstruction *g_arch_processor_disassemble(const GArchProcessor *proc, GProc
return result;
}
+
+
+
+/* ---------------------------------------------------------------------------------- */
+/* MANIPULATIONS DES INSTRUCTIONS DESASSEMBLEES */
+/* ---------------------------------------------------------------------------------- */
+
+
+/******************************************************************************
+* *
+* Paramètres : proc = architecture visée par la procédure. *
+* list = liste des instructions désassemblées. *
+* *
+* Description : Note les instructions désassemblées avec une architecture. *
+* *
+* Retour : - *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+void g_arch_processor_set_disassembled_instructions(GArchProcessor *proc, GArchInstruction *list)
+{
+ GArchInstruction *iter; /* Boucle de parcours */
+
+ ainstr_list_for_each(iter, list)
+ {
+ /* Mise à disposition de d'avantage d'espace */
+ if (proc->instr_allocated == proc->instr_count)
+ {
+ proc->instr_allocated += INSTR_ALLOC_BLOCK;
+
+ proc->instructions = (GArchInstruction **)realloc(proc->instructions,
+ proc->instr_allocated * sizeof(GArchInstruction *));
+
+ }
+
+ proc->instructions[proc->instr_count++] = iter;
+
+ }
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : proc = architecture visée par la procédure. *
+* *
+* Description : Fournit les instructions désassemblées pour une architecture.*
+* *
+* Retour : Liste des instructions désassemblées ou NULL si aucune. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchInstruction *g_arch_processor_get_disassembled_instructions(const GArchProcessor *proc)
+{
+ return (proc->instr_count > 0 ? proc->instructions[0] : NULL);
+
+}
+
+
+
+
+
+
+/******************************************************************************
+* *
+* Paramètres : proc = processeur recensant diverses instructions. *
+* addr = position en mémoire ou physique à chercher. *
+* *
+* Description : Recherche une instruction d'après son adresse. *
+* *
+* Retour : Instruction trouvée à l'adresse donnée, NULL si aucune. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchInstruction *g_arch_processor_find_instr_by_address(const GArchProcessor *proc, const vmpa2t *addr)
+{
+ GArchInstruction *result; /* Trouvaille à retourner */
+ GArchInstruction *fake; /* Coquille vide à comparer */
+ void *ptr; /* Résultat des recherches */
+ size_t i; /* Boucle de parcours */
+ const mrange_t *range; /* Emplacement d'instruction */
+
+ if (has_phys_addr(addr))
+ {
+ fake = g_raw_instruction_new_from_value(addr, MDS_8_BITS_UNSIGNED, 0);
+
+ int search_for_instr_by_addr(const GArchInstruction **a, const GArchInstruction **b)
+ {
+ const mrange_t *range_a; /* Emplacement pour l'instr. A */
+ const mrange_t *range_b; /* Emplacement pour l'instr. B */
+
+ range_a = g_arch_instruction_get_range(*a);
+ range_b = g_arch_instruction_get_range(*b);
+
+ /*
+ printf(" -- cmp -- 0x%08x vs 0x%08x => %d\n",
+ (unsigned int)range_a->addr.virtual,
+ (unsigned int)range_b->addr.virtual,
+ cmp_vmpa(get_mrange_addr(range_a), get_mrange_addr(range_b)));
+ */
+
+ return cmp_vmpa(get_mrange_addr(range_a), get_mrange_addr(range_b));
+
+ }
+
+ ptr = bsearch(&fake, proc->instructions, proc->instr_count,
+ sizeof(GArchInstruction *), (__compar_fn_t)search_for_instr_by_addr);
+
+ g_object_unref(G_OBJECT(fake));
+
+ result = (ptr != NULL ? *((GArchInstruction **)ptr) : NULL);
+
+ }
+
+ else
+ {
+ result = NULL;
+
+ for (i = 0; i < proc->instr_count && result == NULL; i++)
+ {
+ range = g_arch_instruction_get_range(proc->instructions[i]);
+
+ if (cmp_vmpa(addr, get_mrange_addr(range)) == 0)
+ result = proc->instructions[i];
+
+ }
+
+ /*
+ for (i = 0; i < proc->instr_count; i++)
+ printf(" # %04zu 0x%08x\n", i, proc->instructions[i]->range.addr.virtual);
+ */
+
+ }
+
+ return result;
+
+}
diff --git a/src/arch/processor.h b/src/arch/processor.h
index 725307f..3eeefd5 100644
--- a/src/arch/processor.h
+++ b/src/arch/processor.h
@@ -78,4 +78,20 @@ GArchInstruction *g_arch_processor_disassemble(const GArchProcessor *, GProcCont
+/* ------------------ MANIPULATIONS DES INSTRUCTIONS DESASSEMBLEES ------------------ */
+
+
+/* Note les instructions désassemblées avec une architecture. */
+void g_arch_processor_set_disassembled_instructions(GArchProcessor *, GArchInstruction *);
+
+/* Fournit les instructions désassemblées pour une architecture. */
+GArchInstruction *g_arch_processor_get_disassembled_instructions(const GArchProcessor *);
+
+
+
+/* Recherche une instruction d'après son adresse. */
+GArchInstruction *g_arch_processor_find_instr_by_address(const GArchProcessor *, const vmpa2t *);
+
+
+
#endif /* _ARCH_PROCESSOR_H */