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-rw-r--r--src/arch/x86/Makefile.am1
-rw-r--r--src/arch/x86/instruction.c5
-rw-r--r--src/arch/x86/instruction.h4
-rw-r--r--src/arch/x86/op_mul.c66
-rw-r--r--src/arch/x86/op_test.c36
-rw-r--r--src/arch/x86/opcodes.h6
-rw-r--r--src/arch/x86/processor.c11
7 files changed, 129 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.am b/src/arch/x86/Makefile.am
index 3b36490..4b4222a 100644
--- a/src/arch/x86/Makefile.am
+++ b/src/arch/x86/Makefile.am
@@ -17,6 +17,7 @@ libarchx86_la_SOURCES = \
op_lea.c \
op_leave.c \
op_mov.c \
+ op_mul.c \
op_nop.c \
op_not.c \
op_or.c \
diff --git a/src/arch/x86/instruction.c b/src/arch/x86/instruction.c
index f68ec59..f9dd828 100644
--- a/src/arch/x86/instruction.c
+++ b/src/arch/x86/instruction.c
@@ -289,8 +289,13 @@ static x86_instruction _instructions[XOP_COUNT] = {
[XOP_HLT] = { false, 0xf4, IDX_TO_EXT(-1), "hlt", XPX_NONE },
+
+ [XOP_TEST_RM1632_IMM1632] = { false, 0xf7, IDX_TO_EXT(0), "test", XPX_OPERAND_SIZE_OVERRIDE },
+ [XOP_TEST_RM1632_IMM1632_BIS] = { false, 0xf7, IDX_TO_EXT(1), "test", XPX_OPERAND_SIZE_OVERRIDE },
[XOP_NOT_RM1632] = { false, 0xf7, IDX_TO_EXT(2), "not", XPX_OPERAND_SIZE_OVERRIDE },
+ [XOP_IMUL_RM1632] = { false, 0xf7, IDX_TO_EXT(5), "imul", XPX_OPERAND_SIZE_OVERRIDE },
+
[XOP_CLD] = { false, 0xfc, IDX_TO_EXT(-1), "cld", XPX_NONE },
diff --git a/src/arch/x86/instruction.h b/src/arch/x86/instruction.h
index 6186e96..460dd0e 100644
--- a/src/arch/x86/instruction.h
+++ b/src/arch/x86/instruction.h
@@ -234,8 +234,12 @@ typedef enum _X86Opcodes
XOP_HLT, /* hlt (0xf4) */
+ XOP_TEST_RM1632_IMM1632, /* test ([0x66] 0xf7 0) */
+ XOP_TEST_RM1632_IMM1632_BIS, /* test ([0x66] 0xf7 1) */
XOP_NOT_RM1632, /* not ([0x66] 0xf7 2) */
+ XOP_IMUL_RM1632, /* imul ([0x66] 0xf7 5) */
+
XOP_CLD, /* cld (0xfc) */
XOP_CALL_RM1632, /* call ([0x66] 0xff 2) */
diff --git a/src/arch/x86/op_mul.c b/src/arch/x86/op_mul.c
new file mode 100644
index 0000000..e80bad2
--- /dev/null
+++ b/src/arch/x86/op_mul.c
@@ -0,0 +1,66 @@
+
+/* OpenIDA - Outil d'analyse de fichiers binaires
+ * op_mul.c - décodage des multiplications
+ *
+ * Copyright (C) 2009 Cyrille Bagard
+ *
+ * This file is part of OpenIDA.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include <malloc.h>
+
+
+#include "../instruction-int.h"
+#include "opcodes.h"
+#include "operand.h"
+
+
+
+/******************************************************************************
+* *
+* Paramètres : data = flux de données à analyser. *
+* pos = position courante dans ce flux. [OUT] *
+* len = taille totale des données à analyser. *
+* offset = adresse virtuelle de l'instruction. *
+* proc = architecture ciblée par le désassemblage. *
+* *
+* Description : Décode une instruction de type 'imul' (16 ou 32 bits). *
+* *
+* Retour : Instruction mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchInstruction *x86_read_instr_imul_rm1632(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc)
+{
+ GArchInstruction *result; /* Instruction à retourner */
+ AsmOperandSize oprsize; /* Taille des opérandes */
+
+ result = g_x86_instruction_new(XOP_IMUL_RM1632);
+
+ oprsize = g_x86_processor_get_operand_size(proc, prefix);
+
+ if (!x86_read_one_operand(result, data, pos, len, X86_OTP_RM1632, oprsize))
+ {
+ /* TODO free(result);*/
+ return NULL;
+ }
+
+ return result;
+
+}
diff --git a/src/arch/x86/op_test.c b/src/arch/x86/op_test.c
index 39f5777..3ee2fe2 100644
--- a/src/arch/x86/op_test.c
+++ b/src/arch/x86/op_test.c
@@ -148,6 +148,42 @@ GArchInstruction *x86_read_instr_test_rm8_r8(const bin_t *data, off_t *pos, off_
* *
******************************************************************************/
+GArchInstruction *x86_read_instr_test_rm1632_imm1632(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc)
+{
+ GArchInstruction *result; /* Instruction à retourner */
+ AsmOperandSize oprsize; /* Taille des opérandes */
+
+ result = g_x86_instruction_new(XOP_TEST_RM1632_IMM1632);
+
+ oprsize = g_x86_processor_get_operand_size(proc, prefix);
+
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM1632, X86_OTP_IMM1632, oprsize))
+ {
+ /* TODO free(result);*/
+ return NULL;
+ }
+
+ return result;
+
+}
+
+
+/******************************************************************************
+* *
+* Paramètres : data = flux de données à analyser. *
+* pos = position courante dans ce flux. [OUT] *
+* len = taille totale des données à analyser. *
+* offset = adresse virtuelle de l'instruction. *
+* proc = architecture ciblée par le désassemblage. *
+* *
+* Description : Décode une instruction de type 'test' (16 ou 32 bits). *
+* *
+* Retour : Instruction mise en place ou NULL. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
GArchInstruction *x86_read_instr_test_rm1632_r1632(const bin_t *data, off_t *pos, off_t len, vmpa_t addr, X86Prefix prefix, const GX86Processor *proc)
{
GArchInstruction *result; /* Instruction à retourner */
diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h
index 67858b0..e2ec5a6 100644
--- a/src/arch/x86/opcodes.h
+++ b/src/arch/x86/opcodes.h
@@ -108,6 +108,9 @@ GArchInstruction *x86_read_instr_dec_r1632(const bin_t *, off_t *, off_t, vmpa_t
/* Décode une instruction de type 'hlt'. */
GArchInstruction *x86_read_instr_hlt(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'imul' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_imul_rm1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'inc' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_inc_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
@@ -319,6 +322,9 @@ GArchInstruction *x86_read_instr_test_e_ax_imm1632(const bin_t *, off_t *, off_t
GArchInstruction *x86_read_instr_test_rm8_r8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
/* Décode une instruction de type 'test' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_test_rm1632_imm1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
+/* Décode une instruction de type 'test' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_test_rm1632_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
/* Décode une instruction de type 'xchg' (16 ou 32 bits). */
diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c
index aae4fe3..8af84b2 100644
--- a/src/arch/x86/processor.c
+++ b/src/arch/x86/processor.c
@@ -695,11 +695,22 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor
break;
+ case XOP_TEST_RM1632_IMM1632:
+ case XOP_TEST_RM1632_IMM1632_BIS:
+ result = x86_read_instr_test_rm1632_imm1632(data, pos, len, addr, prefix, proc);
+ break;
+
case XOP_NOT_RM1632:
result = x86_read_instr_not_rm1632(data, pos, len, addr, prefix, proc);
break;
+ case XOP_IMUL_RM1632:
+ result = x86_read_instr_imul_rm1632(data, pos, len, addr, prefix, proc);
+ break;
+
+
+
case XOP_CLD:
result = x86_read_instr_cld(data, pos, len, addr, prefix, proc);
break;
generated by cgit v0.11.2-87-g4458 at 2024-12-29 19:32:35 (GMT)