diff options
Diffstat (limited to 'ARM/trafman/trafman.objdump')
| -rw-r--r-- | ARM/trafman/trafman.objdump | 498 |
1 files changed, 498 insertions, 0 deletions
diff --git a/ARM/trafman/trafman.objdump b/ARM/trafman/trafman.objdump new file mode 100644 index 0000000..27fc48c --- /dev/null +++ b/ARM/trafman/trafman.objdump @@ -0,0 +1,498 @@ + +trafman: file format elf32-littlearm + + +Disassembly of section .init: + +0000867c <.init>: + 867c: e92d4008 push {r3, lr} + 8680: eb00006d bl 883c <stderr-0x984c> + 8684: e8bd8008 pop {r3, pc} + +Disassembly of section .plt: + +00008688 <.plt>: + 8688: e52de004 push {lr} ; (str lr, [sp, #-4]!) + 868c: e59fe004 ldr lr, [pc, #4] ; 8698 <stderr-0x99f0> + 8690: e08fe00e add lr, pc, lr + 8694: e5bef008 ldr pc, [lr, #8]! + 8698: 00009968 andeq r9, r0, r8, ror #18 + 869c: e28fc600 add ip, pc, #0 + 86a0: e28cca09 add ip, ip, #36864 ; 0x9000 + 86a4: e5bcf968 ldr pc, [ip, #2408]! ; 0x968 + 86a8: e28fc600 add ip, pc, #0 + 86ac: e28cca09 add ip, ip, #36864 ; 0x9000 + 86b0: e5bcf960 ldr pc, [ip, #2400]! ; 0x960 + 86b4: e28fc600 add ip, pc, #0 + 86b8: e28cca09 add ip, ip, #36864 ; 0x9000 + 86bc: e5bcf958 ldr pc, [ip, #2392]! ; 0x958 + 86c0: e28fc600 add ip, pc, #0 + 86c4: e28cca09 add ip, ip, #36864 ; 0x9000 + 86c8: e5bcf950 ldr pc, [ip, #2384]! ; 0x950 + 86cc: e28fc600 add ip, pc, #0 + 86d0: e28cca09 add ip, ip, #36864 ; 0x9000 + 86d4: e5bcf948 ldr pc, [ip, #2376]! ; 0x948 + 86d8: e28fc600 add ip, pc, #0 + 86dc: e28cca09 add ip, ip, #36864 ; 0x9000 + 86e0: e5bcf940 ldr pc, [ip, #2368]! ; 0x940 + 86e4: e28fc600 add ip, pc, #0 + 86e8: e28cca09 add ip, ip, #36864 ; 0x9000 + 86ec: e5bcf938 ldr pc, [ip, #2360]! ; 0x938 + 86f0: e28fc600 add ip, pc, #0 + 86f4: e28cca09 add ip, ip, #36864 ; 0x9000 + 86f8: e5bcf930 ldr pc, [ip, #2352]! ; 0x930 + 86fc: e28fc600 add ip, pc, #0 + 8700: e28cca09 add ip, ip, #36864 ; 0x9000 + 8704: e5bcf928 ldr pc, [ip, #2344]! ; 0x928 + 8708: e28fc600 add ip, pc, #0 + 870c: e28cca09 add ip, ip, #36864 ; 0x9000 + 8710: e5bcf920 ldr pc, [ip, #2336]! ; 0x920 + 8714: e28fc600 add ip, pc, #0 + 8718: e28cca09 add ip, ip, #36864 ; 0x9000 + 871c: e5bcf918 ldr pc, [ip, #2328]! ; 0x918 + 8720: e28fc600 add ip, pc, #0 + 8724: e28cca09 add ip, ip, #36864 ; 0x9000 + 8728: e5bcf910 ldr pc, [ip, #2320]! ; 0x910 + 872c: e28fc600 add ip, pc, #0 + 8730: e28cca09 add ip, ip, #36864 ; 0x9000 + 8734: e5bcf908 ldr pc, [ip, #2312]! ; 0x908 + 8738: e28fc600 add ip, pc, #0 + 873c: e28cca09 add ip, ip, #36864 ; 0x9000 + 8740: e5bcf900 ldr pc, [ip, #2304]! ; 0x900 + 8744: e28fc600 add ip, pc, #0 + 8748: e28cca09 add ip, ip, #36864 ; 0x9000 + 874c: e5bcf8f8 ldr pc, [ip, #2296]! ; 0x8f8 + 8750: e28fc600 add ip, pc, #0 + 8754: e28cca09 add ip, ip, #36864 ; 0x9000 + 8758: e5bcf8f0 ldr pc, [ip, #2288]! ; 0x8f0 + 875c: e28fc600 add ip, pc, #0 + 8760: e28cca09 add ip, ip, #36864 ; 0x9000 + 8764: e5bcf8e8 ldr pc, [ip, #2280]! ; 0x8e8 + 8768: e28fc600 add ip, pc, #0 + 876c: e28cca09 add ip, ip, #36864 ; 0x9000 + 8770: e5bcf8e0 ldr pc, [ip, #2272]! ; 0x8e0 + 8774: e28fc600 add ip, pc, #0 + 8778: e28cca09 add ip, ip, #36864 ; 0x9000 + 877c: e5bcf8d8 ldr pc, [ip, #2264]! ; 0x8d8 + 8780: e28fc600 add ip, pc, #0 + 8784: e28cca09 add ip, ip, #36864 ; 0x9000 + 8788: e5bcf8d0 ldr pc, [ip, #2256]! ; 0x8d0 + 878c: e28fc600 add ip, pc, #0 + 8790: e28cca09 add ip, ip, #36864 ; 0x9000 + 8794: e5bcf8c8 ldr pc, [ip, #2248]! ; 0x8c8 + 8798: e28fc600 add ip, pc, #0 + 879c: e28cca09 add ip, ip, #36864 ; 0x9000 + 87a0: e5bcf8c0 ldr pc, [ip, #2240]! ; 0x8c0 + 87a4: e28fc600 add ip, pc, #0 + 87a8: e28cca09 add ip, ip, #36864 ; 0x9000 + 87ac: e5bcf8b8 ldr pc, [ip, #2232]! ; 0x8b8 + 87b0: e28fc600 add ip, pc, #0 + 87b4: e28cca09 add ip, ip, #36864 ; 0x9000 + 87b8: e5bcf8b0 ldr pc, [ip, #2224]! ; 0x8b0 + 87bc: e28fc600 add ip, pc, #0 + 87c0: e28cca09 add ip, ip, #36864 ; 0x9000 + 87c4: e5bcf8a8 ldr pc, [ip, #2216]! ; 0x8a8 + 87c8: e28fc600 add ip, pc, #0 + 87cc: e28cca09 add ip, ip, #36864 ; 0x9000 + 87d0: e5bcf8a0 ldr pc, [ip, #2208]! ; 0x8a0 + 87d4: e28fc600 add ip, pc, #0 + 87d8: e28cca09 add ip, ip, #36864 ; 0x9000 + 87dc: e5bcf898 ldr pc, [ip, #2200]! ; 0x898 + +Disassembly of section .text: + +000087e0 <.text>: + 87e0: 2000b508 andcs fp, r0, r8, lsl #10 + 87e4: fa6af000 blx 1ac47ec <stdout+0x1ab2760> + 87e8: 038cf242 orreq pc, ip, #536870916 ; 0x20000004 + 87ec: 0301f2c0 movweq pc, #4800 ; 0x12c0 ; <UNPREDICTABLE> + 87f0: f7ff6818 ; <UNDEFINED> instruction: 0xf7ff6818 + 87f4: f242ef6c vmax.f32 q15, q1, q14 + 87f8: f2c00388 vsubw.s8 q8, q8, d8 + 87fc: 68180301 ldmdavs r8, {r0, r8, r9} + 8800: ef64f7ff svc 0x0064f7ff + 8804: f7ff2000 ; <UNDEFINED> instruction: 0xf7ff2000 + 8808: bf00efaa svclt 0x0000efaa + 880c: 0b00f04f bleq 44950 <stdout+0x328c4> + 8810: 0e00f04f cdpeq 0, 0, cr15, cr0, cr15, {2} + 8814: 466abc02 strbtmi fp, [sl], -r2, lsl #24 + 8818: b401b404 strlt fp, [r1], #-1028 ; 0x404 + 881c: c010f8df ; <UNDEFINED> instruction: 0xc010f8df + 8820: cd04f84d stcgt 8, cr15, [r4, #-308] ; 0xfffffecc + 8824: 4b044803 blmi 11a838 <stdout+0x1087ac> + 8828: ef80f7ff svc 0x0080f7ff + 882c: efccf7ff svc 0x00ccf7ff + 8830: 00008ded andeq r8, r0, sp, ror #27 + 8834: 000087e1 andeq r8, r0, r1, ror #15 + 8838: 00008dad andeq r8, r0, sp, lsr #27 + 883c: e59f3014 ldr r3, [pc, #20] ; 8858 <stderr-0x9830> + 8840: e59f2014 ldr r2, [pc, #20] ; 885c <stderr-0x982c> + 8844: e08f3003 add r3, pc, r3 + 8848: e7932002 ldr r2, [r3, r2] + 884c: e3520000 cmp r2, #0 + 8850: 012fff1e bxeq lr + 8854: eaffffba b 8744 <stderr-0x9944> + 8858: 000097b4 ; <UNDEFINED> instruction: 0x000097b4 + 885c: 00000078 andeq r0, r0, r8, ror r0 + 8860: f2424b07 vqdmulh.s<illegal width 8> d20, d2, d7 + 8864: f2c00084 vaddl.s8 q8, d16, d4 + 8868: 1a1b0001 bne 6c8874 <stdout+0x6b67e8> + 886c: d8002b06 stmdale r0, {r1, r2, r8, r9, fp, sp} + 8870: f2404770 vaba.s8 q10, q0, q8 + 8874: f2c00300 vsubw.s8 q8, q0, d0 + 8878: 2b000300 blcs 9480 <stderr-0x8c08> + 887c: 4718d0f8 ; <UNDEFINED> instruction: 0x4718d0f8 + 8880: 00012087 andeq r2, r1, r7, lsl #1 + 8884: 0384f242 orreq pc, r4, #536870916 ; 0x20000004 + 8888: 0084f242 addeq pc, r4, r2, asr #4 + 888c: 0301f2c0 movweq pc, #4800 ; 0x12c0 ; <UNPREDICTABLE> + 8890: 0001f2c0 andeq pc, r1, r0, asr #5 + 8894: 109b1a1b addsne r1, fp, fp, lsl sl + 8898: 73d3eb03 bicsvc lr, r3, #3072 ; 0xc00 + 889c: d1001059 qaddle r1, r9, r0 + 88a0: f2404770 vaba.s8 q10, q0, q8 + 88a4: f2c00200 vsubl.s8 q8, d0, d0 + 88a8: 2a000200 bcs 90b0 <stderr-0x8fd8> + 88ac: 4710d0f8 ; <UNDEFINED> instruction: 0x4710d0f8 + 88b0: f242b510 vqrshl.s8 d27, d0, d2 + 88b4: f2c00490 ; <UNDEFINED> instruction: 0xf2c00490 + 88b8: 78230401 stmdavc r3!, {r0, sl} + 88bc: f7ffb91b ; <UNDEFINED> instruction: 0xf7ffb91b + 88c0: 2301ffcf movwcs pc, #8143 ; 0x1fcf ; <UNPREDICTABLE> + 88c4: bd107023 ldclt 0, cr7, [r0, #-140] ; 0xffffff74 + 88c8: 7014f641 andsvc pc, r4, r1, asr #12 + 88cc: f2c0b508 vabal.s8 <illegal reg q13.5>, d0, d8 + 88d0: 68030001 stmdavs r3, {r0} + 88d4: f240b12b vrhadd.s8 d27, d0, d27 + 88d8: f2c00300 vsubw.s8 q8, q0, d0 + 88dc: b1030300 mrslt r0, SP_svc + 88e0: e8bd4798 pop {r3, r4, r7, r8, r9, sl, lr} + 88e4: f7ff4008 ; <UNDEFINED> instruction: 0xf7ff4008 + 88e8: bf00bfcd svclt 0x0000bfcd + 88ec: b5f02300 ldrblt r2, [r0, #768]! ; 0x300 + 88f0: b0834606 addlt r4, r3, r6, lsl #12 + 88f4: 461c460f ldrmi r4, [ip], -pc, lsl #12 + 88f8: f805ad02 ; <UNDEFINED> instruction: 0xf805ad02 + 88fc: 46303d08 ldrtmi r3, [r0], -r8, lsl #26 + 8900: 22014669 andcs r4, r1, #110100480 ; 0x6900000 + 8904: eedcf7ff mrc 7, 6, APSR_nzcv, cr12, cr15, {7} + 8908: dd0c2800 stcle 8, cr2, [ip, #-0] + 890c: 3000f89d mulcc r0, sp, r8 + 8910: bf9c2c2a svclt 0x009c2c2a + 8914: 3401553b strcc r5, [r1], #-1339 ; 0x53b + 8918: d1f02b0a mvnsle r2, sl, lsl #22 + 891c: 23001e60 movwcs r1, #3680 ; 0xe60 + 8920: b003543b andlt r5, r3, fp, lsr r4 + 8924: 2000bdf0 strdcs fp, [r0], -r0 + 8928: ef18f7ff svc 0x0018f7ff + 892c: b5f02300 ldrblt r2, [r0, #768]! ; 0x300 + 8930: b0834606 addlt r4, r3, r6, lsl #12 + 8934: 461c460f ldrmi r4, [ip], -pc, lsl #12 + 8938: f805ad02 ; <UNDEFINED> instruction: 0xf805ad02 + 893c: 46303d08 ldrtmi r3, [r0], -r8, lsl #26 + 8940: 22014669 andcs r4, r1, #110100480 ; 0x6900000 + 8944: eebcf7ff mrc 7, 5, APSR_nzcv, cr12, cr15, {7} + 8948: dd0c2800 stcle 8, cr2, [ip, #-0] + 894c: 3000f89d mulcc r0, sp, r8 + 8950: bf9c2c02 svclt 0x009c2c02 + 8954: 3401553b strcc r5, [r1], #-1339 ; 0x53b + 8958: d1f02b0a mvnsle r2, sl, lsl #22 + 895c: 23001e60 movwcs r1, #3680 ; 0xe60 + 8960: b003543b andlt r5, r3, fp, lsr r4 + 8964: 2000bdf0 strdcs fp, [r0], -r0 + 8968: eef8f7ff mrc 7, 7, APSR_nzcv, cr8, cr15, {7} + 896c: b5f02300 ldrblt r2, [r0, #768]! ; 0x300 + 8970: b0834606 addlt r4, r3, r6, lsl #12 + 8974: 461c460f ldrmi r4, [ip], -pc, lsl #12 + 8978: f805ad02 ; <UNDEFINED> instruction: 0xf805ad02 + 897c: 46303d08 ldrtmi r3, [r0], -r8, lsl #26 + 8980: 22014669 andcs r4, r1, #110100480 ; 0x6900000 + 8984: ee9cf7ff mrc 7, 4, APSR_nzcv, cr12, cr15, {7} + 8988: dd0c2800 stcle 8, cr2, [ip, #-0] + 898c: 3000f89d mulcc r0, sp, r8 + 8990: bf9c2c3e svclt 0x009c2c3e + 8994: 3401553b strcc r5, [r1], #-1339 ; 0x53b + 8998: d1f02b0a mvnsle r2, sl, lsl #22 + 899c: 23001e60 movwcs r1, #3680 ; 0xe60 + 89a0: b003543b andlt r5, r3, fp, lsr r4 + 89a4: 2000bdf0 strdcs fp, [r0], -r0 + 89a8: eed8f7ff mrc 7, 6, APSR_nzcv, cr8, cr15, {7} + 89ac: 4604b5f0 ; <UNDEFINED> instruction: 0x4604b5f0 + 89b0: 078cf242 streq pc, [ip, r2, asr #4] + 89b4: 50fcf648 rscspl pc, ip, r8, asr #12 + 89b8: f2c0b0e3 vmla.i<illegal width 8> d27, d16, d3[4] + 89bc: f2c00701 vabdl.s8 q8, d0, d1 + 89c0: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 89c4: 6838eeae ldmdavs r8!, {r1, r2, r3, r5, r7, r9, sl, fp, sp, lr, pc} + 89c8: ee80f7ff mcr 7, 4, pc, cr0, cr15, {7} ; <UNPREDICTABLE> + 89cc: 4620a90b strtmi sl, [r0], -fp, lsl #18 + 89d0: ff8cf7ff ; <UNDEFINED> instruction: 0xff8cf7ff + 89d4: 6154f648 cmpvs r4, r8, asr #12 + 89d8: f2c0a803 vmlal.s8 q13, d0, d3 + 89dc: 22010100 andcs r0, r1, #0 + 89e0: eee0f7ff mcr 7, 7, pc, cr0, cr15, {7} ; <UNPREDICTABLE> + 89e4: d1562800 cmple r6, r0, lsl #16 + 89e8: 90004602 andls r4, r0, r2, lsl #12 + 89ec: a8034613 stmdage r3, {r0, r1, r4, r9, sl, lr} + 89f0: f7ffa90b ; <UNDEFINED> instruction: 0xf7ffa90b + 89f4: 4604ee84 strmi lr, [r4], -r4, lsl #29 + 89f8: 2801b118 stmdacs r1, {r3, r4, r8, ip, sp, pc} + 89fc: b063d035 rsblt sp, r3, r5, lsr r0 + 8a00: f246bdf0 vmla.f32 <illegal reg q13.5>, q11, q8 + 8a04: a90b2364 stmdbge fp, {r2, r5, r6, r8, r9, sp} + 8a08: 032ff2c0 msreq CPSR_fsxc, #12 + 8a0c: a8162228 ldmdage r6, {r3, r5, r9, sp} + 8a10: f7ff9316 ; <UNDEFINED> instruction: 0xf7ff9316 + 8a14: f648eece ; <UNDEFINED> instruction: 0xf648eece + 8a18: a8166184 ldmdage r6, {r2, r7, r8, sp, lr} + 8a1c: 0100f2c0 smlabteq r0, r0, r2, pc ; <UNPREDICTABLE> + 8a20: ee48f7ff mcr 7, 2, pc, cr8, cr15, {7} ; <UNPREDICTABLE> + 8a24: b3584605 cmplt r8, #5242880 ; 0x500000 + 8a28: e000ae22 and sl, r0, r2, lsr #28 + 8a2c: 4628461c ; <UNDEFINED> instruction: 0x4628461c + 8a30: eea6f7ff mcr 7, 5, pc, cr6, cr15, {7} ; <UNPREDICTABLE> + 8a34: 30015530 andcc r5, r1, r0, lsr r5 + 8a38: 0301f104 movweq pc, #4356 ; 0x1104 ; <UNPREDICTABLE> + 8a3c: 4628d1f6 ; <UNDEFINED> instruction: 0x4628d1f6 + 8a40: eeaaf7ff mcr 7, 5, pc, cr10, cr15, {7} ; <UNPREDICTABLE> + 8a44: f7ffa816 ; <UNDEFINED> instruction: 0xf7ffa816 + 8a48: 2800ee54 stmdacs r0, {r2, r4, r6, r9, sl, fp, sp, lr, pc} + 8a4c: f648db33 ; <UNDEFINED> instruction: 0xf648db33 + 8a50: 230060b4 movwcs r6, #180 ; 0xb4 + 8a54: f2c04631 vmvn.i32 d20, #16777216 ; 0x01000000 + 8a58: 55330000 ldrpl r0, [r3, #-0]! + 8a5c: ee24f7ff mcr 7, 1, pc, cr4, cr15, {7} ; <UNPREDICTABLE> + 8a60: f7ff6838 ; <UNDEFINED> instruction: 0xf7ff6838 + 8a64: b063ee34 rsblt lr, r3, r4, lsr lr + 8a68: f648bdf0 ; <UNDEFINED> instruction: 0xf648bdf0 + 8a6c: f2c060d8 vshr.s64 q11, q4, #64 + 8a70: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 8a74: 6838ee56 ldmdavs r8!, {r1, r2, r4, r6, r9, sl, fp, sp, lr, pc} + 8a78: ee28f7ff mcr 7, 1, pc, cr8, cr15, {7} ; <UNPREDICTABLE> + 8a7c: bdf0b063 ldcllt 0, cr11, [r0, #396]! ; 0x18c + 8a80: 60bcf648 adcsvs pc, ip, r8, asr #12 + 8a84: f2c0a916 vorr.i16 d26, #6 ; 0x0006 + 8a88: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 8a8c: 6838ee0e ldmdavs r8!, {r1, r2, r3, r9, sl, fp, sp, lr, pc} + 8a90: ee1cf7ff mrc 7, 0, APSR_nzcv, cr12, cr15, {7} + 8a94: f242e7b3 vaba.s8 d30, d18, d19 + 8a98: f6480388 ; <UNDEFINED> instruction: 0xf6480388 + 8a9c: f2c06068 vmla.i<illegal width 8> d22, d0, d0[6] + 8aa0: f2c00301 vsubw.s8 q8, q0, d1 + 8aa4: 681b0000 ldmdavs fp, {} ; <UNPREDICTABLE> + 8aa8: 22182101 andscs r2, r8, #1073741824 ; 0x40000000 + 8aac: ee2cf7ff mcr 7, 1, pc, cr12, cr15, {7} ; <UNPREDICTABLE> + 8ab0: f7ff2001 ; <UNDEFINED> instruction: 0xf7ff2001 + 8ab4: f648ee54 ; <UNDEFINED> instruction: 0xf648ee54 + 8ab8: a9166088 ldmdbge r6, {r3, r7, sp, lr} + 8abc: 0000f2c0 andeq pc, r0, r0, asr #5 + 8ac0: edf2f7ff ldcl 7, cr15, [r2, #1020]! ; 0x3fc + 8ac4: f7ff6838 ; <UNDEFINED> instruction: 0xf7ff6838 + 8ac8: 2000ee02 andcs lr, r0, r2, lsl #28 + 8acc: ee04f7ff mcr 7, 0, pc, cr4, cr15, {7} ; <UNPREDICTABLE> + 8ad0: e92d2300 push {r8, r9, sp} + 8ad4: 460641f0 ; <UNDEFINED> instruction: 0x460641f0 + 8ad8: 4688b082 strmi fp, [r8], r2, lsl #1 + 8adc: 461c1e57 ; <UNDEFINED> instruction: 0x461c1e57 + 8ae0: f805ad02 ; <UNDEFINED> instruction: 0xf805ad02 + 8ae4: 46303d08 ldrtmi r3, [r0], -r8, lsl #26 + 8ae8: 22014669 andcs r4, r1, #110100480 ; 0x6900000 + 8aec: ede8f7ff stcl 7, cr15, [r8, #1020]! ; 0x3fc + 8af0: dd112800 ldcle 8, cr2, [r1, #-0] + 8af4: 3000f89d mulcc r0, sp, r8 + 8af8: bf3c42bc svclt 0x003c42bc + 8afc: 3004f808 andcc pc, r4, r8, lsl #16 + 8b00: 2b0a3401 blcs 295b0c <stdout+0x283a80> + 8b04: b104d1ef smlattlt r4, pc, r1, sp + 8b08: 23003c01 movwcs r3, #3073 ; 0xc01 + 8b0c: f8084620 ; <UNDEFINED> instruction: 0xf8084620 + 8b10: b0023004 andlt r3, r2, r4 + 8b14: 81f0e8bd ldrhhi lr, [r0, #141]! ; 0x8d + 8b18: f7ff2000 ; <UNDEFINED> instruction: 0xf7ff2000 + 8b1c: bf00ee20 svclt 0x0000ee20 + 8b20: 4605b570 ; <UNDEFINED> instruction: 0x4605b570 + 8b24: 048cf242 streq pc, [ip], #578 ; 0x242 + 8b28: 60e8f648 rscvs pc, r8, r8, asr #12 + 8b2c: 6da5f5ad cfstr32vs mvfx15, [r5, #692]! ; 0x2b4 + 8b30: 0401f2c0 streq pc, [r1], #-704 ; 0x2c0 + 8b34: 0000f2c0 andeq pc, r0, r0, asr #5 + 8b38: edf2f7ff ldcl 7, cr15, [r2, #1020]! ; 0x3fc + 8b3c: f7ff6820 ; <UNDEFINED> instruction: 0xf7ff6820 + 8b40: a90aedc6 stmdbge sl, {r1, r2, r6, r7, r8, sl, fp, sp, lr, pc} + 8b44: f7ff4628 ; <UNDEFINED> instruction: 0xf7ff4628 + 8b48: f648fed1 ; <UNDEFINED> instruction: 0xf648fed1 + 8b4c: a8026154 stmdage r2, {r2, r4, r6, r8, sp, lr} + 8b50: 0100f2c0 smlabteq r0, r0, r2, pc ; <UNPREDICTABLE> + 8b54: f7ff2201 ; <UNDEFINED> instruction: 0xf7ff2201 + 8b58: 2800ee26 stmdacs r0, {r1, r2, r5, r9, sl, fp, sp, lr, pc} + 8b5c: 4602d15f ; <UNDEFINED> instruction: 0x4602d15f + 8b60: 46139000 ldrmi r9, [r3], -r0 + 8b64: a90aa802 stmdbge sl, {r1, fp, sp, pc} + 8b68: edc8f7ff stcl 7, cr15, [r8, #1020] ; 0x3fc + 8b6c: 2801b120 stmdacs r1, {r5, r8, ip, sp, pc} + 8b70: f50dd037 ; <UNDEFINED> instruction: 0xf50dd037 + 8b74: bd706da5 ldcllt 13, cr6, [r0, #-660]! ; 0xfffffd6c + 8b78: 7028f648 eorvc pc, r8, r8, asr #12 + 8b7c: 0000f2c0 andeq pc, r0, r0, asr #5 + 8b80: edcef7ff stcl 7, cr15, [lr, #1020] ; 0x3fc + 8b84: f7ff6820 ; <UNDEFINED> instruction: 0xf7ff6820 + 8b88: f246eda2 vadd.f32 d30, d22, d18 + 8b8c: a90a2364 stmdbge sl, {r2, r5, r6, r8, r9, sp} + 8b90: 032ff2c0 msreq CPSR_fsxc, #12 + 8b94: 102bf20d eorne pc, fp, sp, lsl #4 + 8b98: f7ff934a ; <UNDEFINED> instruction: 0xf7ff934a + 8b9c: a84aedbc stmdage sl, {r2, r3, r4, r5, r7, r8, sl, fp, sp, lr, pc}^ + 8ba0: f44f2141 vst4.16 {d18,d20,d22,d24}, [pc], r1 + 8ba4: f7ff72d0 ; <UNDEFINED> instruction: 0xf7ff72d0 + 8ba8: 1e06edd4 mcrne 13, 0, lr, cr6, cr4, {6} + 8bac: f648db23 ; <UNDEFINED> instruction: 0xf648db23 + 8bb0: f2c07050 vmov.i32 <illegal reg q11.5>, #0 ; 0x00000000 + 8bb4: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 8bb8: 6820edb4 stmdavs r0!, {r2, r4, r5, r7, r8, sl, fp, sp, lr, pc} + 8bbc: ed86f7ff stc 7, cr15, [r6, #1020] ; 0x3fc + 8bc0: 4628a94a strtmi sl, [r8], -sl, asr #18 + 8bc4: 6280f44f addvs pc, r0, #1325400064 ; 0x4f000000 + 8bc8: ff82f7ff ; <UNDEFINED> instruction: 0xff82f7ff + 8bcc: 4602a94a strmi sl, [r2], -sl, asr #18 + 8bd0: f7ff4630 ; <UNDEFINED> instruction: 0xf7ff4630 + 8bd4: 4630eddc ; <UNDEFINED> instruction: 0x4630eddc + 8bd8: edfcf7ff ldcl 7, cr15, [ip, #1020]! ; 0x3fc + 8bdc: 6da5f50d cfstr32vs mvfx15, [r5, #52]! ; 0x34 + 8be0: f648bd70 ; <UNDEFINED> instruction: 0xf648bd70 + 8be4: f2c07070 vmvn.i32 <illegal reg q11.5>, #0 ; 0x00000000 + 8be8: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 8bec: 6820ed9a stmdavs r0!, {r1, r3, r4, r7, r8, sl, fp, sp, lr, pc} + 8bf0: ed6cf7ff stcl 7, cr15, [ip, #-1020]! ; 0xfffffc04 + 8bf4: f242e7bd vaba.s8 d30, d18, d29 + 8bf8: f2c00388 vsubw.s8 q8, q8, d8 + 8bfc: 681c0301 ldmdavs ip, {r0, r8, r9} + 8c00: edb8f7ff ldc 7, cr15, [r8, #1020]! ; 0x3fc + 8c04: f7ff6800 ; <UNDEFINED> instruction: 0xf7ff6800 + 8c08: f648ed98 ; <UNDEFINED> instruction: 0xf648ed98 + 8c0c: 46037138 ; <UNDEFINED> instruction: 0x46037138 + 8c10: 4620aa4a strtmi sl, [r0], -sl, asr #20 + 8c14: 0100f2c0 smlabteq r0, r0, r2, pc ; <UNPREDICTABLE> + 8c18: eda6f7ff stc 7, cr15, [r6, #1020]! ; 0x3fc + 8c1c: f242e7a9 vabd.s8 d30, d18, d25 + 8c20: f6480388 ; <UNDEFINED> instruction: 0xf6480388 + 8c24: f2c06068 vmla.i<illegal width 8> d22, d0, d0[6] + 8c28: f2c00301 vsubw.s8 q8, q0, d1 + 8c2c: 681b0000 ldmdavs fp, {} ; <UNPREDICTABLE> + 8c30: 22182101 andscs r2, r8, #1073741824 ; 0x40000000 + 8c34: ed68f7ff stcl 7, cr15, [r8, #-1020]! ; 0xfffffc04 + 8c38: f7ff2001 ; <UNDEFINED> instruction: 0xf7ff2001 + 8c3c: bf00ed90 svclt 0x0000ed90 + 8c40: 4605b530 ; <UNDEFINED> instruction: 0x4605b530 + 8c44: 7080f648 addvc pc, r0, r8, asr #12 + 8c48: f2c0b083 vaddl.s8 <illegal reg q13.5>, d16, d3 + 8c4c: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 8c50: f242ed68 vadd.f32 q15, q1, q12 + 8c54: f2c0038c vsubw.s8 q8, q8, d12 + 8c58: 68180301 ldmdavs r8, {r0, r8, r9} + 8c5c: ed36f7ff ldc 7, cr15, [r6, #-1020]! ; 0xfffffc04 + 8c60: 4628a901 strtmi sl, [r8], -r1, lsl #18 + 8c64: fe62f7ff mcr2 7, 3, pc, cr2, cr15, {7} ; <UNPREDICTABLE> + 8c68: 2100a801 tstcs r0, r1, lsl #16 + 8c6c: f7ff220a ; <UNDEFINED> instruction: 0xf7ff220a + 8c70: 2802ed16 stmdacs r2, {r1, r2, r4, r8, sl, fp, sp, lr, pc} + 8c74: d01a4604 andsle r4, sl, r4, lsl #12 + 8c78: d00a2817 andle r2, sl, r7, lsl r8 + 8c7c: d0022801 andle r2, r2, r1, lsl #16 + 8c80: b0034620 andlt r4, r3, r0, lsr #12 + 8c84: 4628bd30 ; <UNDEFINED> instruction: 0x4628bd30 + 8c88: fe90f7ff mrc2 7, 4, pc, cr0, cr15, {7} + 8c8c: b0034620 andlt r4, r3, r0, lsr #12 + 8c90: f242bd30 vmla.f32 d27, d2, d16 + 8c94: f6480310 ; <UNDEFINED> instruction: 0xf6480310 + 8c98: f2c070c4 vmla.i<illegal width 8> d23, d16, d0[1] + 8c9c: f2c00301 vsubw.s8 q8, q0, d1 + 8ca0: 68190000 ldmdavs r9, {} ; <UNPREDICTABLE> + 8ca4: ed00f7ff stc 7, cr15, [r0, #-1020] ; 0xfffffc04 + 8ca8: b0034620 andlt r4, r3, r0, lsr #12 + 8cac: 4628bd30 ; <UNDEFINED> instruction: 0x4628bd30 + 8cb0: ff36f7ff ; <UNDEFINED> instruction: 0xff36f7ff + 8cb4: b0034620 andlt r4, r3, r0, lsr #12 + 8cb8: bf00bd30 svclt 0x0000bd30 + 8cbc: 4606b5f0 ; <UNDEFINED> instruction: 0x4606b5f0 + 8cc0: 70ccf648 sbcvc pc, ip, r8, asr #12 + 8cc4: f2c0b08b vaddl.s8 <illegal reg q13.5>, d16, d11 + 8cc8: f2420000 vhadd.s8 d16, d2, d0 + 8ccc: f7ff058c ; <UNDEFINED> instruction: 0xf7ff058c + 8cd0: f249ed28 vadd.f32 d30, d9, d24 + 8cd4: f2c000c4 vmla.i<illegal width 8> d16, d16, d0[1] + 8cd8: f2c00501 vabal.s8 q8, d0, d1 + 8cdc: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 8ce0: 6828ece4 stmdavs r8!, {r2, r5, r6, r7, sl, fp, sp, lr, pc} + 8ce4: ecf2f7ff ldcl 7, cr15, [r2], #1020 ; 0x3fc + 8ce8: 4630a902 ldrtmi sl, [r0], -r2, lsl #18 + 8cec: fe3ef7ff mrc2 7, 1, pc, cr14, cr15, {7} + 8cf0: 1018f249 andsne pc, r8, r9, asr #4 + 8cf4: f2c0a902 vqdmlal.s<illegal width 8> q13, d0, d2 + 8cf8: 22100000 andscs r0, r0, #0 + 8cfc: ed5ef7ff ldcl 7, cr15, [lr, #-1020] ; 0xfffffc04 + 8d00: d1482800 cmple r8, r0, lsl #16 + 8d04: f2422001 vhadd.s8 d18, d2, d1 + 8d08: f7ff0710 ; <UNDEFINED> instruction: 0xf7ff0710 + 8d0c: f249ecec ; <UNDEFINED> instruction: 0xf249ecec + 8d10: f2c0105c vmov.i32 <illegal reg q8.5>, #12 ; 0x0000000c + 8d14: f2c00701 vabdl.s8 q8, d0, d1 + 8d18: f7ff0000 ; <UNDEFINED> instruction: 0xf7ff0000 + 8d1c: 6828ed02 stmdavs r8!, {r1, r8, sl, fp, sp, lr, pc} + 8d20: ecd4f7ff ldcl 7, cr15, [r4], {255} ; 0xff + 8d24: 7080f648 addvc pc, r0, r8, asr #12 + 8d28: 048cf242 streq pc, [ip], #578 ; 0x242 + 8d2c: 0000f2c0 andeq pc, r0, r0, asr #5 + 8d30: 0401f2c0 streq pc, [r1], #-704 ; 0x2c0 + 8d34: ecf4f7ff ldcl 7, cr15, [r4], #1020 ; 0x3fc + 8d38: f7ff6828 ; <UNDEFINED> instruction: 0xf7ff6828 + 8d3c: a901ecc8 stmdbge r1, {r3, r6, r7, sl, fp, sp, lr, pc} + 8d40: f7ff4630 ; <UNDEFINED> instruction: 0xf7ff4630 + 8d44: a801fdf3 stmdage r1, {r0, r1, r4, r5, r6, r7, r8, sl, fp, ip, sp, lr, pc} + 8d48: 220a2100 andcs r2, sl, #0 + 8d4c: eca6f7ff stc 7, cr15, [r6], #1020 ; 0x3fc + 8d50: d0102802 andsle r2, r0, r2, lsl #16 + 8d54: d0162817 andsle r2, r6, r7, lsl r8 + 8d58: d0102801 andsle r2, r0, r1, lsl #16 + 8d5c: d1e12803 mvnle r2, r3, lsl #16 + 8d60: 102cf249 eorne pc, ip, r9, asr #4 + 8d64: 0000f2c0 andeq pc, r0, r0, asr #5 + 8d68: ecdaf7ff ldcl 7, cr15, [sl], {255} ; 0xff + 8d6c: f7ff6820 ; <UNDEFINED> instruction: 0xf7ff6820 + 8d70: b00becae andlt lr, fp, lr, lsr #25 + 8d74: 4630bdf0 ; <UNDEFINED> instruction: 0x4630bdf0 + 8d78: fed2f7ff mrc2 7, 6, pc, cr2, cr15, {7} + 8d7c: 4630e7d2 ; <UNDEFINED> instruction: 0x4630e7d2 + 8d80: fe14f7ff mrc2 7, 0, pc, cr4, cr15, {7} + 8d84: f648e7ce ; <UNDEFINED> instruction: 0xf648e7ce + 8d88: 683970c4 ldmdavs r9!, {r2, r6, r7, ip, sp, lr} + 8d8c: 0000f2c0 andeq pc, r0, r0, asr #5 + 8d90: ec8af7ff stc 7, cr15, [sl], {255} ; 0xff + 8d94: 2001e7c6 andcs lr, r1, r6, asr #15 + 8d98: eca4f7ff stc 7, cr15, [r4], #1020 ; 0x3fc + 8d9c: 1048f249 subne pc, r8, r9, asr #4 + 8da0: 0000f2c0 andeq pc, r0, r0, asr #5 + 8da4: ecbcf7ff ldc 7, cr15, [ip], #1020 ; 0x3fc + 8da8: bdf0b00b ldcllt 0, cr11, [r0, #44]! ; 0x2c + 8dac: 43f8e92d mvnsmi lr, #737280 ; 0xb4000 + 8db0: 4e0c4607 cfmadd32mi mvax0, mvfx4, mvfx12, mvfx7 + 8db4: 46914688 ldrmi r4, [r1], r8, lsl #13 + 8db8: 447e4d0b ldrbtmi r4, [lr], #-3339 ; 0xd0b + 8dbc: ec5ef7ff mrrc 7, 15, pc, lr, cr15 ; <UNPREDICTABLE> + 8dc0: 1b76447d blne 1d99fbc <stdout+0x1d87f30> + 8dc4: d00a10b6 strhle r1, [sl], -r6 + 8dc8: 24003d04 strcs r3, [r0], #-3332 ; 0xd04 + 8dcc: f8553401 ; <UNDEFINED> instruction: 0xf8553401 + 8dd0: 46383f04 ldrtmi r3, [r8], -r4, lsl #30 + 8dd4: 464a4641 strbmi r4, [sl], -r1, asr #12 + 8dd8: 42b44798 adcsmi r4, r4, #39845888 ; 0x2600000 + 8ddc: e8bdd1f6 pop {r1, r2, r4, r5, r6, r7, r8, ip, lr, pc} + 8de0: bf0083f8 svclt 0x000083f8 + 8de4: 00009152 andeq r9, r0, r2, asr r1 + 8de8: 00009148 andeq r9, r0, r8, asr #2 + 8dec: bf004770 svclt 0x00004770 + +Disassembly of section .fini: + +00008df0 <.fini>: + 8df0: e92d4008 push {r3, lr} + 8df4: e8bd8008 pop {r3, pc} |