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author | Cyrille Bagard <nocbos@gmail.com> | 2008-10-26 23:37:51 (GMT) |
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committer | Cyrille Bagard <nocbos@gmail.com> | 2008-10-26 23:37:51 (GMT) |
commit | 197933fdf469ab9b8897b33c51809c128f1e3c03 (patch) | |
tree | 104d91be1a69d80eb4b59b247e4b719531bc7492 /ChangeLog | |
parent | ac438e8ad47f267c9eb6f462eb5a7e2b5c017f26 (diff) |
Completed support of the 0x81 and 0xc1 opcodes.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@37 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'ChangeLog')
-rw-r--r-- | ChangeLog | 48 |
1 files changed, 48 insertions, 0 deletions
@@ -1,3 +1,51 @@ +2008-10-27 Cyrille Bagard <nocbos@gmail.com> + + * src/arch/processor.c: + Take care here of decoding failures. + + * src/arch/x86/instruction.h: + Register some new instructions. + + * src/arch/x86/Makefile.am: + Add op_movzx.c, op_rcl.c, op_rcr.c, op_rol.c, op_ror.c, op_shl.c and + op_shr.c to libarchx86_a_SOURCES. + + * src/arch/x86/op_adc.c: + * src/arch/x86/op_add.c: + * src/arch/x86/op_and.c: + * src/arch/x86/op_cmp.c: + Complete support of the 0x81 and 0xc1 opcodes. + + * src/arch/x86/opcodes.h: + Register some new instructions. + + * src/arch/x86/op_movzx.c: + First attempt to handle a two-byte instruction. + + * src/arch/x86/op_or.c: + Complete support of the 0x81 and 0xc1 opcodes. + + * src/arch/x86/op_rcl.c: + * src/arch/x86/op_rcr.c: + * src/arch/x86/op_rol.c: + * src/arch/x86/op_ror.c: + New entries: complete support of the 0x81 and 0xc1 opcodes. + + * src/arch/x86/op_sar.c: + * src/arch/x86/op_sbb.c: + Complete support of the 0x81 and 0xc1 opcodes. + + * src/arch/x86/op_shl.c: + * src/arch/x86/op_shr.c: + New entries: complete support of the 0x81 and 0xc1 opcodes. + + * src/arch/x86/op_sub.c: + * src/arch/x86/op_xor.c: + Complete support of the 0x81 and 0xc1 opcodes. + + * src/arch/x86/processor.c: + Better handle prefixes. Complete support of the 0x81 and 0xc1 opcodes. + 2008-10-21 Cyrille Bagard <nocbos@gmail.com> * src/arch/x86/processor.c: |