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authorCyrille Bagard <nocbos@gmail.com>2018-05-28 17:37:46 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2018-05-28 17:37:46 (GMT)
commit9f5ed46de568d3db882c939c8ca9d0117bff3369 (patch)
tree9d2090cd640e54379dc1b982e03dc284b2d23ae7 /plugins/arm/v7/core.c
parent2fd186a84cba4f39f6f1bb8bd34d52b4e1d4f814 (diff)
Relied on register objects as often as possible.
Diffstat (limited to 'plugins/arm/v7/core.c')
-rw-r--r--plugins/arm/v7/core.c21
1 files changed, 15 insertions, 6 deletions
diff --git a/plugins/arm/v7/core.c b/plugins/arm/v7/core.c
index 12ea91a..cd5cdd8 100644
--- a/plugins/arm/v7/core.c
+++ b/plugins/arm/v7/core.c
@@ -27,11 +27,8 @@
#include <core/processors.h>
-#include "cregister.h"
#include "instruction.h"
#include "processor.h"
-#include "register.h"
-#include "operands/coproc.h"
#include "operands/estate.h"
#include "operands/it.h"
#include "operands/limitation.h"
@@ -41,6 +38,11 @@
#include "operands/reglist.h"
#include "operands/rotation.h"
#include "operands/shift.h"
+#include "registers/banked.h"
+#include "registers/basic.h"
+#include "registers/coproc.h"
+#include "registers/simd.h"
+#include "registers/special.h"
@@ -65,7 +67,6 @@ static void register_armv7_gtypes(void)
{
g_type_ensure(G_TYPE_ARMV7_INSTRUCTION);
- g_type_ensure(G_TYPE_ARMV7_COPROC_OPERAND);
g_type_ensure(G_TYPE_ARMV7_ENDIAN_OPERAND);
g_type_ensure(G_TYPE_ARMV7_ITCOND_OPERAND);
g_type_ensure(G_TYPE_ARMV7_LIMITATION_OPERAND);
@@ -76,6 +77,12 @@ static void register_armv7_gtypes(void)
g_type_ensure(G_TYPE_ARMV7_ROTATION_OPERAND);
g_type_ensure(G_TYPE_ARMV7_SHIFT_OPERAND);
+ g_type_ensure(G_TYPE_ARMV7_BANKED_REGISTER);
+ g_type_ensure(G_TYPE_ARMV7_BASIC_REGISTER);
+ g_type_ensure(G_TYPE_ARMV7_CP_REGISTER);
+ g_type_ensure(G_TYPE_ARMV7_SIMD_REGISTER);
+ g_type_ensure(G_TYPE_ARMV7_SPECIAL_REGISTER);
+
}
@@ -118,7 +125,9 @@ bool init_armv7_core(void)
void exit_armv7_core(void)
{
- clean_armv7_cregister_cache();
- clean_armv7_register_cache();
+ clean_armv7_banked_register_cache();
+ clean_armv7_basic_register_cache();
+ clean_armv7_cp_register_cache();
+ clean_armv7_simd_register_cache();
}