Handled lists of simples ARMv7 SIMD registers.

1 files changed, 5169 insertions, 0 deletions

diff --git a/plugins/arm/v7/opdefs/A88406_vst2.d b/plugins/arm/v7/opdefs/A88406_vst2.d
new file mode 100644
index 0000000..391d750
--- /dev/null
+++ b/plugins/arm/v7/opdefs/A88406_vst2.d
@@ -0,0 +1,5169 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2017 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Chrysalide.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title VST2 (multiple 2-element structures)
+
+@id 369
+
+@desc {
+
+	This instruction stores multiple 2-element structures from two or four registers to memory, with interleaving. For more information, see Element and structure load/store instructions on page A4-181. Every element of each register is saved. For details of the addressing mode see Advanced SIMD addressing mode on page A7-277. Depending on settings in the CPACR, NSACR, and HCPTR registers, and the security state and mode in which the instruction is executed, an attempt to execute the instruction might be UNDEFINED, or trapped to Hyp mode. Summary of access controls for Advanced SIMD functionality on page B1-1232 summarizes these controls. ARM deprecates the conditional execution of any Advanced SIMD instruction encoding that is not also available as a VFP instruction encoding, see Conditional execution on page A8-288.
+
+}
+
+@encoding (T1) {
+
+	@word 1 1 1 1 1 0 0 1 0 D(1) 0 0 Rn(4) Vd(4) type(4) size(2) align(2) Rm(4)
+
+	@syntax {
+
+		@subid 3249
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3250
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3251
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3252
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3253
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3254
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3255
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3256
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3257
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3258
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3259
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3260
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3261
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3262
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3263
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3264
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3265
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3266
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3267
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3268
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3269
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3270
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3271
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3272
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3273
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3274
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3275
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3276
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3277
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3278
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3279
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3280
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3281
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3282
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3283
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3284
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3285
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3286
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3287
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3288
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3289
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3290
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3291
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3292
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3293
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3294
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3295
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3296
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3297
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3298
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3299
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3300
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3301
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3302
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3303
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3304
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3305
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3306
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3307
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3308
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3309
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3310
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3311
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3312
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3313
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3314
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3315
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3316
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3317
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3318
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3319
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3320
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3321
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3322
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3323
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3324
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3325
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3326
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3327
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3328
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3329
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3330
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3331
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3332
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3333
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3334
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3335
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3336
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3337
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3338
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+}
+
+@encoding (A1) {
+
+	@word 1 1 1 1 1 0 0 1 0 D(1) 0 0 Rn(4) Vd(4) type(4) size(2) align(2) Rm(4)
+
+	@syntax {
+
+		@subid 3339
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3340
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3341
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3342
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3343
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3344
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3345
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3346
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3347
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3348
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3349
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3350
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3351
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3352
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3353
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3354
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3355
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3356
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3357
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3358
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3359
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3360
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3361
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3362
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3363
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3364
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3365
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3366
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3367
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3368
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessOffset(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3369
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3370
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3371
+
+		@assert {
+
+			size == 0
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3372
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3373
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3374
+
+		@assert {
+
+			size == 0
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3375
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3376
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3377
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3378
+
+		@assert {
+
+			size == 0
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3379
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3380
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3381
+
+		@assert {
+
+			size == 1
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3382
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3383
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3384
+
+		@assert {
+
+			size == 1
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3385
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3386
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3387
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3388
+
+		@assert {
+
+			size == 1
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3389
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3390
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3391
+
+		@assert {
+
+			size == 10
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3392
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3393
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3394
+
+		@assert {
+
+			size == 10
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3395
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3396
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3397
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3398
+
+		@assert {
+
+			size == 10
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			maccess = MemAccessPreIndexed(aligned, NULL)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3399
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3400
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3401
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3402
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3403
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3404
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3405
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3406
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3407
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3408
+
+		@assert {
+
+			Rm != 11x1
+			size == 0
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.8 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3409
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3410
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3411
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3412
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3413
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3414
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3415
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3416
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3417
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3418
+
+		@assert {
+
+			Rm != 11x1
+			size == 1
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.16 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3419
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1000
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3420
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1000
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3421
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1000
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			list = VectorTableDim2(dwvec_D, dwvec_D_1)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3422
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1001
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3423
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1001
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3424
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 1001
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			list = VectorTableDim2(dwvec_D, dwvec_D_2)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3425
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 1
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 64)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3426
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 10
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 128)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3427
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 11
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 256)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+	@syntax {
+
+		@subid 3428
+
+		@assert {
+
+			Rm != 11x1
+			size == 10
+			type == 11
+			align == 0
+
+		}
+
+		@conv {
+
+			dwvec_D = DoubleWordVector(D:Vd)
+			dwvec_D_1 = NextDoubleWordVector(dwvec_D, 1)
+			dwvec_D_2 = NextDoubleWordVector(dwvec_D, 2)
+			dwvec_D_3 = NextDoubleWordVector(dwvec_D, 3)
+			list = VectorTableDim4(dwvec_D, dwvec_D_1, dwvec_D_2, dwvec_D_3)
+			reg_N = Register(Rn)
+			aligned = AlignedRegister(reg_N, 0)
+			reg_M = Register(Rm)
+			maccess = MemAccessPostIndexed(aligned, reg_M)
+
+		}
+
+		@asm vst2.32 list maccess
+
+	}
+
+}
+