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authorCyrille Bagard <nocbos@gmail.com>2018-11-13 21:42:10 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2018-11-13 21:42:10 (GMT)
commit23bc425f9c35c31a80d65d824452c8728614a206 (patch)
tree71b1c9762fee17f85648bf210a88adad5ab60052 /src/analysis
parent65e12afde4bd9cd32e206f874cfa378708248918 (diff)
Exported extra processor features.
Diffstat (limited to 'src/analysis')
-rw-r--r--src/analysis/disass/area.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/src/analysis/disass/area.c b/src/analysis/disass/area.c
index 2dca001..0a82b99 100644
--- a/src/analysis/disass/area.c
+++ b/src/analysis/disass/area.c
@@ -286,7 +286,31 @@ static void init_mem_area_from_addr(mem_area *area, const vmpa2t *addr, phys_t l
area->content = g_restricted_content_new(content, &area->range);
- area->packing_size = 2; /* FIXME */
+ switch (g_arch_processor_get_instruction_min_size(area->proc))
+ {
+ case MDS_4_BITS:
+ case MDS_8_BITS:
+ area->packing_size = 1;
+ break;
+
+ case MDS_16_BITS:
+ area->packing_size = 2;
+ break;
+
+ case MDS_32_BITS:
+ area->packing_size = 4;
+ break;
+
+ case MDS_64_BITS:
+ area->packing_size = 8;
+ break;
+
+ default:
+ assert(false);
+ area->packing_size = 1;
+ break;
+
+ }
area->processed = create_bit_field(len, false);
area->instructions = (GArchInstruction **)calloc(len, sizeof(GArchInstruction *));