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authorCyrille Bagard <nocbos@gmail.com>2015-01-16 07:47:57 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2015-01-16 07:47:57 (GMT)
commit7a834754c404b72c555f8032d4f7aeed1710ff3c (patch)
tree7b7ddd0e21b8c835031d27719d91a384909d7dd5 /src/arch/arm/v7/opdefs/movt_A88106.d
parente28ba4839188307f94293af4e29ed6e774c0a499 (diff)
Supported new ARMv7 instructions and fixed several bugs in ARM/Thumb decodings.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@456 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/arm/v7/opdefs/movt_A88106.d')
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1 files changed, 67 insertions, 0 deletions
diff --git a/src/arch/arm/v7/opdefs/movt_A88106.d b/src/arch/arm/v7/opdefs/movt_A88106.d
new file mode 100644
index 0000000..a5ad4f1
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+++ b/src/arch/arm/v7/opdefs/movt_A88106.d
@@ -0,0 +1,67 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * Chrysalide is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chrysalide is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title MOVT
+
+@encoding(T1) {
+
+ @word 1 1 1 1 0 i(1) 1 0 1 1 0 0 imm4(4) 0 imm3(3) Rd((4) imm8(8)
+
+ @syntax <Rd> <imm16>
+
+ @conv {
+
+ Rd = Register(Rd)
+ imm16 = Imm16(imm4:i:imm3:imm8)
+
+ }
+
+ @rules {
+
+ //if d IN {13,15} then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(A1) {
+
+ @word cond(4) 0 0 1 1 0 1 0 0 imm4(4) Rd(4) imm12(12)
+
+ @syntax {c} <Rd> <imm16>
+
+ @conv {
+
+ c = Condition(cond)
+ Rd = Register(Rd)
+ imm16 = Imm16(imm4:imm12)
+
+ }
+
+ @rules {
+
+ //if d == 15 then UNPREDICTABLE;
+
+ }
+
+}