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authorCyrille Bagard <nocbos@gmail.com>2017-12-02 11:04:35 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2017-12-02 11:04:35 (GMT)
commit2c988d3ec52cc4c949a35aca7ef335dac773df92 (patch)
treefe650d2fc8ddceb606abdf0d2e14e5ef6596be82 /src/arch/arm/v7/opdefs/smlal_A88178.d
parent23abef53590bf3dd6f88ff4dbe81e306abfa4386 (diff)
Created a plugin for the ARM support.
Diffstat (limited to 'src/arch/arm/v7/opdefs/smlal_A88178.d')
-rw-r--r--src/arch/arm/v7/opdefs/smlal_A88178.d69
1 files changed, 0 insertions, 69 deletions
diff --git a/src/arch/arm/v7/opdefs/smlal_A88178.d b/src/arch/arm/v7/opdefs/smlal_A88178.d
deleted file mode 100644
index 03da53c..0000000
--- a/src/arch/arm/v7/opdefs/smlal_A88178.d
+++ /dev/null
@@ -1,69 +0,0 @@
-
-/* Chrysalide - Outil d'analyse de fichiers binaires
- * ##FILE## - traduction d'instructions ARMv7
- *
- * Copyright (C) 2015 Cyrille Bagard
- *
- * This file is part of Chrysalide.
- *
- * Chrysalide is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * Chrysalide is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
- */
-
-
-@title SMLAL
-
-@desc Signed Multiply Accumulate Long multiplies two signed 32-bit values to produce a 64-bit value, and accumulates this with a 64-bit value. In ARM instructions, the condition flags can optionally be updated based on the result. Use of this option adversely affects performance on many processor implementations.
-
-@encoding (T1) {
-
- @word 1 1 1 1 1 0 1 1 1 1 0 0 Rn(4) RdLo(4) RdHi(4) 0 0 0 0 Rm(4)
-
- @syntax <reg_DLO> <reg_DHI> <reg_N> <reg_M>
-
- @conv {
-
- reg_DLO = Register(RdLo)
- reg_DHI = Register(RdHi)
- reg_N = Register(Rn)
- reg_M = Register(Rm)
-
- }
-
-}
-
-@encoding (A1) {
-
- @word cond(4) 0 0 0 0 1 1 1 S(1) RdHi(4) RdLo(4) Rm(4) 1 0 0 1 Rn(4)
-
- @syntax <reg_DLO> <reg_DHI> <reg_N> <reg_M>
-
- @conv {
-
- reg_DLO = Register(RdLo)
- reg_DHI = Register(RdHi)
- reg_N = Register(Rn)
- reg_M = Register(Rm)
- setflags = (S == '1')
-
- }
-
- @rules {
-
- if (setflags); chk_call ExtendKeyword("s")
- chk_call StoreCondition(cond)
-
- }
-
-}
-