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authorCyrille Bagard <nocbos@gmail.com>2014-12-03 22:41:29 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2014-12-03 22:41:29 (GMT)
commit172fce9bab61de1ffa89f731b5d10f96e209afc1 (patch)
tree31aee5a141979fa99bbf88cbf2b7990de0ec3832 /src/arch/arm/v7/opdefs
parentf7ef27195f8c9dc35e5e210a333b74fcfae5ad71 (diff)
Begun to support more than the only 'ARMv7' architecture for ARM (ARM / Thumb16 / Thumb32).
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@433 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/arm/v7/opdefs')
-rw-r--r--src/arch/arm/v7/opdefs/Makefile.am28
-rw-r--r--src/arch/arm/v7/opdefs/mov_A88102.d6
2 files changed, 26 insertions, 8 deletions
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index ad52bd2..ff9f4a5 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -10,9 +10,9 @@ D2C_ARCH = armv7
D2C_HEADER = _ARCH_ARM_V7
D2C_ENCODINGS = \
- -e a= \
- -e t=thumb16_ \
- -e T=thumb32_
+ -e A=arm_ \
+ -e t=thumb_16_ \
+ -e T=thumb_32_
D2C_MACROS = \
-M SetFlags=g_armv7_instruction_define_setflags \
@@ -77,7 +77,25 @@ fix_includes_in_c:
fi; \
done
-finish_disass: $(D2C_OUTDIR)/opcodes/opcodes.h
+finish_disass: finish_disass_t16 finish_disass_t32 finish_disass_arm
+
+finish_disass_t16: $(D2C_OUTDIR)/opcodes/thumb_16_opcodes.h
+ @if grep -q '##INCLUDES##' $<; then \
+ $(fix2_verbose)sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $< ; \
+ fi
+ @if ! grep -q 'endif' $<; then \
+ $(fix2_verbose)echo -en "\n\n#endif /* _ARCH_ARM_V7_OPCODES_OPCODES_H */\n" >> $< ; \
+ fi
+
+finish_disass_t32: $(D2C_OUTDIR)/opcodes/thumb_32_opcodes.h
+ @if grep -q '##INCLUDES##' $<; then \
+ $(fix2_verbose)sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $< ; \
+ fi
+ @if ! grep -q 'endif' $<; then \
+ $(fix2_verbose)echo -en "\n\n#endif /* _ARCH_ARM_V7_OPCODES_OPCODES_H */\n" >> $< ; \
+ fi
+
+finish_disass_arm: $(D2C_OUTDIR)/opcodes/arm_opcodes.h
@if grep -q '##INCLUDES##' $<; then \
$(fix2_verbose)sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $< ; \
fi
@@ -86,4 +104,4 @@ finish_disass: $(D2C_OUTDIR)/opcodes/opcodes.h
fi
clean:
- rm -f $(ARMV7_DEFS:.d=.g) $(D2C_OUTDIR)/opcodes/*c $(D2C_OUTDIR)/opcodes/opcodes.h
+ rm -f $(ARMV7_DEFS:.d=.g) $(D2C_OUTDIR)/opcodes/*c $(D2C_OUTDIR)/opcodes/{thumb_16_,thumb_32_,}opcodes.h
diff --git a/src/arch/arm/v7/opdefs/mov_A88102.d b/src/arch/arm/v7/opdefs/mov_A88102.d
index 2401df2..dcafc73 100644
--- a/src/arch/arm/v7/opdefs/mov_A88102.d
+++ b/src/arch/arm/v7/opdefs/mov_A88102.d
@@ -32,7 +32,7 @@
@conv {
Rd = Register(Rd)
- const = ZeroExtend(imm8, 32)
+ const = ZeroExtend(imm8, 8, 32)
}
@@ -69,7 +69,7 @@
@conv {
Rd = Register(Rd)
- const = ZeroExtend(imm4:i:imm3:imm8, 32)
+ const = ZeroExtend(imm4:i:imm3:imm8, 12, 32)
}
@@ -114,7 +114,7 @@
c = Condition(cond)
Rd = Register(Rd)
- const = ZeroExtend(imm4:imm12, 32)
+ const = ZeroExtend(imm4:imm12, 16, 32)
}