Rewritten and extended the whole code for the instructions definitions compiler.

git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@419 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a

2 files changed, 87 insertions, 1 deletions

diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index f2c5a35..9aa6a82 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -17,9 +17,11 @@ D2C_MACROS =											\
     -M SetFlags=g_armv7_instruction_define_setflags		\
     -M Condition=g_arm_instruction_set_cond				\
     -M Register=translate_armv7_register				\
-    -M "ExpandImmC32=g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, "
+    -M "ExpandImmC32=g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, " \
+    -M SignExtend=sign_extend_armv7_imm
 
 ARMV7_DEFS = 							\
+	bl_A8825.d							\
 	mov_A88104.d						\
 	subs_B9320.d
 
diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d
new file mode 100644
index 0000000..c9ef5d0
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/bl_A8825.d
@@ -0,0 +1,84 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ *  This file is part of Chrysalide.
+ *
+ *  Chrysalide is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  Chrysalide is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title BL, BLX (immediate)
+
+@encoding(T1) {
+
+    @word 1 1 1 1 0 S(1) imm10H(10) 1 1 J1(1) 1 J2(1) imm10L(10) H(1)
+
+    @syntax <imm32>
+
+    @conv {
+
+        I1 = NOT(J1 EOR S)
+        I2 = NOT(J2 EOR S)
+        imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', s, 32)
+
+    }
+
+}
+
+@encoding(T2) {
+
+    @word 1 1 1 1 0 S(1) imm10(10) 1 1 J1(1) 0 J2(1) imm11(11)
+
+    @syntax <imm32>
+
+    @conv {
+
+        I1 = NOT(J1 EOR S)
+        I2 = NOT(J2 EOR S)
+        imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S, 32)
+
+    }
+
+}
+
+@encoding(A1) {
+
+    @word cond(4) 1 0 1 1 imm24(24)
+
+    @syntax <imm32>
+
+    @conv {
+
+        imm32 = SignExtend(imm24:'00', 0, 32)
+
+    }
+
+}
+
+@encoding(A2) {
+
+    @word cond(4) 1 0 1 H(1) imm24(24)
+
+    @syntax <imm32>
+
+    @conv {
+
+        imm32 = SignExtend(imm24:H:'0', 0, 32)
+
+    }
+
+}