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authorCyrille Bagard <nocbos@gmail.com>2015-03-18 23:18:26 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2015-03-18 23:18:26 (GMT)
commit4cef477cbdfd61a28ed6531d1e91d5a330a67704 (patch)
tree1b4708f624e0f3bdb26403ab06ac9689cf4cf583 /src/arch/arm/v7/opdefs
parent5c1636199a06965c549f748014d582dcb85ba7df (diff)
Computed limits for all routines according to existing symbols.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@491 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/arm/v7/opdefs')
-rw-r--r--src/arch/arm/v7/opdefs/Makefile.am3
-rw-r--r--src/arch/arm/v7/opdefs/b_A8818.d10
-rw-r--r--src/arch/arm/v7/opdefs/bl_A8825.d8
-rw-r--r--src/arch/arm/v7/opdefs/blx_A8826.d4
-rw-r--r--src/arch/arm/v7/opdefs/bx_A8827.d4
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8862.d6
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8863.d4
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8864.d4
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8865.d2
-rw-r--r--src/arch/arm/v7/opdefs/ldrb_A8867.d6
-rw-r--r--src/arch/arm/v7/opdefs/pop_A88131.d4
-rw-r--r--src/arch/arm/v7/opdefs/push_A88133.d10
-rw-r--r--src/arch/arm/v7/opdefs/str_A88204.d4
13 files changed, 40 insertions, 29 deletions
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index 45d4932..318e20b 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -21,7 +21,8 @@ D2C_MACROS = \
-M Condition=g_arm_instruction_set_cond \
-M Register=translate_armv7_register \
-M "ExpandImmC32=g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, " \
- -M SignExtend=sign_extend_armv7_imm
+ -M SignExtend=sign_extend_armv7_imm \
+ -M SetInsFlag=g_arch_instruction_set_flag
ARMV7_DEFS = \
adc_A881.d \
diff --git a/src/arch/arm/v7/opdefs/b_A8818.d b/src/arch/arm/v7/opdefs/b_A8818.d
index 5d696a3..50bdda9 100644
--- a/src/arch/arm/v7/opdefs/b_A8818.d
+++ b/src/arch/arm/v7/opdefs/b_A8818.d
@@ -47,7 +47,7 @@
//if cond == '1110' then UNDEFINED;
//if cond == '1111' then SEE SVC;
- call DefineAsReturn(1)
+ chk_call DefineAsReturn(1)
}
@@ -75,7 +75,7 @@
@rules {
//if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- call DefineAsReturn(1)
+ chk_call DefineAsReturn(1)
}
@@ -105,7 +105,7 @@
//if cond<3:1> == '111' then SEE "Related encodings";
//if InITBlock() then UNPREDICTABLE;
- call DefineAsReturn(1)
+ chk_call DefineAsReturn(1)
}
@@ -135,7 +135,7 @@
@rules {
//if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- call DefineAsReturn(1)
+ chk_call DefineAsReturn(1)
}
@@ -163,7 +163,7 @@
@rules {
- call DefineAsReturn(1)
+ chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d
index c5de31e..63922dd 100644
--- a/src/arch/arm/v7/opdefs/bl_A8825.d
+++ b/src/arch/arm/v7/opdefs/bl_A8825.d
@@ -46,7 +46,7 @@
@rules {
- //call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -75,7 +75,7 @@
@rules {
- //call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -102,7 +102,7 @@
@rules {
- //call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -129,7 +129,7 @@
@rules {
- //call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/blx_A8826.d b/src/arch/arm/v7/opdefs/blx_A8826.d
index 12c55ad..c972af2 100644
--- a/src/arch/arm/v7/opdefs/blx_A8826.d
+++ b/src/arch/arm/v7/opdefs/blx_A8826.d
@@ -39,7 +39,7 @@
//if m == 15 then UNPREDICTABLE;
//if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- //call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -61,7 +61,7 @@
@rules {
//if m == 15 then UNPREDICTABLE;
- //call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/bx_A8827.d b/src/arch/arm/v7/opdefs/bx_A8827.d
index dd06901..4856885 100644
--- a/src/arch/arm/v7/opdefs/bx_A8827.d
+++ b/src/arch/arm/v7/opdefs/bx_A8827.d
@@ -44,7 +44,7 @@
@rules {
- call DefineAsReturn(1)
+ chk_call DefineAsReturn(1)
}
@@ -71,7 +71,7 @@
@rules {
- call DefineAsReturn(1)
+ chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/ldr_A8862.d b/src/arch/arm/v7/opdefs/ldr_A8862.d
index ecb530b..49d5c3a 100644
--- a/src/arch/arm/v7/opdefs/ldr_A8862.d
+++ b/src/arch/arm/v7/opdefs/ldr_A8862.d
@@ -76,7 +76,7 @@
//if Rn == '1111' then SEE LDR (literal);
//if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
@@ -104,7 +104,7 @@
//if Rn == '1101' && P == '0' && U == '1' && W == '1' && imm8 == '00000100' then SEE POP;
//if P == '0' && W == '0' then UNDEFINED;
//if (wback && n == t) || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
@@ -133,7 +133,7 @@
//if Rn == '1101' && P == '0' && U == '1' && W == '1' && imm8 == '00000100' then SEE POP;
//if P == '0' && W == '0' then UNDEFINED;
//if (wback && n == t) || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/ldr_A8863.d b/src/arch/arm/v7/opdefs/ldr_A8863.d
index 39b9079..2360e3a 100644
--- a/src/arch/arm/v7/opdefs/ldr_A8863.d
+++ b/src/arch/arm/v7/opdefs/ldr_A8863.d
@@ -46,7 +46,7 @@
//t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
//index = (P == '1'); add = (U == '1'); wback = (P == '0') || (W == '1');
//if wback && n == t then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
@@ -76,7 +76,7 @@
//t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
//index = (P == '1'); add = (U == '1'); wback = (P == '0') || (W == '1');
//if wback && n == t then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/ldr_A8864.d b/src/arch/arm/v7/opdefs/ldr_A8864.d
index 3fbc0e3..c5b0dd0 100644
--- a/src/arch/arm/v7/opdefs/ldr_A8864.d
+++ b/src/arch/arm/v7/opdefs/ldr_A8864.d
@@ -70,7 +70,7 @@
@rules {
//if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
@@ -101,7 +101,7 @@
@rules {
//if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/ldr_A8865.d b/src/arch/arm/v7/opdefs/ldr_A8865.d
index 56a09fb..e8d255b 100644
--- a/src/arch/arm/v7/opdefs/ldr_A8865.d
+++ b/src/arch/arm/v7/opdefs/ldr_A8865.d
@@ -67,7 +67,7 @@
//if Rn == '1111' then SEE LDR (literal);
//if m IN {13,15} then UNPREDICTABLE;
//if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/ldrb_A8867.d b/src/arch/arm/v7/opdefs/ldrb_A8867.d
index 52a50cb..2114330 100644
--- a/src/arch/arm/v7/opdefs/ldrb_A8867.d
+++ b/src/arch/arm/v7/opdefs/ldrb_A8867.d
@@ -60,7 +60,7 @@
//if Rt == '1111' then SEE PLD;
//if Rn == '1111' then SEE LDRB (literal);
//if t == 13 then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
@@ -88,7 +88,7 @@
//if P == '1' && U == '1' && W == '0' then SEE LDRBT;
//if P == '0' && W == '0' then UNDEFINED;
//if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
@@ -117,7 +117,7 @@
//if P == '1' && U == '1' && W == '0' then SEE LDRBT;
//if P == '0' && W == '0' then UNDEFINED;
//if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/pop_A88131.d b/src/arch/arm/v7/opdefs/pop_A88131.d
index 329b705..2663e1b 100644
--- a/src/arch/arm/v7/opdefs/pop_A88131.d
+++ b/src/arch/arm/v7/opdefs/pop_A88131.d
@@ -48,7 +48,7 @@
@word 1 1 1 0 1 0 0 0 1 0 1 1 1 1 0 1 P(1) M(1) 0 register_list(13)
- @syntax "push.W" <registers>
+ @syntax "pop.W" <registers>
@conv {
@@ -69,7 +69,7 @@
@word 1 1 1 1 1 0 0 0 0 1 0 1 1 1 0 1 Rt(4) 1 0 1 1 0 0 0 0 0 1 0 0
- @syntax "push.W" <registers>
+ @syntax "pop.W" <registers>
@conv {
diff --git a/src/arch/arm/v7/opdefs/push_A88133.d b/src/arch/arm/v7/opdefs/push_A88133.d
index 0526a56..2ba7293 100644
--- a/src/arch/arm/v7/opdefs/push_A88133.d
+++ b/src/arch/arm/v7/opdefs/push_A88133.d
@@ -39,6 +39,8 @@
//if BitCount(registers) < 1 then UNPREDICTABLE;
+ if (M == '1'); call SetInsFlag(AIF_ROUTINE_START);
+
}
}
@@ -59,6 +61,8 @@
//if BitCount(registers) < 2 then UNPREDICTABLE;
+ if (M == '1'); call SetInsFlag(AIF_ROUTINE_START);
+
}
}
@@ -80,6 +84,8 @@
//if t IN {13,15} then UNPREDICTABLE
+ if (Rt == '1110'); call SetInsFlag(AIF_ROUTINE_START);
+
}
}
@@ -101,6 +107,8 @@
//if BitCount(register_list) < 2 then SEE STMDB / STMFD;
+ if (register_list & 0x4000); call SetInsFlag(AIF_ROUTINE_START);
+
}
}
@@ -123,6 +131,8 @@
//if t == 13 then UNPREDICTABLE;
+ if (Rt == '1110'); call SetInsFlag(AIF_ROUTINE_START);
+
}
}
diff --git a/src/arch/arm/v7/opdefs/str_A88204.d b/src/arch/arm/v7/opdefs/str_A88204.d
index d4e9377..2712e1b 100644
--- a/src/arch/arm/v7/opdefs/str_A88204.d
+++ b/src/arch/arm/v7/opdefs/str_A88204.d
@@ -43,7 +43,7 @@
//if P == '0' && W == '1' then SEE STRT;
//if Rn == '1101' && P == '1' && U == '0' && W == '1' && imm12 == '000000000100' then SEE PUSH;
//if wback && (n == 15 || n == t) then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
@@ -70,7 +70,7 @@
//if P == '0' && W == '1' then SEE STRT;
//if Rn == '1101' && P == '1' && U == '0' && W == '1' && imm12 == '000000000100' then SEE PUSH;
//if wback && (n == 15 || n == t) then UNPREDICTABLE;
- if (Rt == '1111'); call DefineAsReturn(1)
+ if (Rt == '1111'); chk_call DefineAsReturn(1)
}
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