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authorCyrille Bagard <nocbos@gmail.com>2016-05-04 07:09:28 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2016-05-04 07:09:28 (GMT)
commit33d49eb64654fc5dc5f617ce02ae3fffb6a75adb (patch)
tree9e98aec89406c6735df1d7828b6fd705948d942c /src/arch/arm/v7/thumb_32.c
parent67a30aba353edf66b8307395097eef5058050c16 (diff)
Created special instructions for real undefined behaviors.
Diffstat (limited to 'src/arch/arm/v7/thumb_32.c')
-rw-r--r--src/arch/arm/v7/thumb_32.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/arch/arm/v7/thumb_32.c b/src/arch/arm/v7/thumb_32.c
index c1e3f3c..9dbad13 100644
--- a/src/arch/arm/v7/thumb_32.c
+++ b/src/arch/arm/v7/thumb_32.c
@@ -30,6 +30,7 @@
#include "opcodes/thumb_32_opcodes.h"
#include "opcodes/opcodes_tmp_thumb_32.h"
+#include "../../undefined.h"
#include "../../../common/bconst.h"
@@ -177,10 +178,8 @@ GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t raw)
else if ((op2 & b1100111) == b0000101)
result = process_armv7_thumb_32_load_word(raw);
- /*
- else if ((op2 & b00xx111) == b00xx111)
- undefined;
- */
+ else if ((op2 & b1100111) == b0000111)
+ result = g_undef_instruction_new(IBS_UNDEFINED);
else if ((op2 & b1110001) == b0010000)
/* Advanced SIMD element or structure load/store instructions on page A7-275 */
@@ -2213,8 +2212,7 @@ static GArchInstruction *process_armv7_thumb_32_coprocessor_advanced_simd_and_fl
op = (raw >> 4) & 0x1;
if ((op1 & b111110) == b000000)
- /* UNDEFINED */
- assert(false);
+ result = g_undef_instruction_new(IBS_UNDEFINED);
else if ((op1 & b110000) == b110000)
/* Advanced SIMD data-processing instructions on page A7-261 */