Supported several extra x86 instructions.

git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@182 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a

1 files changed, 47 insertions, 8 deletions

diff --git a/src/arch/x86/instruction.c b/src/arch/x86/instruction.c
index af1d25e..f5901ef 100644
--- a/src/arch/x86/instruction.c
+++ b/src/arch/x86/instruction.c
@@ -137,7 +137,7 @@ static x86_instruction _instructions[XOP_COUNT] = {
 
     [XOP_CMP_RM8_R8]                = { false, 0x38, IDX_TO_EXT(-1), "cmp", XPX_NONE },
     [XOP_CMP_RM1632_R1632]          = { false, 0x39, IDX_TO_EXT(-1), "cmp", XPX_OPERAND_SIZE_OVERRIDE },
-
+    [XOP_CMP_R8_RM8]                = { false, 0x3a, IDX_TO_EXT(-1), "cmp", XPX_NONE },
     [XOP_CMP_R1632_RM1632]          = { false, 0x3b, IDX_TO_EXT(-1), "cmp", XPX_OPERAND_SIZE_OVERRIDE },
     [XOP_CMP_AL_IMM8]               = { false, 0x3c, IDX_TO_EXT(-1), "cmp", XPX_NONE },
     [XOP_CMP_E_AX_IMM1632]          = { false, 0x3d, IDX_TO_EXT(-1), "cmp", XPX_OPERAND_SIZE_OVERRIDE },
@@ -291,9 +291,14 @@ static x86_instruction _instructions[XOP_COUNT] = {
     [XOP_MOV_E_BP_IMM1632]          = { true, 0xbd, IDX_TO_EXT(-1), "mov", XPX_OPERAND_SIZE_OVERRIDE },
     [XOP_MOV_E_SI_IMM1632]          = { true, 0xbe, IDX_TO_EXT(-1), "mov", XPX_OPERAND_SIZE_OVERRIDE },
     [XOP_MOV_E_DI_IMM1632]          = { true, 0xbf, IDX_TO_EXT(-1), "mov", XPX_OPERAND_SIZE_OVERRIDE },
-
-
-
+    [XOP_ROL_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(0), "rol", XPX_NONE },
+    [XOP_ROR_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(1), "ror", XPX_NONE },
+    [XOP_RCL_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(2), "rcl", XPX_NONE },
+    [XOP_RCR_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(3), "rcr", XPX_NONE },
+    [XOP_SHL_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(4), "shl", XPX_NONE },
+    [XOP_SHR_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(5), "shr", XPX_NONE },
+    [XOP_SAL_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(6), "sal", XPX_NONE },
+    [XOP_SAR_RM8_IMM8]              = { false, 0xc0, IDX_TO_EXT(7), "sar", XPX_NONE },
     [XOP_ROL_RM1632_IMM8]           = { false, 0xc1, IDX_TO_EXT(0), "rol", XPX_OPERAND_SIZE_OVERRIDE },
     [XOP_ROR_RM1632_IMM8]           = { false, 0xc1, IDX_TO_EXT(1), "ror", XPX_OPERAND_SIZE_OVERRIDE },
     [XOP_RCL_RM1632_IMM8]           = { false, 0xc1, IDX_TO_EXT(2), "rcl", XPX_OPERAND_SIZE_OVERRIDE },
@@ -304,7 +309,8 @@ static x86_instruction _instructions[XOP_COUNT] = {
     [XOP_SAR_RM1632_IMM8]           = { false, 0xc1, IDX_TO_EXT(7), "sar", XPX_OPERAND_SIZE_OVERRIDE },
 
 
-    [XOP_RET]                       = { false, 0xc3, IDX_TO_EXT(-1), "ret", XPX_NONE },
+    [XOP_RETN_IMM16]                = { false, 0xc2, IDX_TO_EXT(-1), "retn", XPX_NONE },
+    [XOP_RETN]                      = { false, 0xc3, IDX_TO_EXT(-1), "ret", XPX_NONE },
 
 
     [XOP_MOV_RM8_IMM8]              = { false, 0xc6, IDX_TO_EXT(0), "mov", XPX_NONE },
@@ -313,13 +319,44 @@ static x86_instruction _instructions[XOP_COUNT] = {
 
 
     [XOP_LEAVE]                     = { false, 0xc9, IDX_TO_EXT(-1), "leave", XPX_NONE },
-
-
+    [XOP_RETF_IMM16]                = { false, 0xca, IDX_TO_EXT(-1), "retf", XPX_NONE },
+    [XOP_RETF]                      = { false, 0xcb, IDX_TO_EXT(-1), "ret", XPX_NONE },
     [XOP_INT_3]                     = { false, 0xcc, IDX_TO_EXT(-1), "int", XPX_NONE },
     [XOP_INT]                       = { false, 0xcd, IDX_TO_EXT(-1), "int", XPX_NONE },
 
 
+    [XOP_ROL_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(0), "rol", XPX_NONE },
+    [XOP_ROR_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(1), "ror", XPX_NONE },
+    [XOP_RCL_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(2), "rcl", XPX_NONE },
+    [XOP_RCR_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(3), "rcr", XPX_NONE },
+    [XOP_SHL_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(4), "shl", XPX_NONE },
+    [XOP_SHR_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(5), "shr", XPX_NONE },
+    [XOP_SAL_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(6), "sal", XPX_NONE },
+    [XOP_SAR_RM8_1]                 = { false, 0xd0, IDX_TO_EXT(7), "sar", XPX_NONE },
+    [XOP_ROL_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(0), "rol", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_ROR_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(1), "ror", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_RCL_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(2), "rcl", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_RCR_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(3), "rcr", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_SHL_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(4), "shl", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_SHR_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(5), "shr", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_SAL_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(6), "sal", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_SAR_RM1632_1]              = { false, 0xd1, IDX_TO_EXT(7), "sar", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_ROL_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(0), "rol", XPX_NONE },
+    [XOP_ROR_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(1), "ror", XPX_NONE },
+    [XOP_RCL_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(2), "rcl", XPX_NONE },
+    [XOP_RCR_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(3), "rcr", XPX_NONE },
+    [XOP_SHL_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(4), "shl", XPX_NONE },
+    [XOP_SHR_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(5), "shr", XPX_NONE },
+    [XOP_SAL_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(6), "sal", XPX_NONE },
+    [XOP_SAR_RM8_CL]                = { false, 0xd2, IDX_TO_EXT(7), "sar", XPX_NONE },
+    [XOP_ROL_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(0), "rol", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_ROR_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(1), "ror", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_RCL_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(2), "rcl", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_RCR_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(3), "rcr", XPX_OPERAND_SIZE_OVERRIDE },
     [XOP_SHL_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(4), "shl", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_SHR_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(5), "shr", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_SAL_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(6), "sal", XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_SAR_RM1632_CL]             = { false, 0xd3, IDX_TO_EXT(7), "sar", XPX_OPERAND_SIZE_OVERRIDE },
 
 
     [XOP_CALL_REL1632]              = { false, 0xe8, IDX_TO_EXT(-1), "call", XPX_OPERAND_SIZE_OVERRIDE },
@@ -394,6 +431,8 @@ static x86_instruction _instructions[XOP_COUNT] = {
 
 
     [XOP_MOVZX_R1632_RM8]           = { false, 0xb6, IDX_TO_EXT(-1), "movzx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE },
+    [XOP_MOVZX_R1632_RM16]          = { false, 0xb7, IDX_TO_EXT(-1), "movzx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE },
+
     [XOP_MOVSX_R1632_RM8]           = { false, 0xbe, IDX_TO_EXT(-1), "movsx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE },
     [XOP_MOVSX_R1632_RM1632]        = { false, 0xbf, IDX_TO_EXT(-1), "movsx", XPX_TWO_BYTES | XPX_OPERAND_SIZE_OVERRIDE }
 
@@ -779,6 +818,6 @@ static InstructionLinkType x86_get_instruction_link(const GX86Instruction *instr
 
 static bool x86_instruction_is_return(const GX86Instruction *instr)
 {
-    return (instr->type == XOP_RET);
+    return false;/* FIXME (instr->type == XOP_RET);*/
 
 }