Added more support for lea and push opcodes.

git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@25 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a

1 files changed, 92 insertions, 0 deletions

diff --git a/src/arch/x86/op_lea.c b/src/arch/x86/op_lea.c
new file mode 100644
index 0000000..2622ebf
--- /dev/null
+++ b/src/arch/x86/op_lea.c
@@ -0,0 +1,92 @@
+
+/* OpenIDA - Outil d'analyse de fichiers binaires
+ * op_lea.c - décodage des chargements d'adresse effective
+ *
+ * Copyright (C) 2008 Cyrille Bagard
+ *
+ *  This file is part of OpenIDA.
+ *
+ *  OpenIDA is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  OpenIDA is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with Foobar.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include <malloc.h>
+
+
+#include "../instruction-int.h"
+#include "opcodes.h"
+#include "operand.h"
+
+
+
+/******************************************************************************
+*                                                                             *
+*  Paramètres  : data   = flux de données à analyser.                         *
+*                pos    = position courante dans ce flux. [OUT]               *
+*                len    = taille totale des données à analyser.               *
+*                offset = adresse virtuelle de l'instruction.                 *
+*                proc   = architecture ciblée par le désassemblage.           *
+*                                                                             *
+*  Description : Décode une instruction de type 'lea' (16 ou 32 bits).        *
+*                                                                             *
+*  Retour      : Instruction mise en place ou NULL.                           *
+*                                                                             *
+*  Remarques   : -                                                            *
+*                                                                             *
+******************************************************************************/
+
+asm_x86_instr *read_instr_lea(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
+{
+    asm_x86_instr *result;                  /* Instruction à retourner     */
+    AsmOperandSize oprsize;                 /* Taille des opérandes        */
+    asm_x86_operand *reg1;                  /* Registre de destination     */
+    asm_x86_operand *reg2;                  /* Registre de source          */
+
+    result = (asm_x86_instr *)calloc(1, sizeof(asm_x86_instr));
+
+    /* Utilisation des registres 32 bits ? */
+    if (data[*pos] == 0x66)
+    {
+        oprsize = switch_x86_operand_size(proc);
+        (*pos)++;
+    }
+    else oprsize = get_x86_current_operand_size(proc);
+
+    ASM_INSTRUCTION(result)->opcode = data[(*pos)++];
+
+    reg1 = x86_create_reg1632_operand_from_modrm(data[*pos], oprsize == AOS_32_BITS, false);
+    if (reg1 == NULL)
+    {
+        (*pos)--;
+        free(result);
+        return NULL;
+    }
+
+    reg2 = x86_create_content1632_operand(data, pos, len, oprsize == AOS_32_BITS, true);
+    if (reg2 == NULL)
+    {
+        (*pos)--;
+        free(result);
+        return NULL;
+    }
+
+    ASM_INSTRUCTION(result)->operands = (asm_operand **)calloc(2, sizeof(asm_operand *));
+    ASM_INSTRUCTION(result)->operands_count = 2;
+
+    ASM_INSTRUCTION(result)->operands[0] = ASM_OPERAND(reg1);
+    ASM_INSTRUCTION(result)->operands[1] = ASM_OPERAND(reg2);
+
+    return result;
+
+}