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authorCyrille Bagard <nocbos@gmail.com>2008-10-26 23:37:51 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2008-10-26 23:37:51 (GMT)
commit197933fdf469ab9b8897b33c51809c128f1e3c03 (patch)
tree104d91be1a69d80eb4b59b247e4b719531bc7492 /src/arch/x86/op_xor.c
parentac438e8ad47f267c9eb6f462eb5a7e2b5c017f26 (diff)
Completed support of the 0x81 and 0xc1 opcodes.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@37 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/op_xor.c')
-rw-r--r--src/arch/x86/op_xor.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/src/arch/x86/op_xor.c b/src/arch/x86/op_xor.c
index 8d44f9c..eabb88e 100644
--- a/src/arch/x86/op_xor.c
+++ b/src/arch/x86/op_xor.c
@@ -149,7 +149,7 @@ asm_x86_instr *x86_read_instr_xor_rm8_with_imm8(const uint8_t *data, off_t *pos,
* offset = adresse virtuelle de l'instruction. *
* proc = architecture ciblée par le désassemblage. *
* *
-* Description : Décode une instruction de type 'xor' (16 ou 32 bits). *
+* Description : Décode une instruction de type 'xor' (8 bits). *
* *
* Retour : Instruction mise en place ou NULL. *
* *
@@ -157,18 +157,15 @@ asm_x86_instr *x86_read_instr_xor_rm8_with_imm8(const uint8_t *data, off_t *pos,
* *
******************************************************************************/
-asm_x86_instr *x86_read_instr_xor_rm1632_with_imm1632(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
+asm_x86_instr *x86_read_instr_xor_r8_with_rm8(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
{
asm_x86_instr *result; /* Instruction à retourner */
- AsmOperandSize oprsize; /* Taille des opérandes */
result = (asm_x86_instr *)calloc(1, sizeof(asm_x86_instr));
- oprsize = switch_x86_operand_size_if_needed(proc, data, pos);
-
ASM_INSTRUCTION(result)->opcode = data[(*pos)++];
- if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM1632, X86_OTP_IMM1632, oprsize))
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_R8, X86_OTP_RM8))
{
free(result);
return NULL;
@@ -187,7 +184,7 @@ asm_x86_instr *x86_read_instr_xor_rm1632_with_imm1632(const uint8_t *data, off_t
* offset = adresse virtuelle de l'instruction. *
* proc = architecture ciblée par le désassemblage. *
* *
-* Description : Décode une instruction de type 'xor' (8 bits). *
+* Description : Décode une instruction de type 'xor' (16 ou 32 bits). *
* *
* Retour : Instruction mise en place ou NULL. *
* *
@@ -195,15 +192,18 @@ asm_x86_instr *x86_read_instr_xor_rm1632_with_imm1632(const uint8_t *data, off_t
* *
******************************************************************************/
-asm_x86_instr *x86_read_instr_xor_r8_with_rm8(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
+asm_x86_instr *x86_read_instr_xor_r1632_with_rm1632(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
{
asm_x86_instr *result; /* Instruction à retourner */
+ AsmOperandSize oprsize; /* Taille des opérandes */
result = (asm_x86_instr *)calloc(1, sizeof(asm_x86_instr));
+ oprsize = switch_x86_operand_size_if_needed(proc, data, pos);
+
ASM_INSTRUCTION(result)->opcode = data[(*pos)++];
- if (!x86_read_two_operands(result, data, pos, len, X86_OTP_R8, X86_OTP_RM8))
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_R1632, X86_OTP_RM1632, oprsize))
{
free(result);
return NULL;
@@ -222,7 +222,7 @@ asm_x86_instr *x86_read_instr_xor_r8_with_rm8(const uint8_t *data, off_t *pos, o
* offset = adresse virtuelle de l'instruction. *
* proc = architecture ciblée par le désassemblage. *
* *
-* Description : Décode une instruction de type 'xor' (16 ou 32 bits). *
+* Description : Décode une instruction de type 'xor' (8 bits). *
* *
* Retour : Instruction mise en place ou NULL. *
* *
@@ -230,18 +230,15 @@ asm_x86_instr *x86_read_instr_xor_r8_with_rm8(const uint8_t *data, off_t *pos, o
* *
******************************************************************************/
-asm_x86_instr *x86_read_instr_xor_r1632_with_rm1632(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
+asm_x86_instr *x86_read_instr_xor_rm8_with_r8(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
{
asm_x86_instr *result; /* Instruction à retourner */
- AsmOperandSize oprsize; /* Taille des opérandes */
result = (asm_x86_instr *)calloc(1, sizeof(asm_x86_instr));
- oprsize = switch_x86_operand_size_if_needed(proc, data, pos);
-
ASM_INSTRUCTION(result)->opcode = data[(*pos)++];
- if (!x86_read_two_operands(result, data, pos, len, X86_OTP_R1632, X86_OTP_RM1632, oprsize))
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM8, X86_OTP_R8))
{
free(result);
return NULL;
@@ -260,7 +257,7 @@ asm_x86_instr *x86_read_instr_xor_r1632_with_rm1632(const uint8_t *data, off_t *
* offset = adresse virtuelle de l'instruction. *
* proc = architecture ciblée par le désassemblage. *
* *
-* Description : Décode une instruction de type 'xor' (8 bits). *
+* Description : Décode une instruction de type 'xor' (16 ou 32 bits). *
* *
* Retour : Instruction mise en place ou NULL. *
* *
@@ -268,15 +265,18 @@ asm_x86_instr *x86_read_instr_xor_r1632_with_rm1632(const uint8_t *data, off_t *
* *
******************************************************************************/
-asm_x86_instr *x86_read_instr_xor_rm8_with_r8(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
+asm_x86_instr *x86_read_instr_xor_rm1632_with_imm8(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
{
asm_x86_instr *result; /* Instruction à retourner */
+ AsmOperandSize oprsize; /* Taille des opérandes */
result = (asm_x86_instr *)calloc(1, sizeof(asm_x86_instr));
+ oprsize = switch_x86_operand_size_if_needed(proc, data, pos);
+
ASM_INSTRUCTION(result)->opcode = data[(*pos)++];
- if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM8, X86_OTP_R8))
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM1632, X86_OTP_IMM8, oprsize))
{
free(result);
return NULL;
@@ -303,7 +303,7 @@ asm_x86_instr *x86_read_instr_xor_rm8_with_r8(const uint8_t *data, off_t *pos, o
* *
******************************************************************************/
-asm_x86_instr *x86_read_instr_xor_rm1632_with_imm8(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
+asm_x86_instr *x86_read_instr_xor_rm1632_imm1632(const uint8_t *data, off_t *pos, off_t len, uint64_t offset, const asm_x86_processor *proc)
{
asm_x86_instr *result; /* Instruction à retourner */
AsmOperandSize oprsize; /* Taille des opérandes */
@@ -314,7 +314,7 @@ asm_x86_instr *x86_read_instr_xor_rm1632_with_imm8(const uint8_t *data, off_t *p
ASM_INSTRUCTION(result)->opcode = data[(*pos)++];
- if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM1632, X86_OTP_IMM8, oprsize))
+ if (!x86_read_two_operands(result, data, pos, len, X86_OTP_RM1632, X86_OTP_IMM1632, oprsize))
{
free(result);
return NULL;