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authorCyrille Bagard <nocbos@gmail.com>2009-06-30 20:24:59 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2009-06-30 20:24:59 (GMT)
commitdde6bbf77e6a6df95dad5426e56a4bba115a7253 (patch)
treee7eebe20118143e901472b07b55ca3d59e2a65ab /src/arch/x86/opcodes.h
parent2c9fa2bc584305985ae53958ea2fb371adba3834 (diff)
Added a few extra opcodes: imul, jle, movsx and movzx.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@85 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/opcodes.h')
-rw-r--r--src/arch/x86/opcodes.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/x86/opcodes.h b/src/arch/x86/opcodes.h
index e2ec5a6..93e4d5c 100644
--- a/src/arch/x86/opcodes.h
+++ b/src/arch/x86/opcodes.h
@@ -111,6 +111,9 @@ GArchInstruction *x86_read_instr_hlt(const bin_t *, off_t *, off_t, vmpa_t, X86P
/* Décode une instruction de type 'imul' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_imul_rm1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'imul' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_imul_rm1632_imm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'inc' (16 ou 32 bits). */
GArchInstruction *x86_read_instr_inc_r1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
@@ -135,6 +138,9 @@ GArchInstruction *x86_read_instr_jg_rel8(const bin_t *, off_t *, off_t, vmpa_t,
/* Décode une instruction de type 'jl' (saut 8b si inférieur). */
GArchInstruction *x86_read_instr_jl_rel8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'jle' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_jle_rel1632(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'jna' (saut 8b si !supérieur). */
GArchInstruction *x86_read_instr_jna_rel8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
@@ -216,6 +222,12 @@ GArchInstruction *x86_read_instr_mov_rm1632_r1632(const bin_t *, off_t *, off_t,
/* Décode une instruction de type 'mov' (8 bits). */
GArchInstruction *x86_read_instr_mov_rm8_r8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+/* Décode une instruction de type 'movsx' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_movsx_r1632_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
+/* Décode une instruction de type 'movzx' (16 ou 32 bits). */
+GArchInstruction *x86_read_instr_movzx_r1632_rm8(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);
+
/* Décode une instruction de type 'nop'. */
GArchInstruction *x86_read_instr_nop(const bin_t *, off_t *, off_t, vmpa_t, X86Prefix, const GX86Processor *);