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authorCyrille Bagard <nocbos@gmail.com>2010-08-01 00:56:47 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2010-08-01 00:56:47 (GMT)
commit290f48b2c2008a3479cd1585eb04b89c5744f034 (patch)
treec9d1eae9a08884de9ee8fe31cbd7756f8e1ca298 /src/arch/x86/operand.c
parent73af1bd66e5d1a2e30d56151532710f2b28d12df (diff)
Deleted the 'AsmOperandSize' definition and set the x86 minimal instruction size.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@176 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/operand.c')
-rw-r--r--src/arch/x86/operand.c64
1 files changed, 32 insertions, 32 deletions
diff --git a/src/arch/x86/operand.c b/src/arch/x86/operand.c
index 23b08c2..e97dc2b 100644
--- a/src/arch/x86/operand.c
+++ b/src/arch/x86/operand.c
@@ -350,7 +350,7 @@ static void g_x86_register_operand_init(GX86RegisterOperand *operand)
* *
******************************************************************************/
-GArchOperand *g_x86_register_operand_new_from_opcode(const bin_t *data, off_t *pos, off_t len, AsmOperandSize size, bin_t base)
+GArchOperand *g_x86_register_operand_new_from_opcode(const bin_t *data, off_t *pos, off_t len, MemoryDataSize size, bin_t base)
{
GX86RegisterOperand *result; /* Structure à retourner */
GX86Register *reg; /* Registre lu */
@@ -389,7 +389,7 @@ GArchOperand *g_x86_register_operand_new_from_opcode(const bin_t *data, off_t *p
* *
******************************************************************************/
-GArchOperand *g_x86_register_operand_new_from_mod_rm(const bin_t *data, off_t *pos, off_t len, AsmOperandSize size, bool first)
+GArchOperand *g_x86_register_operand_new_from_mod_rm(const bin_t *data, off_t *pos, off_t len, MemoryDataSize size, bool first)
{
GX86RegisterOperand *result; /* Structure à retourner */
bin_t index; /* Registre lu */
@@ -429,7 +429,7 @@ GArchOperand *g_x86_register_operand_new_from_mod_rm(const bin_t *data, off_t *p
* *
******************************************************************************/
-GArchOperand *g_x86_register_operand_new_from_index(bin_t index, AsmOperandSize size)
+GArchOperand *g_x86_register_operand_new_from_index(bin_t index, MemoryDataSize size)
{
GX86RegisterOperand *result; /* Structure à retourner */
GX86Register *reg; /* Registre lu */
@@ -560,7 +560,7 @@ static void g_x86_mod_rm_operand_init(GX86ModRMOperand *operand)
* *
******************************************************************************/
-GArchOperand *g_x86_mod_rm_operand_new(const bin_t *data, off_t *pos, off_t len, AsmOperandSize size)
+GArchOperand *g_x86_mod_rm_operand_new(const bin_t *data, off_t *pos, off_t len, MemoryDataSize size)
{
GX86ModRMOperand *result; /* Structure à retourner */
uint8_t mod; /* Modificateur présent */
@@ -936,7 +936,7 @@ static void g_x86_relative_operand_init(GX86RelativeOperand *operand)
* *
******************************************************************************/
-GArchOperand *g_x86_relative_operand_new(const bin_t *data, off_t *pos, off_t len, AsmOperandSize size, vmpa_t base)
+GArchOperand *g_x86_relative_operand_new(const bin_t *data, off_t *pos, off_t len, MemoryDataSize size, vmpa_t base)
{
GX86RelativeOperand *result; /* Structure à retourner */
off_t init_pos; /* Position avant lecture */
@@ -949,15 +949,15 @@ GArchOperand *g_x86_relative_operand_new(const bin_t *data, off_t *pos, off_t le
switch (size)
{
- case AOS_8_BITS_UNSIGNED:
+ case MDS_8_BITS_UNSIGNED:
read_s8(&val8, data, pos, len, SRE_LITTLE /* FIXME */);
address = base + (*pos - init_pos) + val8;
break;
- case AOS_16_BITS_UNSIGNED:
+ case MDS_16_BITS_UNSIGNED:
read_s16(&val16, data, pos, len, SRE_LITTLE /* FIXME */);
address = base + (*pos - init_pos) + val16;
break;
- case AOS_32_BITS_UNSIGNED:
+ case MDS_32_BITS_UNSIGNED:
read_s32(&val32, data, pos, len, SRE_LITTLE /* FIXME */);
address = base + (*pos - init_pos) + val32;
break;
@@ -967,7 +967,7 @@ GArchOperand *g_x86_relative_operand_new(const bin_t *data, off_t *pos, off_t le
}
result = g_object_new(G_TYPE_X86_RELATIVE_OPERAND, NULL);
- result->immediate = g_imm_operand_new_from_value(AOS_32_BITS/*FIXME*/, (uint32_t)address/* FIXME */);
+ result->immediate = g_imm_operand_new_from_value(MDS_32_BITS/*FIXME*/, (uint32_t)address/* FIXME */);
return G_ARCH_OPERAND(result);
@@ -1103,7 +1103,7 @@ static void g_x86_moffs_operand_init(GX86MOffsOperand *operand)
* *
******************************************************************************/
-GArchOperand *g_x86_moffs_operand_new(const bin_t *data, off_t *pos, off_t len, AsmOperandSize size)
+GArchOperand *g_x86_moffs_operand_new(const bin_t *data, off_t *pos, off_t len, MemoryDataSize size)
{
GX86MOffsOperand *result; /* Structure à retourner */
GImmOperand *offset; /* Emplacement lu */
@@ -1354,7 +1354,7 @@ bool _x86_read_operands(GArchInstruction *instr, const bin_t *data, off_t *pos,
unsigned int i; /* Boucle de parcours */
bool op1_first; /* Position de l'opérande #1 */
bool op2_first; /* Position de l'opérande #2 */
- AsmOperandSize oprsize; /* Taille des opérandes */
+ MemoryDataSize oprsize; /* Taille des opérandes */
off_t op_pos[MAX_OPERANDS]; /* Position après lecture */
vmpa_t offset; /* Adresse courante */
bin_t base; /* Indice du premier registre */
@@ -1369,7 +1369,7 @@ bool _x86_read_operands(GArchInstruction *instr, const bin_t *data, off_t *pos,
/* Types à charger */
for (i = 0; i < count; i++)
- types[i] = va_arg(ap, AsmOperandSize);
+ types[i] = va_arg(ap, MemoryDataSize);
for ( ; i < MAX_OPERANDS; i++)
types[i] = X86_OTP_NONE;
@@ -1392,7 +1392,7 @@ bool _x86_read_operands(GArchInstruction *instr, const bin_t *data, off_t *pos,
op2_first = false;
}
- oprsize = AOS_UNDEFINED;
+ oprsize = MDS_UNDEFINED;
/* Lecture des opérandes */
@@ -1426,56 +1426,56 @@ bool _x86_read_operands(GArchInstruction *instr, const bin_t *data, off_t *pos,
break;
case X86_OTP_IMM1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
- op = g_imm_operand_new_from_data(oprsize == AOS_32_BITS ? MDS_32_BITS : MDS_16_BITS, data, &op_pos[i], len, SRE_LITTLE /* FIXME */);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
+ op = g_imm_operand_new_from_data(oprsize == MDS_32_BITS ? MDS_32_BITS : MDS_16_BITS, data, &op_pos[i], len, SRE_LITTLE /* FIXME */);
break;
case X86_OTP_MOFFS8:
- op = g_x86_moffs_operand_new(data, &op_pos[i], len, AOS_8_BITS);
+ op = g_x86_moffs_operand_new(data, &op_pos[i], len, MDS_8_BITS);
break;
case X86_OTP_MOFFS1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
op = g_x86_moffs_operand_new(data, &op_pos[i], len, oprsize);
break;
case X86_OTP_REL8:
offset = va_arg(ap, vmpa_t);
- op = g_x86_relative_operand_new(data, &op_pos[i], len, AOS_8_BITS, offset + 1);
+ op = g_x86_relative_operand_new(data, &op_pos[i], len, MDS_8_BITS, offset + 1);
break;
case X86_OTP_REL1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
offset = va_arg(ap, vmpa_t);
op = g_x86_relative_operand_new(data, &op_pos[i], len, oprsize, offset + 1);
break;
case X86_OTP_R8:
- op = g_x86_register_operand_new_from_mod_rm(data, &op_pos[i], len, AOS_8_BITS, i == 0 ? op1_first : op2_first);
+ op = g_x86_register_operand_new_from_mod_rm(data, &op_pos[i], len, MDS_8_BITS, i == 0 ? op1_first : op2_first);
break;
case X86_OTP_R1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
op = g_x86_register_operand_new_from_mod_rm(data, &op_pos[i], len, oprsize, i == 0 ? op1_first : op2_first);
break;
case X86_OTP_OP_R8:
base = (bin_t)va_arg(ap, int);
- op = g_x86_register_operand_new_from_opcode(data, &op_pos[i], len, AOS_8_BITS, base);
+ op = g_x86_register_operand_new_from_opcode(data, &op_pos[i], len, MDS_8_BITS, base);
break;
case X86_OTP_OP_R1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
base = (bin_t)va_arg(ap, int);
op = g_x86_register_operand_new_from_opcode(data, &op_pos[i], len, oprsize, base);
break;
case X86_OTP_RM8:
- op = g_x86_mod_rm_operand_new(data, &op_pos[i], len, AOS_8_BITS);
+ op = g_x86_mod_rm_operand_new(data, &op_pos[i], len, MDS_8_BITS);
break;
case X86_OTP_RM1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
op = g_x86_mod_rm_operand_new(data, &op_pos[i], len, oprsize);
break;
@@ -1484,8 +1484,8 @@ bool _x86_read_operands(GArchInstruction *instr, const bin_t *data, off_t *pos,
break;
case X86_OTP_DST_1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
- op = g_x86_data_operand_new(oprsize == AOS_32_BITS ? MDS_32_BITS : MDS_16_BITS, true);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
+ op = g_x86_data_operand_new(oprsize == MDS_32_BITS ? MDS_32_BITS : MDS_16_BITS, true);
break;
case X86_OTP_SRC_8:
@@ -1493,20 +1493,20 @@ bool _x86_read_operands(GArchInstruction *instr, const bin_t *data, off_t *pos,
break;
case X86_OTP_SRC_1632:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
- op = g_x86_data_operand_new(oprsize == AOS_32_BITS ? MDS_32_BITS : MDS_16_BITS, false);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
+ op = g_x86_data_operand_new(oprsize == MDS_32_BITS ? MDS_32_BITS : MDS_16_BITS, false);
break;
case X86_OTP_CL:
- op = g_x86_register_operand_new_from_index(0x01, AOS_8_BITS);
+ op = g_x86_register_operand_new_from_index(0x01, MDS_8_BITS);
break;
case X86_OTP_AL:
- op = g_x86_register_operand_new_from_index(0x00, AOS_8_BITS);
+ op = g_x86_register_operand_new_from_index(0x00, MDS_8_BITS);
break;
case X86_OTP_E_AX:
- if (oprsize == AOS_UNDEFINED) oprsize = va_arg(ap, AsmOperandSize);
+ if (oprsize == MDS_UNDEFINED) oprsize = va_arg(ap, MemoryDataSize);
op = g_x86_register_operand_new_from_index(0x00, oprsize);
break;