Supported more x86 opcodes.

git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@60 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a

1 files changed, 12 insertions, 2 deletions

diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c
index b6f5c30..9187926 100644
--- a/src/arch/x86/processor.c
+++ b/src/arch/x86/processor.c
@@ -240,13 +240,23 @@ AsmOperandSize switch_x86_operand_size_if_needed(const asm_x86_processor *proc,
 void x86_register_instructions(asm_x86_processor *proc)
 {
     register_opcode(proc->opcodes[X86_OP_ADD_RM8_R8], 0x00, "add", x86_read_instr_add_rm8_r8);
-
     register_opcode_1632(proc->opcodes[X86_OP_ADD_RM1632_R1632], 0x01, "add", x86_read_instr_add_rm1632_r1632);
-
+    register_opcode(proc->opcodes[X86_OP_ADD_R8_RM8], 0x02, "add", x86_read_instr_add_r8_rm8);
     register_opcode_1632(proc->opcodes[X86_OP_ADD_R1632_RM1632], 0x03, "add", x86_read_instr_add_r1632_rm1632);
+    register_opcode(proc->opcodes[X86_OP_ADD_AL_IMM8], 0x04, "add", x86_read_instr_add_al_imm8);
+    register_opcode_1632(proc->opcodes[X86_OP_ADD_E_AX_IMM1632], 0x05, "add", x86_read_instr_add_e_ax_imm1632);
+
+    register_opcode(proc->opcodes[X86_OP_ADC_RM8_R8], 0x10, "adc", x86_read_instr_adc_rm8_r8);
+
+    register_opcode(proc->opcodes[X86_OP_OR_R8_RM8], 0x0a, "or", x86_read_instr_or_r8_rm8);
+
+    register_opcode(proc->opcodes[X86_OP_OR_AL_IMM8], 0x0c, "or", x86_read_instr_or_al_imm8);
+
+    register_opcode(proc->opcodes[X86_OP_AND_RM8_R8], 0x20, "and", x86_read_instr_and_rm8_r8);
 
     register_opcode_1632(proc->opcodes[X86_OP_SUB_R1632_RM1632], 0x29, "sub", x86_read_instr_sub_r1632_from_rm1632);
 
+    register_opcode(proc->opcodes[X86_OP_SUB_R8_RM8], 0x2a, "sub", x86_read_instr_sub_r8_rm8);
     register_opcode(proc->opcodes[X86_OP_SUB_AL_IMM8], 0x2c, "sub", x86_read_instr_sub_al_with_imm8);
     register_opcode_1632(proc->opcodes[X86_OP_SUB_E_AX_IMM1632], 0x2d, "sub", x86_read_instr_sub_e_ax_with_imm1632);