diff options
| author | Cyrille Bagard <nocbos@gmail.com> | 2010-08-18 23:20:47 (GMT) |
|---|---|---|
| committer | Cyrille Bagard <nocbos@gmail.com> | 2010-08-18 23:20:47 (GMT) |
| commit | c0831e2a8d16d65e8f31e52a63b703086609d8dd (patch) | |
| tree | b5587b780da2b5da3fa84869431d6409e7eec782 /src/arch/x86/processor.c | |
| parent | 9ed927a6b6405633a82f378438c533fd0112f16d (diff) | |
Supported several extra x86 instructions.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@182 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/processor.c')
| -rw-r--r-- | src/arch/x86/processor.c | 46 |
1 files changed, 45 insertions, 1 deletions
diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c index 7048890..beddda6 100644 --- a/src/arch/x86/processor.c +++ b/src/arch/x86/processor.c @@ -214,6 +214,7 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor [XOP_XOR_E_AX_IMM1632] = x86_read_instr_xor_e_ax_imm1632, [XOP_CMP_RM8_R8] = x86_read_instr_cmp_rm8_r8, [XOP_CMP_RM1632_R1632] = x86_read_instr_cmp_rm1632_r1632, + [XOP_CMP_R8_RM8] = x86_read_instr_cmp_r8_rm8, [XOP_CMP_R1632_RM1632] = x86_read_instr_cmp_r1632_rm1632, [XOP_CMP_AL_IMM8] = x86_read_instr_cmp_al_imm8, [XOP_CMP_E_AX_IMM1632] = x86_read_instr_cmp_e_ax_imm1632, @@ -335,6 +336,14 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor [XOP_MOV_E_BP_IMM1632] = x86_read_instr_mov_r1632_imm1632, [XOP_MOV_E_SI_IMM1632] = x86_read_instr_mov_r1632_imm1632, [XOP_MOV_E_DI_IMM1632] = x86_read_instr_mov_r1632_imm1632, + [XOP_ROL_RM8_IMM8] = x86_read_instr_rol_rm8_imm8, + [XOP_ROR_RM8_IMM8] = x86_read_instr_ror_rm8_imm8, + [XOP_RCL_RM8_IMM8] = x86_read_instr_rcl_rm8_imm8, + [XOP_RCR_RM8_IMM8] = x86_read_instr_rcr_rm8_imm8, + [XOP_SHL_RM8_IMM8] = x86_read_instr_shl_rm8_imm8, + [XOP_SHR_RM8_IMM8] = x86_read_instr_shr_rm8_imm8, + [XOP_SAL_RM8_IMM8] = x86_read_instr_sal_rm8_imm8, + [XOP_SAR_RM8_IMM8] = x86_read_instr_sar_rm8_imm8, [XOP_ROL_RM1632_IMM8] = x86_read_instr_rol_rm1632_imm8, [XOP_ROR_RM1632_IMM8] = x86_read_instr_ror_rm1632_imm8, [XOP_RCL_RM1632_IMM8] = x86_read_instr_rcl_rm1632_imm8, @@ -343,13 +352,47 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor [XOP_SHR_RM1632_IMM8] = x86_read_instr_shr_rm1632_imm8, [XOP_SAL_RM1632_IMM8] = x86_read_instr_sal_rm1632_imm8, [XOP_SAR_RM1632_IMM8] = x86_read_instr_sar_rm1632_imm8, - [XOP_RET] = x86_read_instr_ret, + [XOP_RETN_IMM16] = x86_read_instr_retn_imm16, + [XOP_RETN] = x86_read_instr_retn, [XOP_MOV_RM8_IMM8] = x86_read_instr_mov_rm8_imm8, [XOP_MOV_RM1632_IMM1632] = x86_read_instr_mov_rm1632_imm1632, [XOP_LEAVE] = x86_read_instr_leave, + [XOP_RETF_IMM16] = x86_read_instr_retf_imm16, + [XOP_RETF] = x86_read_instr_retf, [XOP_INT_3] = x86_read_instr_int_3, [XOP_INT] = x86_read_instr_int_imm8, + [XOP_ROL_RM8_1] = x86_read_instr_rol_rm8_1, + [XOP_ROR_RM8_1] = x86_read_instr_ror_rm8_1, + [XOP_RCL_RM8_1] = x86_read_instr_rcl_rm8_1, + [XOP_RCR_RM8_1] = x86_read_instr_rcr_rm8_1, + [XOP_SHL_RM8_1] = x86_read_instr_shl_rm8_1, + [XOP_SHR_RM8_1] = x86_read_instr_shr_rm8_1, + [XOP_SAL_RM8_1] = x86_read_instr_sal_rm8_1, + [XOP_SAR_RM8_1] = x86_read_instr_sar_rm8_1, + [XOP_ROL_RM1632_1] = x86_read_instr_rol_rm1632_1, + [XOP_ROR_RM1632_1] = x86_read_instr_ror_rm1632_1, + [XOP_RCL_RM1632_1] = x86_read_instr_rcl_rm1632_1, + [XOP_RCR_RM1632_1] = x86_read_instr_rcr_rm1632_1, + [XOP_SHL_RM1632_1] = x86_read_instr_shl_rm1632_1, + [XOP_SHR_RM1632_1] = x86_read_instr_shr_rm1632_1, + [XOP_SAL_RM1632_1] = x86_read_instr_sal_rm1632_1, + [XOP_SAR_RM1632_1] = x86_read_instr_sar_rm1632_1, + [XOP_ROL_RM8_CL] = x86_read_instr_rol_rm8_cl, + [XOP_ROR_RM8_CL] = x86_read_instr_ror_rm8_cl, + [XOP_RCL_RM8_CL] = x86_read_instr_rcl_rm8_cl, + [XOP_RCR_RM8_CL] = x86_read_instr_rcr_rm8_cl, + [XOP_SHL_RM8_CL] = x86_read_instr_shl_rm8_cl, + [XOP_SHR_RM8_CL] = x86_read_instr_shr_rm8_cl, + [XOP_SAL_RM8_CL] = x86_read_instr_sal_rm8_cl, + [XOP_SAR_RM8_CL] = x86_read_instr_sar_rm8_cl, + [XOP_ROL_RM1632_CL] = x86_read_instr_rol_rm1632_cl, + [XOP_ROR_RM1632_CL] = x86_read_instr_ror_rm1632_cl, + [XOP_RCL_RM1632_CL] = x86_read_instr_rcl_rm1632_cl, + [XOP_RCR_RM1632_CL] = x86_read_instr_rcr_rm1632_cl, [XOP_SHL_RM1632_CL] = x86_read_instr_shl_rm1632_cl, + [XOP_SHR_RM1632_CL] = x86_read_instr_shr_rm1632_cl, + [XOP_SAL_RM1632_CL] = x86_read_instr_sal_rm1632_cl, + [XOP_SAR_RM1632_CL] = x86_read_instr_sar_rm1632_cl, [XOP_CALL_REL1632] = x86_read_instr_call_rel1632, [XOP_JMP_REL1632] = x86_read_instr_jmp_rel1632, [XOP_JMP_REL8] = x86_read_instr_jmp_rel8, @@ -405,6 +448,7 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor [XOP_SETNG_RM8] = x86_read_instr_setng_rm8, [XOP_SETG_RM8] = x86_read_instr_setg_rm8, [XOP_MOVZX_R1632_RM8] = x86_read_instr_movzx_r1632_rm8, + [XOP_MOVZX_R1632_RM16] = x86_read_instr_movzx_r1632_rm16, [XOP_MOVSX_R1632_RM8] = x86_read_instr_movsx_r1632_rm8, [XOP_MOVSX_R1632_RM1632] = x86_read_instr_movsx_r1632_rm1632 |