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| author | Cyrille Bagard <nocbos@gmail.com> | 2009-10-07 00:22:10 (GMT) |
|---|---|---|
| committer | Cyrille Bagard <nocbos@gmail.com> | 2009-10-07 00:22:10 (GMT) |
| commit | daa0084325d4e748f334a223e1cd3800120e6055 (patch) | |
| tree | 9f8bfe9296e1a4f6aa945418293f895303b771e2 /src/arch/x86/processor.c | |
| parent | d9be16271ab3fbb95d6c95baa92242358f0e7dfd (diff) | |
Created a function to load n x86 operands and supported extra x86 opcodes.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@128 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/processor.c')
| -rw-r--r-- | src/arch/x86/processor.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/arch/x86/processor.c b/src/arch/x86/processor.c index 15179e2..3dc5fc2 100644 --- a/src/arch/x86/processor.c +++ b/src/arch/x86/processor.c @@ -225,6 +225,19 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor result = x86_read_instr_or_rm1632_r1632(data, pos, len, addr, prefix, proc); break; + + + case XOP_AND_AL_IMM8: + result = x86_read_instr_and_al_imm8(data, pos, len, addr, prefix, proc); + break; + + case XOP_AND_E_AX_IMM1632: + result = x86_read_instr_and_e_ax_imm1632(data, pos, len, addr, prefix, proc); + break; + + + + case XOP_OR_R8_RM8: result = x86_read_instr_or_r8_rm8(data, pos, len, addr, prefix, proc); break; @@ -246,6 +259,9 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor result = x86_read_instr_jne_rel1632(data, pos, len, addr, prefix, proc); break; + case XOP_JBE_REL1632: + result = x86_read_instr_jbe_rel1632(data, pos, len, addr, prefix, proc); + break; case XOP_JA_REL1632: result = x86_read_instr_ja_rel1632(data, pos, len, addr, prefix, proc); @@ -270,6 +286,10 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor result = x86_read_instr_jle_rel1632(data, pos, len, addr, prefix, proc); break; + case XOP_JG_REL1632: + result = x86_read_instr_jg_rel1632(data, pos, len, addr, prefix, proc); + break; + case XOP_MOVZX_R1632_RM8: result = x86_read_instr_movzx_r1632_rm8(data, pos, len, addr, prefix, proc); @@ -291,6 +311,10 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor result = x86_read_instr_and_rm8_r8(data, pos, len, addr, prefix, proc); break; + case XOP_AND_RM1632_R1632: + result = x86_read_instr_and_rm1632_r1632(data, pos, len, addr, prefix, proc); + break; + case XOP_SUB_RM1632_R1632: result = x86_read_instr_sub_rm1632_r1632(data, pos, len, addr, prefix, proc); @@ -342,6 +366,13 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor result = x86_read_instr_cmp_rm1632_r1632(data, pos, len, addr, prefix, proc); break; + + case XOP_CMP_R1632_RM1632: + result = x86_read_instr_cmp_r1632_rm1632(data, pos, len, addr, prefix, proc); + break; + + + case XOP_INC_E_AX: case XOP_INC_E_CX: case XOP_INC_E_DX: @@ -391,6 +422,10 @@ static GArchInstruction *g_x86_processor_decode_instruction(const GX86Processor result = x86_read_instr_push_imm1632(data, pos, len, addr, prefix, proc); break; + case XOP_IMUL_R1632_RM1632_IMM1632: + result = x86_read_instr_imul_r1632_rm1632_imm1632(data, pos, len, addr, prefix, proc); + break; + case XOP_IMUL_RM1632_IMM8: result = x86_read_instr_imul_rm1632_imm8(data, pos, len, addr, prefix, proc); |