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authorCyrille Bagard <nocbos@gmail.com>2020-06-21 20:21:00 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2020-06-21 20:21:00 (GMT)
commit6183dcf34a45b7250b63add608c02e96bf53e096 (patch)
tree971747a5dfab5384402a30aa26c8bf86e5ec7166 /src/core
parentf6e8a85c7fe86e957adffc4e05bf10e8f3ae8ae2 (diff)
Reorganized the code for target operands.
Diffstat (limited to 'src/core')
-rw-r--r--src/core/processors.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/core/processors.c b/src/core/processors.c
index 81f7494..3211009 100644
--- a/src/core/processors.c
+++ b/src/core/processors.c
@@ -29,11 +29,11 @@
#include <string.h>
-#include "../arch/target.h"
#include "../arch/instructions/raw.h"
#include "../arch/instructions/undefined.h"
#include "../arch/operands/immediate.h"
#include "../arch/operands/register.h"
+#include "../arch/operands/target.h"
@@ -78,6 +78,7 @@ void register_arch_gtypes(void)
g_type_ensure(G_TYPE_IMM_OPERAND);
g_type_ensure(G_TYPE_REGISTER_OPERAND);
+ g_type_ensure(G_TYPE_TARGET_OPERAND);
}