diff options
author | Cyrille Bagard <nocbos@gmail.com> | 2021-10-12 22:26:55 (GMT) |
---|---|---|
committer | Cyrille Bagard <nocbos@gmail.com> | 2021-10-12 22:26:55 (GMT) |
commit | d405d93f41f9376c55ac8af7acde62eec80386ec (patch) | |
tree | 200fe3624d99061cca876493103bf6e981cf30a9 /tests/analysis/contents/memory.py | |
parent | 2b3d86868d130ac82b403575d0b5521176e77827 (diff) |
Reorganize the remaining code for binary contents.
Diffstat (limited to 'tests/analysis/contents/memory.py')
-rw-r--r-- | tests/analysis/contents/memory.py | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/tests/analysis/contents/memory.py b/tests/analysis/contents/memory.py index 55ce035..f99e607 100644 --- a/tests/analysis/contents/memory.py +++ b/tests/analysis/contents/memory.py @@ -7,7 +7,7 @@ from chrysacase import ChrysalideTestCase -from pychrysalide import arch +from pychrysalide.analysis import BinContent from pychrysalide.analysis.contents import MemoryContent from pychrysalide.arch import vmpa, mrange @@ -29,7 +29,7 @@ class TestMemoryContent(ChrysalideTestCase): cnt = MemoryContent(data) - start = vmpa(4, vmpa.VMPA_NO_VIRTUAL) + start = vmpa(4, vmpa.VmpaSpecialValue.NO_VIRTUAL) val = cnt.read_u8(start) self.assertEqual(val, 0x05) @@ -37,14 +37,14 @@ class TestMemoryContent(ChrysalideTestCase): val = cnt.read_u8(start) self.assertEqual(val, 0x06) - start = vmpa(14, vmpa.VMPA_NO_VIRTUAL) + start = vmpa(14, vmpa.VmpaSpecialValue.NO_VIRTUAL) - val = cnt.read_u16(start, arch.SRE_LITTLE) + val = cnt.read_u16(start, BinContent.SourceEndian.LITTLE) self.assertEqual(val, 0x1817) - start = vmpa(10, vmpa.VMPA_NO_VIRTUAL) + start = vmpa(10, vmpa.VmpaSpecialValue.NO_VIRTUAL) - val = cnt.read_u32(start, arch.SRE_LITTLE) + val = cnt.read_u32(start, BinContent.SourceEndian.LITTLE) self.assertEqual(val, 0x16150013) @@ -57,10 +57,10 @@ class TestMemoryContent(ChrysalideTestCase): with self.assertRaisesRegex(Exception, 'Invalid read access.'): - start = vmpa(1, vmpa.VMPA_NO_VIRTUAL) + start = vmpa(1, vmpa.VmpaSpecialValue.NO_VIRTUAL) val = cnt.read_u8(start) with self.assertRaisesRegex(Exception, 'Invalid read access.'): - start = vmpa(0, vmpa.VMPA_NO_VIRTUAL) - val = cnt.read_u16(start, arch.SRE_LITTLE) + start = vmpa(0, vmpa.VmpaSpecialValue.NO_VIRTUAL) + val = cnt.read_u16(start, BinContent.SourceEndian.LITTLE) |